omap30_dspclkrst_l3.h

有关于USB的一些主机端驱动

#define            DSPCLKRST_DSP_SYSST_RESERVED_NUMB                                                   2
#define            DSPCLKRST_DSP_SYSST_RESERVED_RES_VAL                                                0x0
//R/W

#define            DSPCLKRST_DSP_SYSST_CLOCK_SELECT_POS                                                11
#define            DSPCLKRST_DSP_SYSST_CLOCK_SELECT_NUMB                                               3
#define            DSPCLKRST_DSP_SYSST_CLOCK_SELECT_RES_VAL                                            0x0
//R

#define            DSPCLKRST_DSP_SYSST_IDLE_ARM_POS                                                    6
#define            DSPCLKRST_DSP_SYSST_IDLE_ARM_NUMB                                                   1
#define            DSPCLKRST_DSP_SYSST_IDLE_ARM_RES_VAL                                                0x0
//R

#define            DSPCLKRST_DSP_SYSST_POR_POS                                                         5
#define            DSPCLKRST_DSP_SYSST_POR_NUMB                                                        1
#define            DSPCLKRST_DSP_SYSST_POR_RES_VAL                                                     0x0
//R/C

#define            DSPCLKRST_DSP_SYSST_EXT_RST_POS                                                     4
#define            DSPCLKRST_DSP_SYSST_EXT_RST_NUMB                                                    1
#define            DSPCLKRST_DSP_SYSST_EXT_RST_RES_VAL                                                 0x0
//R/C

#define            DSPCLKRST_DSP_SYSST_DSP_ARM_RST_POS                                                 3
#define            DSPCLKRST_DSP_SYSST_DSP_ARM_RST_NUMB                                                1
#define            DSPCLKRST_DSP_SYSST_DSP_ARM_RST_RES_VAL                                             0x0
//R/W

#define            DSPCLKRST_DSP_SYSST_ARM_WDRST_POS                                                   2
#define            DSPCLKRST_DSP_SYSST_ARM_WDRST_NUMB                                                  1
#define            DSPCLKRST_DSP_SYSST_ARM_WDRST_RES_VAL                                               0x0
//R/C

#define            DSPCLKRST_DSP_SYSST_GLOB_SWRST_POS                                                  1
#define            DSPCLKRST_DSP_SYSST_GLOB_SWRST_NUMB                                                 1
#define            DSPCLKRST_DSP_SYSST_GLOB_SWRST_RES_VAL                                              0x0
//R/C

#define            DSPCLKRST_DSP_SYSST_DSP_WDRST_POS                                                   0
#define            DSPCLKRST_DSP_SYSST_DSP_WDRST_NUMB                                                  1
#define            DSPCLKRST_DSP_SYSST_DSP_WDRST_RES_VAL                                               0x0
//R/C


//DSPCLKRST_DSP_CKOUT1
//-------------------
#define            DSPCLKRST_DSP_CKOUT1                                                              REG16(DSPCLKRST_BASE_ADDR+DSPCLKRST_DSP_CKOUT1_OFFSET)


#define            DSPCLKRST_DSP_CKOUT1_RESERVED_POS                                                   0
#define            DSPCLKRST_DSP_CKOUT1_RESERVED_NUMB                                                  16
#define            DSPCLKRST_DSP_CKOUT1_RESERVED_RES_VAL                                               0x0
//R/W


//DSPCLKRST_DSP_CKOUT2
//-------------------
#define            DSPCLKRST_DSP_CKOUT2                                                              REG16(DSPCLKRST_BASE_ADDR+DSPCLKRST_DSP_CKOUT2_OFFSET)


#define            DSPCLKRST_DSP_CKOUT2_RESERVED_POS                                                   0
#define            DSPCLKRST_DSP_CKOUT2_RESERVED_NUMB                                                  16
#define            DSPCLKRST_DSP_CKOUT2_RESERVED_RES_VAL                                               0x0
//R/W


//-------------------------------------------------------------------------------
//
//   GLOBAL TYPES DEFINITION
//
//-------------------------------------------------------------------------------

typedef enum {

  GPIO_DIV,
  UART_DIV,
  PER_DIV           

} DIV_NAME_t;

typedef enum {

  CLK_DIV_BY_1=0,
  CLK_DIV_BY_2=1,
  CLK_DIV_BY_4=2,
  CLK_DIV_BY_8=3

} CKCTL_DIV_t;

typedef enum {

  WDGTIM_CK,
  XORPC_CK,
  PER_CK,
  UART_CK,
  GPIO_CK,
  TIM_CK,
  ALL_CK       
      
} CLOCK_SWITCH_t;

typedef enum {

  TIMDSP_MODULE_IDLE,
  GPIO_MODULE_IDLE,
  UART_MODULE_IDLE,
  PERDSP_MODULE_IDLE,
  XORDSP_MODULE_IDLE,
  WDTDSP_MODULE_IDLE,
  ALL_IDLE

} MODULE_IDLE_NAME_t;

typedef enum {

  UARTXO,
  GPIOXO,
  TIMXO       
      
} CLOCK_CONTROL_t;

//-----------------------------------------------------
#define ENABLE                                    TRUE
#define DISABLE                                   FALSE


//-------------------------------------------------------------------------------
//
//  FUNCTIONS
//
//-------------------------------------------------------------------------------

//-----------------------------------------------------------------------------
// NAME         : DSPCLKRST_SetPeripheralClockDivider                     
// DESCRIPTION  : defines the frequency for peripheral sub domain
// PARAMETERS   : DivName                                               
//                        GPIO_DIV
//                        UART_DIV
//                        PER_DIV                      
//
//                and DivVal                                                  
//                        CLK_DIV_BY_1                     
//                        CLK_DIV_BY_2                     
//                        CLK_DIV_BY_4                     
//                        CLK_DIV_BY_8                     
//                                                    
// RETURN VALUE : None                               
// LIMITATIONS  : None                                
//-----------------------------------------------------------------------------
void DSPCLKRST_SetPeripheralClockDivider(DIV_NAME_t DivName,  CKCTL_DIV_t DivVal);

//----------------------------------------------------------
// NAME        : DSPCLKRST_SetPeripheralClockControl 
// DESCRIPTION : Define the frequency selection for the selected peripheral clock
//               (ENABLE = the clock is issued from CK_GEN2
//                DISABLE = the clock is the input reference clock)
// PARAMETERS  : PerifName
//                        UARTXO   
//                        GPIOXO    
//                        TIMXO      
//                                   
//                and State=ENABLE or DISABLE
// RETURN VALUE: IS_OK if the operation succeed
//               NOT_OK if not
//  LIMITATIONS : None
// ----------------------------------------------------------
BOOL DSPCLKRST_SetPeripheralClockControl(CLOCK_CONTROL_t PerifName, BOOL State);

//----------------------------------------------------------
// NAME        : DSPCLKRST_SetPeripheralClockEnable 
// DESCRIPTION : Enable/Disable the selected peripheral clock
//               
// PARAMETERS  : PerifName
//                        WDGTIM_CK   
//                        XORPC_CK    
//                        PER_CK      
//                        UART_CK     
//                        GPIO_CK     
//                        TIM_CK      
//                        ALL_CK       
//                                   
//                and State=ENABLE or DISABLE
// RETURN VALUE: IS_OK if the operation succeed
//               NOT_OK if not
//  LIMITATIONS : None
// ----------------------------------------------------------
BOOL DSPCLKRST_SetPeripheralClockEnable(CLOCK_SWITCH_t PerifName, BOOL State);

//-----------------------------------------------------------------------------
// NAME         : DSPCLKRST_ConfigIdleModule                                                --
// DESCRIPTION  : put or remove a module from idle mode
// PARAMETERS   : Module2Set
//                        TIMDSP_MODULE_IDLE
//                        GPIO_MODULE_IDLE
//                        UART_MODULE_IDLE
//                        PERDSP_MODULE_IDLE
//                        XORDSP_MODULE_IDLE
//                        WDTDSP_MODULE_IDLE
//                        ALL_IDLE
//
//                and State=SET_IN_IDLE or SET_NOT_IDLE
// RETURN VALUE : None
// LIMITATIONS  : None
//-----------------------------------------------------------------------------
void DSPCLKRST_ConfigIdleModule(MODULE_IDLE_NAME_t Module2Set, BOOL State  );

//-----------------------------------------------------------------------------
// NAME         : DSPCLKRST_TogglePeripheralResetPin       
// DESCRIPTION  : Toggle the pin which manage the peripheral reset
// PARAMETERS   : LOW_LEVEL or HIGH_LEVEL
// RETURN VALUE : None 
// LIMITATIONS  : None
//-----------------------------------------------------------------------------
void DSPCLKRST_TogglePeripheralResetPin(BOOL State);


#endif