arm925t.h

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   tmp |= B_bit;                         \
   ARM_WRITE_REG1(tmp);                  \
}					 
					 
//-------------------------------------------------------------------------------
// NAME        : ARM_SET_LITTLE_ENDIAN                                        
// DESCRIPTION : Set Little endian mode (default mode) using                  
//               ARM_WRITE_REG1 and ARM_READ_REG1 functions                   
// PARAMETERS  : None.                                                        
// RETURN VALUE: None.                                                        
// LIMITATIONS : None.                                                        
//-------------------------------------------------------------------------------
#define ARM_SET_LITTLE_ENDIAN            \
{                                        \
   int tmp;                              \
   tmp = ARM_READ_REG1();                \
   tmp &= ~B_bit;                        \
   ARM_WRITE_REG1(tmp);                  \
}

//-------------------------------------------------------------------------------
// NAME        : ARM_SET_S_BIT                                            
// DESCRIPTION : Set S Bit                                                
// PARAMETERS  : None.                                                    
// RETURN VALUE: None.                                                    
// LIMITATIONS : None.                                                    
//-------------------------------------------------------------------------------
#define ARM_SET_S_BIT                    \
{                                        \
   int tmp;                              \
   tmp = ARM_READ_REG1();                \
   tmp |= S_bit;                         \
   ARM_WRITE_REG1(tmp);                  \
}

//-------------------------------------------------------------------------------
// NAME        : ARM_RESET_S_BIT                                        
// DESCRIPTION : Clear S Bit                                            
// PARAMETERS  : None.                                                  
// RETURN VALUE: None.                                                  
// LIMITATIONS : None.                                                  
//-------------------------------------------------------------------------------
#define ARM_RESET_S_BIT                  \
{                                        \
   int tmp;                              \
   tmp = ARM_READ_REG1();                \
   tmp &= ~S_bit;                        \
   ARM_WRITE_REG1(tmp);                  \
}

//-------------------------------------------------------------------------------
// NAME        : ARM_SET_R_BIT                                            
// DESCRIPTION : Set R Bit                                                
// PARAMETERS  : None.                                                    
// RETURN VALUE: None.                                                    
// LIMITATIONS : None.                                                    
//-------------------------------------------------------------------------------
#define ARM_SET_R_BIT                    \
{                                        \
   int tmp;                              \
   tmp = ARM_READ_REG1();                \
   tmp |= R_bit;                         \
   ARM_WRITE_REG1(tmp);                  \
}

//-------------------------------------------------------------------------------
// NAME        : ARM_RESET_R_BIT                                           
// DESCRIPTION : Clear R Bit                                               
// PARAMETERS  : None.                                                     
// RETURN VALUE: None.                                                     
// LIMITATIONS : None.                                                     
//-------------------------------------------------------------------------------
#define ARM_RESET_R_BIT                  \
{                                        \
   int tmp;                              \
   tmp = ARM_READ_REG1();                \
   tmp &= ~R_bit;                        \
   ARM_WRITE_REG1(tmp);                  \
}

//-------------------------------------------------------------------------------
// NAME        : ARM_DCACHE_ON                                             
// DESCRIPTION : Enable Data Cache of ARM925 using                         
//               Write_cp15_register1 and read_cp15_register1 functions    
// PARAMETERS  : None.                                                     
// RETURN VALUE: None.                                                     
// LIMITATIONS : None.                                                     
//-------------------------------------------------------------------------------
#define ARM_DCACHE_ON                    \
{                                        \
 int tmp;                                \
 tmp = ARM_READ_REG1();                  \
 tmp |= C_bit;                           \
 ARM_WRITE_REG1(tmp);                    \
}

//-------------------------------------------------------------------------------
// NAME        : ARM_ICACHE_ON                                            
// DESCRIPTION : Enable Instruction Cache of ARM925 using                 
//               Write_cp15_register1 and read_cp15_register1 functions   
// PARAMETERS  : None.                                                    
// RETURN VALUE: None.                                                    
// LIMITATIONS : None.                                                    
//-------------------------------------------------------------------------------
#define ARM_ICACHE_ON                    \
{                                        \
 int tmp;                                \
 tmp = ARM_READ_REG1();                  \
 tmp |= I_bit;                           \
 ARM_WRITE_REG1(tmp);                    \
}

//-------------------------------------------------------------------------------
// NAME        : ARM_DCACHE_OFF                                          
// DESCRIPTION : Disable Data Cache of ARM925 using                      
//               Write_cp15_register1 and read_cp15_register1 functions  
// PARAMETERS  : None.                                                   
// RETURN VALUE: None.                                                   
// LIMITATIONS : None.                                                   
//-------------------------------------------------------------------------------
#define ARM_DCACHE_OFF                   \
{                                        \
 int tmp;                                \
 tmp = ARM_READ_REG1();                  \
 tmp &= ~C_bit;                          \
 ARM_WRITE_REG1(tmp);                    \
}

//-------------------------------------------------------------------------------
// NAME        : ARM_ICACHE_OFF                                            
// DESCRIPTION : Disable Instruction Cache of ARM925 using                 
//               Write_cp15_register1 and read_cp15_register1 functions    
// PARAMETERS  : None.                                                     
// RETURN VALUE: None.                                                     
// LIMITATIONS : None.                                                     
//-------------------------------------------------------------------------------
#define ARM_ICACHE_OFF                   \
{                                        \
 int tmp;                                \
 tmp = ARM_READ_REG1();                  \
 tmp &= ~I_bit;                          \
 ARM_WRITE_REG1(tmp);                    \
}

//-------------------------------------------------------------------------------
// NAME        : ARM_WRITE_TTBR                                              
// DESCRIPTION : Write value into CP15 register2 (used to set TTB)           
// PARAMETERS  : See ARM925 CP15 Register 2 specification                    
// RETURN VALUE: None.                                                       
// LIMITATIONS : None.                                                       
//-------------------------------------------------------------------------------
extern void ARM_WRITE_TTBR (int value);

//-------------------------------------------------------------------------------
// NAME        : ARM_READ_TTBR                                               
// DESCRIPTION : Read value from CP15 register2 (used to set TTB)            
// PARAMETERS  : See ARM925 CP15 Register 2 specification                    
// RETURN VALUE: Translation Table base value                                
// LIMITATIONS : None.                                                       
//-------------------------------------------------------------------------------
extern int ARM_READ_TTBR (void);

//-------------------------------------------------------------------------------
// NAME        : ARM_WRITE_DOMAIN_REG                                        
// DESCRIPTION : Write value into CP15 register3 (used to set domain register)
// PARAMETERS  : See ARM925 CP15 Register 3 specification                     
// RETURN VALUE: None.                                                        
// LIMITATIONS : None.                                                        
//-------------------------------------------------------------------------------
extern void ARM_WRITE_DOMAIN_REG (int);

//-------------------------------------------------------------------------------
// NAME        : ARM_READ_DOMAIN_REG                                          
// DESCRIPTION : Read value from CP15 register3 (used to set domain register) 
// PARAMETERS  : See ARM925 CP15 Register 3 specification                     
// RETURN VALUE: Domain Register value                                        
// LIMITATIONS : None.                                                        
//-------------------------------------------------------------------------------
extern int ARM_READ_DOMAIN_REG (void);

//-------------------------------------------------------------------------------
// NAME        : ARM_READ_FSR                                                 
// DESCRIPTION : Read value from CP15 register5 (Fault Status Register)       
// PARAMETERS  : See ARM925 CP15 Register 5 specification                     
// RETURN VALUE: FSR                                                          
// LIMITATIONS : None.                                                        
//-------------------------------------------------------------------------------
extern int ARM_READ_FSR (void);

//-------------------------------------------------------------------------------
// NAME        : ARM_READ_FAR                                                 
// DESCRIPTION : Read value from CP15 register6 (Fault Address Register)      
// PARAMETERS  : See ARM925 CP15 Register 6 specification                     
// RETURN VALUE: FAR                                                          
// LIMITATIONS : None.                                                        
//-------------------------------------------------------------------------------
extern int ARM_READ_FAR (void);

//-------------------------------------------------------------------------------
// NAME        : ARM_FLUSH_CACHE                                              
// DESCRIPTION : Flush I_Cache and D_Cache                                    
// PARAMETERS  : See ARM925 CP15 Register 7 specification                     
// RETURN VALUE: None.