📄 omap30_tcif.c
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SetField(temp,TC_EMIFS_CS0_CONFIG_FCLKDIV,FlashClockDivider);
switch(SlowChipSelect)
{
case TCIF_Slow_nCS0:
{
TC_EMIFS_CS0_CONFIG=temp;
break;
}
case TCIF_Slow_nCS1:
{
TC_EMIFS_CS1_CONFIG=temp;
break;
}
case TCIF_Slow_nCS2:
{
TC_EMIFS_CS2_CONFIG=temp;
break;
}
case TCIF_Slow_nCS3:
{
TC_EMIFS_CS3_CONFIG=temp;
break;
}
default :
{
break;
}
}
}
//-------------------------------------------------------------------------------
// NAME : TCIF_EmifFastConfigReg
// DESCRIPTION : Initialize the fast Config register
// PARAMETERS : ClockToggle SDRAM_CLOCK_DISABLE
// SDRAM_CLOCK_ENABLE
// PowerDownToggle POWER_DOWN_DISABLE
// POWER_DOWN_ENABLE
// SdramFrequency SDRAM_FREQ_0
// SDRAM_FREQ_1
// SDRAM_FREQ_2
// SDRAM_FREQ_3
// AutoRefreshCounter a value =((64 ms / 4096)/F x BurstValue )-400
// SdramType SDRAMTYPE_16MBITS_BUS8_2BANKS
// SDRAMTYPE_16MBITS_BUS16_2BANKS
// SDRAMTYPE_64MBITS_BUS8_2BANKS
// SDRAMTYPE_64MBITS_BUS8_4BANKS
// SDRAMTYPE_64MBITS_BUS16_2BANKS
// SDRAMTYPE_64MBITS_BUS16_4BANKS
// SDRAMTYPE_128MBITS_BUS8_4BANKS
// SDRAMTYPE_128MBITS_BUS16_4BANKS
// SDRAMTYPE_256BITS_BUS8_4BANKS
// SDRAMTYPE_256MBITS_BUS16_4BANKS
// RETURN VALUE: None
// LIMITATIONS : None
//-------------------------------------------------------------------------------
void TCIF_EmifFastConfigReg (BOOL ClockToggle,
BOOL PowerDownToggle,
UWORD8 SdramFrequency,
UWORD16 AutoRefreshCounter,
UWORD8 SdramType)
{
UWORD32 temp;
temp=TC_EMIFF_SDRAM_CONFIG;
SetField(temp,TC_EMIFF_SDRAM_CONFIG_CLK,ClockToggle);
SetField(temp,TC_EMIFF_SDRAM_CONFIG_PWD,PowerDownToggle);
SetField(temp,TC_EMIFF_SDRAM_CONFIG_SDRAMFREQ,SdramFrequency);
SetField(temp,TC_EMIFF_SDRAM_CONFIG_ARCV,AutoRefreshCounter);
SetField(temp,TC_EMIFF_SDRAM_CONFIG_SDRAMTYPE,SdramType);
TC_EMIFF_SDRAM_CONFIG=temp;
}
//-------------------------------------------------------------------------------
// NAME : TCIF_EmifFastRefreshMode
// DESCRIPTION : Initialize the Refresh mode of the SDRAM
// PARAMETERS : RefreshMode NO_REFFRESH
// AUTOREFFRESH_ENABLE_ONECMD
// AUTOREFFRESH_ENABLE_BURST4
// AUTOREFFRESH_ENABLE_BURST16
// SELF_REFFRESH_ENABLE
// RETURN VALUE: None
// LIMITATIONS : None
//-------------------------------------------------------------------------------
void TCIF_EmifFastRefreshMode(UWORD8 RefreshMode)
{
UWORD32 temp;
temp=TC_EMIFF_SDRAM_CONFIG;
switch(RefreshMode)
{
case AUTOREFFRESH_ENABLE_ONECMD:
{
SetField(temp,TC_EMIFF_SDRAM_CONFIG_CLK,SDRAM_CLOCK_ENABLE);
SetField(temp,TC_EMIFF_SDRAM_CONFIG_ARE,AUTOREFFRESH_ENABLE_ONECMD);
SetField(temp,TC_EMIFF_SDRAM_CONFIG_SLRF,SELF_REFFRESH_DISABLE_BIT);
break;
}
case AUTOREFFRESH_ENABLE_BURST4:
{
SetField(temp,TC_EMIFF_SDRAM_CONFIG_CLK,SDRAM_CLOCK_ENABLE);
SetField(temp,TC_EMIFF_SDRAM_CONFIG_ARE,AUTOREFFRESH_ENABLE_BURST4);
SetField(temp,TC_EMIFF_SDRAM_CONFIG_SLRF,SELF_REFFRESH_DISABLE_BIT);
break;
}
case AUTOREFFRESH_ENABLE_BURST16:
{
SetField(temp,TC_EMIFF_SDRAM_CONFIG_CLK,SDRAM_CLOCK_ENABLE);
SetField(temp,TC_EMIFF_SDRAM_CONFIG_ARE,AUTOREFFRESH_ENABLE_BURST16);
SetField(temp,TC_EMIFF_SDRAM_CONFIG_SLRF,SELF_REFFRESH_DISABLE_BIT);
break;
}
case SELF_REFFRESH_ENABLE:
{
SetField(temp,TC_EMIFF_SDRAM_CONFIG_CLK,SDRAM_CLOCK_DISABLE);
SetField(temp,TC_EMIFF_SDRAM_CONFIG_ARE,AUTOREFFRESH_DISABLE);
SetField(temp,TC_EMIFF_SDRAM_CONFIG_SLRF,SELF_REFFRESH_ENABLE_BIT);
break;
}
case NO_REFFRESH:
{
SetField(temp,TC_EMIFF_SDRAM_CONFIG_CLK,SDRAM_CLOCK_DISABLE);
SetField(temp,TC_EMIFF_SDRAM_CONFIG_ARE,AUTOREFFRESH_DISABLE);
SetField(temp,TC_EMIFF_SDRAM_CONFIG_SLRF,SELF_REFFRESH_DISABLE_BIT);
break;
}
default :
{
break;
}
}
TC_EMIFF_SDRAM_CONFIG=temp;
}
//-------------------------------------------------------------------------------
// NAME : TCIF_EmifFastMRSReg
// DESCRIPTION : Initialize the Cas latency
// SYNOPSYS : void TCIF_EmifFastMRSReg(UWORD8 CasLatency)
// PARAMETERS : CasLatency CAS_LATENCY_1
// CAS_LATENCY_2
// CAS_LATENCY_3
// RETURN VALUE: None
// LIMITATIONS : None
//-------------------------------------------------------------------------------
void TCIF_EmifFastMRSReg(UWORD8 CasLatency)
{
UWORD32 temp;
temp=TC_EMIFF_MRS;
SetField(temp,TC_EMIFF_MRS_CASL,CasLatency);
TC_EMIFF_MRS=temp;
}
//-------------------------------------------------------------------------------
// NAME : TCIF_EnableDSPEndianismTranslation
// DESCRIPTION : Switch on or off DSP endianism translation and
// select Byte swap or Word swap
// PARAMETERS : stateConv ENABLE or DISABLE
// Wordswap DSP_ENDIANISM_WORD_SWAP
// DSP_ENDIANISM_BYTE_SWAP
// RETURN VALUE: None
// LIMITATIONS : None
//-------------------------------------------------------------------------------
void TCIF_EnableDSPEndianismTranslation(BOOL stateConv, BOOL Wordswap)
{
UWORD32 temp;
temp=TC_ENDIANISM;
SetField(temp,TC_ENDIANISM_EN,stateConv);
SetField(temp,TC_ENDIANISM_SWAP,Wordswap);
TC_ENDIANISM=temp;
}
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