omap30_clkrst.c

有关于USB的一些主机端驱动

//-------------------------------------------------------------------------------
// NAME         : CLKRST_DriveDspReset                                             
// DESCRIPTION  : drive the reset line of the dsp
// PARAMETERS   : level HIGH_LEVEL or LOW_LEVEL
// RETURN VALUE : None 
// LIMITATIONS  : None                              
//-------------------------------------------------------------------------------
void CLKRST_DriveDspReset(BOOL level)
{
/*   SetGroupBits(CLKRST_ARM_RSTCT1,CLKRST_ARM_RSTCT1_DSP_EN_POS,CLKRST_ARM_RSTCT1_DSP_EN_NUMB,level);*/
UWORD16 temp;

	temp = CLKRST_ARM_RSTCT1;
	SetGroupBits16(temp,CLKRST_ARM_RSTCT1_DSP_EN_POS,CLKRST_ARM_RSTCT1_DSP_EN_NUMB,level);
	CLKRST_ARM_RSTCT1 = temp;
}

//-----------------------------------------------------------------------------
// NAME         : CLKRST_GenerateReset                                              
// DESCRIPTION  : Reset OMAP3
// PARAMETERS   : GLOBAL_RESET or MCU_RESET
// RETURN VALUE : None 
// LIMITATIONS  : None                                  
//-----------------------------------------------------------------------------
void CLKRST_GenerateReset(Reset_t Domain)
{
 switch (Domain)
  {
  case GLOBAL_RESET:
    {
    SetGroupBits16(CLKRST_ARM_RSTCT1,CLKRST_ARM_RSTCT1_SW_RST_POS,CLKRST_ARM_RSTCT1_SW_RST_NUMB,0x1);
    break;
    }
    
 case MCU_RESET:
    {
    SetGroupBits16(CLKRST_ARM_RSTCT1,CLKRST_ARM_RSTCT1_ARM_RST_POS,CLKRST_ARM_RSTCT1_ARM_RST_NUMB,0x1);
    break;
    }
    
  default :
    {
    break;
    }
  }
}

//-----------------------------------------------------------------------------
// NAME         : CLKRST_GetResetOrigin                                              
// DESCRIPTION  : Reset OMAP3
// PARAMETERS   : None
// RETURN VALUE : 	NONE
//			DSP_WDG_RST
//			GLB_SW_RST
//			ARM_WDG_RST
//			ARM_MCU_RS
//			EXT_RST
//			POWER_ON_RST  
// LIMITATIONS  : None                                  
//-----------------------------------------------------------------------------
SourceReset_t CLKRST_GetResetOrigin(void)
{
 #define RESET_FIELD_MASK 0x0000003F
 UWORD32 temp;
 
 temp =  CLKRST_ARM_SYSST;
 CLKRST_ARM_SYSST = temp & ~RESET_FIELD_MASK;
 
 return(temp & RESET_FIELD_MASK);
}

//-------------------------------------------------------------------------------
// NAME         : CLKRST_EnableDisableDsp                                             
// DESCRIPTION  : Reset the priority registers, Emifs confs and API control
// PARAMETERS   : level HIGH_LEVEL or LOW_LEVEL
// RETURN VALUE : None 
// LIMITATIONS  : None                              
//-------------------------------------------------------------------------------
void CLKRST_DriveInterfaceDspReset(BOOL level)
{
/*    SetGroupBits(CLKRST_ARM_RSTCT1,CLKRST_ARM_RSTCT1_DSP_RST_POS,CLKRST_ARM_RSTCT1_DSP_RST_NUMB,level);*/
UWORD16 temp;

	temp = CLKRST_ARM_RSTCT1;
	SetGroupBits16(temp,CLKRST_ARM_RSTCT1_DSP_RST_POS,CLKRST_ARM_RSTCT1_DSP_RST_NUMB,level);
	CLKRST_ARM_RSTCT1 = temp;
}

//-------------------------------------------------------------------------------
// NAME         : CLKRST_EnableDisableDspClock
// DESCRIPTION  : Enable or disable the dsp clock to turned on during the reset state
// PARAMETERS   : Action ENABLE or DISABLE
// RETURN VALUE : None 
// LIMITATIONS  : None                              
//-------------------------------------------------------------------------------
void CLKRST_EnableDisableDspClock(BOOL Action)
{
/*    SetGroupBits(CLKRST_ARM_CKCTL,CLKRST_ARM_CKCTL_EN_DSPCK_POS,CLKRST_ARM_CKCTL_EN_DSPCK_NUMB,Action);*/
UWORD16 temp;

	temp = CLKRST_ARM_CKCTL;
	SetGroupBits16(temp,CLKRST_ARM_CKCTL_EN_DSPCK_POS,CLKRST_ARM_CKCTL_EN_DSPCK_NUMB,Action);
	CLKRST_ARM_CKCTL = temp;
}

//-------------------------------------------------------------------------------
// NAME         : CLKRST_SetIdle               
// DESCRIPTION  : Launch the idle mode                  
// PARAMETERS   : IdleMode         IDLE_PIN_WKUP or IDLE_INT_WKUP 
//
// RETURN VALUE : None.                                                      
// LIMITATIONS  : None                                                    
//-------------------------------------------------------------------------------
void CLKRST_SetIdle(BOOL IdleMode)
{  
  SetGroupBits16(CLKRST_ARM_IDLECT1,CLKRST_ARM_IDLECT1_SETARM_IDLE_POS,CLKRST_ARM_IDLECT1_WKUP_MODE_NUMB,IdleMode);
  SetGroupBits16(CLKRST_ARM_IDLECT1,CLKRST_ARM_IDLECT1_SETARM_IDLE_POS,CLKRST_ARM_IDLECT1_SETARM_IDLE_NUMB,SET_IN_IDLE);
  
}

//-------------------------------------------------------------------------------
// NAME         : CLKRST_TogglePeripheralResetPin       
// DESCRIPTION  : Toggle the pin which manage the peripheral reset :MCUPER_nRST
// PARAMETERS   : LOW_LEVEL or HIGH_LEVEL
// RETURN VALUE : None 
// LIMITATIONS  : None                                    
//-------------------------------------------------------------------------------
void CLKRST_TogglePeripheralResetPin(BOOL State)
{
/*    SetGroupBits(CLKRST_ARM_RSTCT2,CLKRST_ARM_RSTCT2_PER_EN_POS,CLKRST_ARM_RSTCT2_PER_EN_NUMB,State);*/
UWORD16 temp;

	temp = CLKRST_ARM_RSTCT2;
	SetGroupBits16(temp,CLKRST_ARM_RSTCT2_PER_EN_POS,CLKRST_ARM_RSTCT2_PER_EN_NUMB,State);
	CLKRST_ARM_RSTCT2 = temp;
}

//-------------------------------------------------------------------------------
// NAME         : CLKRST_ToggleDspPeripheralResetPin       
// DESCRIPTION  : Toggle the pin which manage the peripheral reset :MCUPER_nRST
// PARAMETERS   : LOW_LEVEL or HIGH_LEVEL
// RETURN VALUE : None 
// LIMITATIONS  : None                                    
//-------------------------------------------------------------------------------
void CLKRST_ToggleDspPeripheralResetPin(BOOL State)
{
/*    SetGroupBits(DSPCLKM_DSP_RSTCT2,DSPCLKM_DSP_RSTCT2_PER_EN_POS,DSPCLKM_DSP_RSTCT2_PER_EN_NUMB,State);*/
UWORD16 temp;

	temp = DSPCLKM_DSP_RSTCT2;
	SetGroupBits16(temp,DSPCLKM_DSP_RSTCT2_PER_EN_POS,DSPCLKM_DSP_RSTCT2_PER_EN_NUMB,State);
	DSPCLKM_DSP_RSTCT2 = temp;
}

//-------------------------------------------------------------------------------
// NAME         : SetClockDivider                     
// DESCRIPTION  : defines the frequency for sub domain
// PARAMETERS   : CLOCK_DIV values of peripherals     
//                   DSPMMU_DIV                   
//                   TC_DIV                       
//                   DSP_DIV                      
//                   ARM_DIV                      
//                   LCD_DIV                      
//                   PER_DIV                      
//                    CLK_DIV_BY_1                     
//                    CLK_DIV_BY_2                     
//                    CLK_DIV_BY_4                     
//                    CLK_DIV_BY_8                     
//                                                    
// RETURN VALUE : None.                               
// LIMITATIONS  : None                                
//-------------------------------------------------------------------------------
void CLKRST_SetClockDivider(DIV_NAME_t DivName,  CKCTL_DIV_t divval)
{

switch (DivName)
  {
  case DSPMMU_DIV :
    {
    SetGroupBits16(CLKRST_ARM_CKCTL,CLKRST_ARM_CKCTL_DSPMMUDIV_POS,CLKRST_ARM_CKCTL_DSPMMUDIV_NUMB,divval);
    break;
    }

  case TC_DIV :
    {
    SetGroupBits16(CLKRST_ARM_CKCTL,CLKRST_ARM_CKCTL_TCDIV_POS,CLKRST_ARM_CKCTL_TCDIV_NUMB,divval);
    break;
    }

  case DSP_DIV :
    {
    SetGroupBits16(CLKRST_ARM_CKCTL,CLKRST_ARM_CKCTL_DSPDIV_POS,CLKRST_ARM_CKCTL_DSPDIV_NUMB,divval);
    break;
    }

  case ARM_DIV :
    {
    SetGroupBits16(CLKRST_ARM_CKCTL,CLKRST_ARM_CKCTL_ARMDIV_POS,CLKRST_ARM_CKCTL_ARMDIV_NUMB,divval);
    break;
    }

  case LCD_DIV :
    {
    SetGroupBits16(CLKRST_ARM_CKCTL,CLKRST_ARM_CKCTL_LCDDIV_POS,CLKRST_ARM_CKCTL_LCDDIV_NUMB,divval);
    break;
    }

  case PER_DIV :
    {
    SetGroupBits16(CLKRST_ARM_CKCTL,CLKRST_ARM_CKCTL_PERDIV_POS,CLKRST_ARM_CKCTL_PERDIV_NUMB,divval);
    break;
    }

  default :
    {
    break;
    }
  }

}

//-------------------------------------------------------------------------------
// NAME         : CLKRST_ConfigIdleModule                                          
// DESCRIPTION  : put or remove a module from idle mode                 
// PARAMETERS   : Module2set	TIMARM_MODULE_IDLE
//				APIARM_MODULE_IDLE
//				DPLLARM_MODULE_IDLE
//				LIFARM_MODULE_IDLE
//				HSABARM_MODULE_IDLE
//				LBARM_MODULE_IDLE
//				LCDARM_MODULE_IDLE
//				PERARM_MODULE_IDLE:
//				XORPARM_MODULE_IDLE
//				WDTARM_MODULE_IDLE
//				ALL_IDLE
//               State          SET_IN_IDLE or SET_NOT_IDLE
// RETURN VALUE : None.                                                    
// LIMITATIONS  : None                                                    
//-------------------------------------------------------------------------------
void CLKRST_ConfigIdleModule(MODULE_IDLE_NAME_t Module2Set, BOOL State  )
{

    switch(Module2Set)
        {
        case TIMARM_MODULE_IDLE :
             {
             SetGroupBits16(CLKRST_ARM_IDLECT1,CLKRST_ARM_IDLECT1_IDLTIM_ARM_POS,CLKRST_ARM_IDLECT1_IDLTIM_ARM_NUMB,State);
             break;
             }

        case APIARM_MODULE_IDLE:
             {
             SetGroupBits16(CLKRST_ARM_IDLECT1,CLKRST_ARM_IDLECT1_IDLAPI_ARM_POS,CLKRST_ARM_IDLECT1_IDLAPI_ARM_NUMB,State);
             break;
             }

        case DPLLARM_MODULE_IDLE:
             {
             SetGroupBits16(CLKRST_ARM_IDLECT1,CLKRST_ARM_IDLECT1_IDLDPLL_ARM_POS,CLKRST_ARM_IDLECT1_IDLDPLL_ARM_NUMB,State);
             break;
             }

        case LIFARM_MODULE_IDLE:
             {
             SetGroupBits16(CLKRST_ARM_IDLECT1,CLKRST_ARM_IDLECT1_IDLIF_ARM_POS,CLKRST_ARM_IDLECT1_IDLIF_ARM_NUMB,State);
             break;
             }

        case HSABARM_MODULE_IDLE:
             {
             SetGroupBits16(CLKRST_ARM_IDLECT1,CLKRST_ARM_IDLECT1_IDLHSAB_ARM_POS,CLKRST_ARM_IDLECT1_IDLHSAB_ARM_NUMB,State);
             break;
             }

        case LBARM_MODULE_IDLE:
             {
             SetGroupBits16(CLKRST_ARM_IDLECT1,CLKRST_ARM_IDLECT1_IDLLB_ARM_POS,CLKRST_ARM_IDLECT1_IDLLB_ARM_NUMB,State);
             break;
             }

        case LCDARM_MODULE_IDLE:
             {
             SetGroupBits16(CLKRST_ARM_IDLECT1,CLKRST_ARM_IDLECT1_IDLLCD_ARM_POS,CLKRST_ARM_IDLECT1_IDLLCD_ARM_NUMB,State);
             break;
             }

        case PERARM_MODULE_IDLE:
             {
             SetGroupBits16(CLKRST_ARM_IDLECT1,CLKRST_ARM_IDLECT1_IDLPER_ARM_POS,CLKRST_ARM_IDLECT1_IDLPER_ARM_NUMB,State);
             break;
             }

        case XORPARM_MODULE_IDLE:
             {
             SetGroupBits16(CLKRST_ARM_IDLECT1,CLKRST_ARM_IDLECT1_IDLXORP_ARM_POS,CLKRST_ARM_IDLECT1_IDLXORP_ARM_NUMB,State);
             break;
             }

        case WDTARM_MODULE_IDLE:
             {
             SetGroupBits16(CLKRST_ARM_IDLECT1,CLKRST_ARM_IDLECT1_IDLWDT_ARM_POS,CLKRST_ARM_IDLECT1_IDLWDT_ARM_NUMB,State);
             break;
             }

        case ALL_IDLE:
             {
             SetGroupBits16(CLKRST_ARM_IDLECT1,0,10,0x3FF);
             break;
             }

        default :
             {
             break;
             }
        }

}

//-------------------------------------------------------------------------------
// NAME         : CLKRST_SetClockMode
// DESCRIPTION  : Set the clock mode
// PARAMETERS   :   - SYNC_MODE_CK 
//                  - ASYNC_MODE_CK
//                  - SCAL_MODE_CK
//                  - ARM_TO_TC_MODE_CK
//                  - DSP_TO_TC_MODE_CK
//                  - BYPASS_MODE_CK
//                  - TEST_MODE_CK
// RETURN VALUE : None                                                      
// LIMITATIONS  : None
//-------------------------------------------------------------------------------
void CLKRST_SetClockMode(CLOCK_MODE_t ClockMode)
{
    SetGroupBits16(CLKRST_ARM_SYSST,CLKRST_ARM_SYSST_CLOCK_SELECT_POS,CLKRST_ARM_SYSST_CLOCK_SELECT_NUMB,ClockMode);
}