📄 boot.asm
字号:
.global _allreset
.global IRQ_Shell
.global _IRQ_handler
.global _IRQStackOverflow
.def _bb
.global __swi_stack
.global __udef_stack
.global __abort_stack
.global __irq_stack
.global __fiq_stack
.global _cint00
.global c_cinit
.sect ".text"
SetMM16Bits .macro addr,val
ldr r0,addr
mov r1,#val
str r1,[r0]
.endm
.word 0xEAFFFFFE
OMAP1510_MODE .word 0x0000eaef
ITR2 .word 0xfffe0000
MIR2 .word 0xfffe0004
SIR_IRQ_CODE2 .word 0xfffe0010
SIR_FIQ_CODE2 .word 0xfffe0014
CONTROL_REG2 .word 0xfffe0018
ILR0Start_ADDR2 .word 0xfffe001c
;OMAP1510 Configuration Registers FFFE:1000.
FUNC_MUX_CTRL_0 .word 0xfffe1000 ;Functional multiplexing control 0 0x00
;FUNC_MUX_CTRL_1 .word 0xfffe1004 ;Functional multiplexing control 1 0x04
;FUNC_MUX_CTRL_2 .word 0xfffe1008 ;Functional multiplexing control 2 0x08
COMP_MODE_CTRL_0 .word 0xfffe100c ;Compatibility mode control 0 0x0C
;FUNC_MUX_CTRL_3 .word 0xfffe1010 ;Functional multiplexing control 3 0x10
;FUNC_MUX_CTRL_4 .word 0xfffe1014 ;Functional multiplexing control 4 0x14
;FUNC_MUX_CTRL_5 .word 0xfffe1018 ;Functional multiplexing control 5 0x18
;FUNC_MUX_CTRL_6 .word 0xfffe101c ;Functional multiplexing control 6 0x1C
;FUNC_MUX_CTRL_7 .word 0xfffe1020 ;Functional multiplexing control 7 0x20
;FUNC_MUX_CTRL_8 .word 0xfffe1024 ;Functional multiplexing control 8 0x24
;FUNC_MUX_CTRL_9 .word 0xfffe1028 ;Functional multiplexing control 9 0x28
;FUNC_MUX_CTRL_A .word 0xfffe102c ;Functional multiplexing control A 0x2C
;FUNC_MUX_CTRL_B .word 0xfffe1030 ;Functional multiplexing control B 0x30
;FUNC_MUX_CTRL_C .word 0xfffe1034 ;Functional multiplexing control C 0x34
;FUNC_MUX_CTRL_D .word 0xfffe1038 ;Functional multiplexing control D 0x38
;PULL_DWN_CTRL_0 .word 0xfffe1040 ;Pulldown control 0 0x40
;PULL_DWN_CTRL_1 .word 0xfffe1044 ;Pulldown control 1 0x44
;PULL_DWN_CTRL_2 .word 0xfffe1048 ;Pulldown control 2 0x48
PULL_DWN_CTRL_3 .word 0xfffe104c ;Pulldown control 3 0x4C
GATE_INH_CTRL_0 .word 0xfffe1050 ;Gate and inhibit control 0 0x50
;VOLTAGE_CTRL_0 .word 0xfffe1060 ;Voltage control 0 0x60
;TEST_DBG_CTRL_0 .word 0xfffe1070 ;Test debug control 0 0x70
;MOD_CONF_CTRL_0 .word 0xfffe1080 ;Module configuration control 0 0x80
ITR1 .word 0xfffecb00
MIR1 .word 0xfffecb04
SIR_IRQ_CODE1 .word 0xfffecb10
SIR_FIQ_CODE1 .word 0xfffecb14
CONTROL_REG1 .word 0xfffecb18
ILR0Start_ADDR1 .word 0xfffecb1c
ARM_CKCTL .word 0xfffece00 ;Defines frequency for MPU, LCD, LCLB,MPUPER clocks R/W 16b 0x3000
ARM_IDLECT1 .word 0xfffece04 ; Enables and defines idle mode entry for each clock domain R/W 16b 0x0400
ARM_IDLECT2 .word 0xfffece08 ;Controls clock domains individually R/W 16b 0x0100
ARM_EWUPCT .word 0xfffece0c ; Delay from external device restore power with reference to MPU clock
; R/W 16b 0x003F
ARM_RSTCT1 .word 0xfffece10 ; Initiates S/W reset to MPU and DSP R/W 16b 0x0000
ARM_RSTCT2 .word 0xfffece14 ; PER_EN signal R/W 16b 0x0000
ARM_SYSST .word 0xfffece18 ;Contains system information such asR/W 16b 0x0038
Mask32Bits .word 0xffffffff
.word 0xEAFFFFFE
_allreset:
;*********Clear & Disable all interrupt.************************
MRS r0, cpsr
ORR r0,r0,#0xc0 ; Disable IRQ and FIQ
MSR cpsr,r0
BIC r0, r0, #0x1F ; CLEAR MODES
ORR r0, r0, #0x13 ; SET SUPERVISOR MODE
MSR cpsr, r0
;*********Reset all clock for any thing ***************************
mov r11,#0
SetMM16Bits ARM_CKCTL,0x3000
SetMM16Bits ARM_IDLECT1,0x400
SetMM16Bits ARM_IDLECT2,0x140
SetMM16Bits ARM_EWUPCT,0x3f
str r11, ARM_RSTCT1
str r11, ARM_RSTCT2
SetMM16Bits ARM_SYSST,0x38
;*********Reset all clock for any thing ***************************
;;;;;;;;;;;;;;clear two handler interrupt input and mask all interrupt input.
ldr r0,MIR2 ;interrupt mask handler1 entry address
mvn r1, #0 ; mask all IRQ interrupt
str r1,[r0]
ldr r0,ITR2 ; interrupt input handler2 entry address
str r0,#0 ;clear all input
ldr r0,MIR1 ;interrupt mask handler1 entry address
mvn r1, #0 ; mask all IRQ interrupt
str r1,[r0]
ldr r0,ITR1 ; interrupt input handler1 entry address
str r0,#0 ;clear all input
b _cint00
;;;;;;;;;;;;;;clear two handler interrupt input and mask all interrupt input.
;;;;;*******Reset Omap1510 configure register *******************
ldral r0,FUNC_MUX_CTRL_0
ldral r2,PULL_DWN_CTRL_3
stral r11, [r0]
loopclear: ; r2 = 0;
str r11, [r0,#4]! ;
eor r1,r0,r3
bne loopclear
b _cint00
;;;;;*******Reset Omap1510 configure register *******************
swi_stack: .word __swi_stack
udef_stack: .word __udef_stack
abort_stack: .word __abort_stack
irq_stack: .word __irq_stack
fiq_stack: .word __fiq_stack
exception_stack_size: .word EXCEPTION_STACK_SIZE
_cint00:
;************************************************************
;* Set the FIQ mode stack
;************************************************************
MRS r0, cpsr
BIC r0, r0, #0x1F ; CLEAR MODES
ORR r0, r0, #0x11 ; SET FIQ MODE
MSR cpsr, r0
LDR SP, fiq_stack
LDR R0, exception_stack_size
ADD SP, SP, R0
;************************************************************
;* Set the IRQ mode stack
;************************************************************
MRS r0, cpsr
BIC r0, r0, #0x1F ; CLEAR MODES
ORR r0, r0, #0x12 ; SET IRQ MODE
MSR cpsr, r0
LDR SP, irq_stack
LDR R0, exception_stack_size
ADD SP, SP, R0
;************************************************************
;* Set the ABORT mode stack
;************************************************************
MRS r0, cpsr
BIC r0, r0, #0x1F ; CLEAR MODES
ORR r0, r0, #0x17 ; SET PABORT MODE
MSR cpsr, r0
LDR SP, abort_stack
LDR R0, exception_stack_size
ADD SP, SP, R0
;************************************************************
;* Set the UNDEFINED mode stack
;************************************************************
MRS r0, cpsr
BIC r0, r0, #0x1F ; CLEAR MODES
ORR r0, r0, #0x1B ; SET UNDEFINED MODE
MSR cpsr, r0
LDR SP, udef_stack
LDR R0, exception_stack_size
ADD SP, SP, R0
;************************************************************
;* Set the SUPERVISOR mode stack
;************************************************************
MRS r0, cpsr
BIC r0, r0, #0x1F ; CLEAR MODES
ORR r0, r0, #0x13 ; SET SUPERVISOR MODE
MSR cpsr, r0
LDR SP, swi_stack
LDR R0, exception_stack_size
ADD SP, SP, R0
;*-----------s-------------------------------------------
;* Move here 'cause _sys_setup may use initialized
;* global variables. Oct 18, 2001 Zhu,Yaozong
;*------------------------------------------------------
;* PERFORM AUTO-INITIALIZATION. IF CINIT IS -1, THEN
;* THERE IS NONE
;*------------------------------------------------------
LDR R0, c_cinit
CMN R0, #1
BLNE auto_init
b _bb ;
;****************************************************************************
;* 32 BIT STATE BOOT ROUTINE *
;****************************************************************************
EXCEPTION_STACK_SIZE .set 0x1000
__swi_stack: .usect ".swi_stack", EXCEPTION_STACK_SIZE, 4
__udef_stack: .usect ".udef_stack", EXCEPTION_STACK_SIZE, 4
__abort_stack .usect ".abort_stack", EXCEPTION_STACK_SIZE, 4
__irq_stack: .usect ".irq_stack", EXCEPTION_STACK_SIZE*8, 4
__fiq_stack: .usect ".fiq_stack", EXCEPTION_STACK_SIZE, 4
.global __stack
;***************************************************************
;* DEFINE THE USER MODE STACK (DEFAULT SIZE IS 512)
;***************************************************************
__stack:.usect ".stack", 0, 4
;***************************************************************
;***************************************************************
_bb:
;*------------------------------------------------------
;* SET TO USER MODE
;*------------------------------------------------------
MRS r0, cpsr
BIC r0, r0, #0x1F ; CLEAR MODES
ORR r0, r0, #0x10 ; SET USER MODE
MSR cpsr, r0
;*------------------------------------------------------
;* INITIALIZE THE USER MODE STACK
;*------------------------------------------------------
LDR SP, c_stack
LDR R0, c_STACK_SIZE
ADD SP, SP, R0
;*------------------------------------------------------
;* PERFORM AUTO-INITIALIZATION. IF CINIT IS -1, THEN
;* THERE IS NONE
;*------------------------------------------------------
;LDR R0, c_cinit
;CMN R0, #1
;BLNE auto_init
;*------------------------------------------------------
;* CALL APPLICATION
;*------------------------------------------------------
BL _main
.word 0xEAFFFFFE
;*------------------------------------------------------
;* IF APPLICATION DIDN'T CALL EXIT, CALL EXIT(1)
;*------------------------------------------------------
MOV R0, #1
BL _exit
;*------------------------------------------------------
;* DONE, LOOP FOREVER
;*------------------------------------------------------
L1: B L1
;***************************************************************************
;* PROCESS INITIALIZATION TABLE.
;*
;* THE TABLE CONSISTS OF A SEQUENCE OF RECORDS OF THE FOLLOWING FORMAT:
;*
;* .word <length of data (bytes)>
;* .word <address of variable to initialize>
;* .word <data>
;*
;* THE INITIALIZATION TABLE IS TERMINATED WITH A ZERO LENGTH RECORD.
;*
;***************************************************************************
tbl_addr: .set R0
var_addr: .set R1
length: .set R2
data: .set R3
auto_init:
B rec_chk
;*------------------------------------------------------
;* PROCESS AN INITIALIZATION RECORD
;*------------------------------------------------------
record: LDR var_addr, [tbl_addr], #4 ;
;*------------------------------------------------------
;* COPY THE INITIALIZATION DATA
;*------------------------------------------------------
TST var_addr, #3 ; SEE IF DEST IS ALIGNED
BNE _bcopy ; IF NOT, COPY BYTES
SUBS length, length, #4 ; IF length <= 3, ALSO
BMI _bcont ; COPY BYTES
_wcopy: LDR data, [tbl_addr], #4 ;
STR data, [var_addr], #4 ; COPY A WORD OF DATA
SUBS length, length, #4 ;
BPL _wcopy ;
_bcont: ADDS length, length, #4 ;
BEQ _cont ;
_bcopy: LDRB data, [tbl_addr], #1 ;
STRB data, [var_addr], #1 ; COPY A BYTE OF DATA
SUBS length, length, #1 ;
BNE _bcopy ;
_cont: TST tbl_addr, #0x3 ; MAKE SURE THE ADDRESS
BICNE tbl_addr, tbl_addr, #0x3 ; IS WORD ALIGNED
ADDNE tbl_addr, tbl_addr, #4 ;
rec_chk:LDR length, [tbl_addr], #4 ; PROCESS NEXT
CMP length, #0 ; RECORD IF LENGTH IS
BNE record ; NONZERO
MOV PC, LR
;***************************************************************
;* CONSTANTS USED BY THIS MODULE
;***************************************************************
c_stack .long __stack
c_STACK_SIZE .long __STACK_SIZE
c_cinit .long cinit
;******************************************************
;* UNDEFINED REFERENCES *
;******************************************************
.global _exit
.global _main
.global cinit
.global __STACK_SIZE
IRQ_Shell:
sub lr, lr, #4
stmdb sp!, {r0-r12, lr}
mrs r0, spsr
str r0, [sp,#-4]! ; /* Store the spsr too */
LDR r0, irq_stack
LDR r1, exception_stack_size
mov r1, r1, lsr#1 ;/* Half full */
add r0, r0, r1
cmp r0, sp ;/* Check the stack. */
blge _IRQStackOverflow
bl _IRQ_handler;
ldr r0, [sp], #4 ; /* Restore the spsr. */
msr spsr, r0
ldmia sp!, {r0-r12, pc}^
.end
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