📄 sst28sf040.txt
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Software
Drivers
28SF040 / 28LF040 / 28VF040
4 Megabit SuperFlash EEPROM
December 1997
ABOUT THE SOFTWARE
This application note provides software driver examples for 28SF040, 4 Megabit byte-write EEPROM, that
can be used in any microprocessor based system. Software driver examples used in this document utilize
two programming languages: (a) high -level "C" for broad platform support and (b) optimized 8086 assem-
bly language. In many cases, software driver routines can be inserted "as is" into the main body of code
being developed by the system software developers. Extensive comments are included in each routine to
describe the function of each routine. The driver in "C" language can be used with many microprocessors
and microcontrollers, while the 8086 assembly language provides an optimized solution for 8086 micro-
processors.
NOTE:
The 28SF040 is for 5 volt applications, the 28LF040 is for 3.0 volt applications, and the 28VF040 is for 2.7
volt applications. Device functionality is identical for application of this software. For convenience, only the
28SF040 will be referenced in the example codes provided.
ABOUT THE 28SF040
Companion product datasheets for the 28SF040 should be reviewed in conjunction with this application
note for a complete understanding of the device.
The 28SF040 features high performance sector (256 bytes) erase and byte program capability. A com-
mand register is incorporated on chip to facilitate interface and control of the 28SF040. Device Read,
Erase, Program, and other essential operations are accomplished via the command register. Commands
are written to the command register using standard microprocessor write timings. The register contents
serve as input to an internal state machine, which controls the erase and program circuitry. Address and
data are latched for program and erase operations. The command register does not occupy an address-
able memory location. It is a latch used to store the command, along with address and data information
needed to execute the command.
Provisions are made to prevent inadvertent writes through a software approach. In order to perform the
functions of page erase or program, users must issue a series of seven byte-read sequence to the
28SF040 to unprotect the chip. After the device is unprotected, users can then erase and program the de-
vice. Prior to programming the sector (256 bytes), it must be erased first. After the erase operation,
programming are done on a byte-by-byte basis for a total of 256 bytes. The end of each byte program cy-
cle can be detected by two means, namely by monitoring either DATA# Polling or Toggle Bit.
Both the C and 8086 assembly code in the document contain the following routines, in this order:
Name Function
Check_SST_28SF040 Check manufacturer and device ID
Disable_Chip_Data_Protection Diables software data protection
Enable_Chip_Data_Protection Enable software data protection
Write_28SF040 Alter data
Check_Toggle_Ready End of write detection using Toggle bit
Check_Data_Polling End of write detection using Data# polling
"C" LANGUAGE DRIVERS
/******************************************************************************************************/
/* Copyright Silicon Storage Technology, Inc. (SST), 1994-1997 */
/* Example "C" language Driver of 28SF040 4 Mbit SuperFlash EEPROM */
/* Chi Chung Yin, Silicon Storage Technology */
/* */
/* Revision 2.0, April 8, 1997 */
/* */
/******************************************************************************************************/
#define FALSE 0
#define TRUE (~FALSE)
#define ROW_SIZE 256 /* Must be 256 bytes for 28SF040 */
#define SST_ID 0xBF /* SST Manufacturer抯 ID code */
#define SST_28SF040 0x04 /* SST 28SF040 device code */
#define AUTO_PG_ERASE1 0x20
#define AUTO_PG_ERASE2 0xD0
#define AUTO_PGRM 0x10
#define RESET 0xFF
#define READ_ID 0x90
typedef unsigned char BYTE;
void Check_Toggle_Ready(BYTE far *);
void Check_Data_Polling(BYTE far *, BYTE);
/*******************************************************************************************************/
/*PROCEDURE: Check_SST_28SF040 */
/* */
/* This procedure decides whether a physical hardware device has a SST */
/* 28SF040 4 Mbit SuperFlash EEPROM installed or not. */
/* */
/* Input: */
/* None */
/* */
/* Output: */
/* return -1: indicates no SST 28SF040 installed */
/* return 0: indicates a SST 28SF040 is installed */
/*******************************************************************************************************/
int Check_SST_28SF040()
{
BYTE far *Temp;
BYTE SST_id1;
BYTE SST_id2;
int ReturnStatus;
BYTE OriginalByte;
Temp = (BYTE far *)0xE0000000;
OriginalByte = *Temp; /* save the original memory contents */
*Temp = RESET; /* reset tje 28SF040 chip first */
*Temp = READ_ID; /* issue the READ_ID command */
Temp = (BYTE far *)0xE0000000; /* set up address to be E000:0000h */
SST_id1 = *Temp; /* get first ID byte */
Temp = (BYTE far *)0xE0000001; /* set up address to be E000:0001h */
SST_id2 = *Temp; /* get second ID byte */
if ((SST_id1 == SST_ID) && (SST_id2 == SST_28SF040))
ReturnStatus = 0;
else
ReturnStatus = -1;
Temp = (BYTE far *)0xE0000000;
*Temp = RESET; /* issue RESET command to 28SF040 */
if (ReturnStatus ==-1)
*Temp = OriginalByte; /* if not 28SF040, restore original contents */
return(ReturnStatus);
}
/******************************************************************************************************/
/*PROCEDURE: Disable_Chip_Data_Protection */
/* */
/* This procedure DISABLES the data protection feature on the 28SF040 */
/* 4 Mbit SuperFlash EEPROM. After calling this routine, the chip can be written */
/* without any additional commands. */
/* */
/* Input: */
/* None */
/* */
/* Output: */
/* None */
/******************************************************************************************************/
void Disable_Chip_Data_Protection()
{
BYTE far *Temp;
BYTE TempByte;
Temp = (BYTE far *)0xE0001823; /* set up address to be E000:1823h */
TempByte = *Temp; /* read data from the address */
Temp = (BYTE far *)0xE0001820; /* set up address to be E000:1820h */
TempByte = *Temp; /* read data from the address */
Temp = (BYTE far *)0xE0001822; /* set up address to be E000:1822h */
TempByte = *Temp; /* read data from the address */
Temp = (BYTE far *)0xE0000418; /* set up address to be E000:0418h */
TempByte = *Temp; /* read data from the address */
Temp = (BYTE far *)0xE000041B; /* set up address to be E000:041Bh */
TempByte = *Temp; /* read data from the address */
Temp = (BYTE far *)0xE0000419; /* set up address to be E000:0419h */
TempByte = *Temp; /* read data from the address */
Temp = (BYTE far *)0xE000041A; /* set up address to be E000:041Ah */
TempByte = *Temp; /* read data from the address */
}
******************************************************************************************************/
/*PROCEDURE: Enable_Chip_Data_Protection */
/* */
/* This procedure ENABLES the data protection feature on the 28SF040 */
/* 4 Mbit SuperFlash EEPROM. After calling this routine, the chip cannot be written */
/* without disabling SDP first. Disabling the SDP can be done by calling the */
/* "Disable_Chip_Data_Protection" routine. */
/* */
/* Input: */
/* None */
/* */
/* Output: */
/* None */
/*****************************************************************************************************/
void Enable_Chip_Data_Protection()
{
BYTE far *Temp;
BYTE TempByte;
Temp = (BYTE far *)0xE0001823; /* set up address to be E000:1823h */
TempByte = *Temp; /* read data from the address */
Temp = (BYTE far *)0xE0001820; /* set up address to be E000:1820h */
TempByte = *Temp; /* read data from the address */
Temp = (BYTE far *)0xE0001822; /* set up address to be E000:1822h */
TempByte = *Temp; /* read data from the address */
Temp = (BYTE far *)0xE0000418; /* set up address to be E000:0418h */
TempByte = *Temp; /* read data from the address */
Temp = (BYTE far *)0xE000041B; /* set up address to be E000:041Bh */
TempByte = *Temp; /* read data from the address */
Temp = (BYTE far *)0xE0000419; /* set up address to be E000:0419h */
TempByte = *Temp; /* read data from the address */
Temp = (BYTE far *)0xE000040A; /* set up address to be E000:040Ah */
TempByte = *Temp; /* read data from the address */
}
/*****************************************************************************************************/
/* PROCEDURE: Write_28SF040 */
/* */
/* This procedure can be used to write a total of 256 bytes at one write cycle to the */
/* SST抯 28SF040 4 Mbit SuperFlash EEPROM. */
/* */
/* Input: */
/* SRC SOURCE address containing the data which will be */
/* written into the 28SF040. */
/* Dst DESTINATION address which will be written with the */
/* data passed in from ds:si */
/* */
/* Output: */
/* return - 1 : indicates an error in programming the 28SF040 */
/* return - 0 : indicates no error in programming the 28SF040 */
/*****************************************************************************************************/
int Write_28SF040 (BYTE far *Src, BYTE far *Dst)
{
BYTE far *Temp;
BYTE far *SourceBuf;
BYTE far *DestBuf;
int Index;
int Count;
BYTE SourceByte;
BYTE ProgrammedByte;
BYTE Continue;
Disable_Chip_Data_Protection();
SourceBuf = Src;
DestBuf = Dst;
/************************************************************************************/
/* ERASE OPERATION */
/* */
/************************************************************************************/
*DestBuf = AUTO_PG_ERASE1; /* erase the page before programming */
*DestBuf = AUTO_PG_ERASE2;
Check_Toggle_Ready(Dst); /* wait for Toggle bit ready */
Count = 0;
Continue = TRUE;
while ((Count < ROW_SIZE) && (Continue))
{
SourceByte = * DestBuf++;
if (SourceByte == 0xFF)
Count++;
else
Continue = FALSE;
}
if (!Continue)
{
Enable_Chip_Data_Protection();
return (TRUE); /* return with error */
}
/**********************************************************************************************************/
/* PROGRAM OPERATION */
/* */
/**********************************************************************************************************/
SourceBuf = Src;
DestBuf = Dst;
for (Index = 0; Index < ROW_SIZE; Index++)
{
SourceByte = *SourceBuf++;
if (SourceByte != 0xFF) /* If the data is 0xFF, don抰 program it*/
{
*DestBuf = AUTO_PGRM; /*issue AUTO PROGRAM command*/
*DestBuf = SourceByte; /* program the data */
Check_Toggle_Ready(Dst); /* wait for Toggle bit ready */
ProgrammedByte = *DestBuf++; /* read back the data pragrammed */
if (SourceByte != ProgrammedByte)
{
Continue = FALSE;
break;
}
}
}
Enable_Chip_Data_Protection();
if (!Continue)
return(TRUE); /* return with error */
else
return(FALSE); /* return with NO error */
}
/******************************************************************************************************/
/*PROCEDURE: Check_Toggle_Ready */
/* */
/*During the internal write cycle, any consecutive read operation */
/*on DQ6 will produce alternating 0抯 and 1抯 i.e. toggling between */
/*0 and 1. When the write cycle is completed, DQ6 of the data will */
/*stop toggling. After the DQ6 data bit stops toggling, the device is ready */
/*for next operation. */
/* */
/* Input: */
/* Dst must already set-up by the caller */
/* */
/* Output: */
/* None */
/******************************************************************************************************/
void Check_Toggle_Ready (BYTE far *Dst)
{
BYTE Loop = TRUE;
BYTE PreData;
BYTE CurrData;
unsigned long TimeOut = 0;
PreData = *Dst;
PreData = PreData & 0x40;
while ((TimeOut< 0x07FFFFFF) && (Loop))
{
CurrData = *Dst;
CurrData = CurrData & 0x40;
if (PreData == CurrData)
Loop = FALSE; /* ready to exit the while loop */
PreData = CurrData;
TimeOut++;
}
}
/********************************************************************************************************/
/* PROCEDURE: Check_Data_Polling */
/* */
/* During the internal write cycle, any attempt to read DQ7 of the byte loaded during */
/* the byte-load cycle will receive the complement of the true data. Once the write */
/* cycle is completed, DQ7 will show true data. */
/* */
/* Input: */
/* Dst must already set-up by the caller */
/* TrueData this is the original (true) data */
/* */
/* Output: */
/* None */
/********************************************************************************************************/
void Check_Data_Polling (BYTE far *Dst, BYTE TrueData)
{
BYTE Loop = TRUE;
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