sysalib.s

来自「大名鼎鼎的mpc8260的bsp源代码」· S 代码 · 共 548 行

/* sysALib.s - Motorola 860ads system-dependent assembly routines */

/* Copyright 1984-1998 Wind River Systems, Inc. */
        .data
	.globl	copyright_wind_river
	.long	copyright_wind_river

/*
modification history
--------------------
01f,26jan99,cn   added support for SDRAM (SPR# 24337). 
01e,09nov98,cn   added support for FADS860T boards.
01d,12jan98,dat  SPR 20104, correct use of HI and HIADJ macros
01c,04nov96,tpr  clean up + fix SPR # 7173.
01b,24may96,tpr  added MMU initialization.
01a,19apr96,tpr  written.
*/

/*
DESCRIPTION
This module contains system-dependent routines written in assembly
language.

This module must be the first specified in the \f3ld\f1 command used to
build the system.  The sysInit() routine is the system start-up code.
*/

#define _ASMLANGUAGE
#include "vxWorks.h"
#include "asm.h"
#include "cacheLib.h"
#include "config.h"
#include "regs.h"	
#include "sysLib.h"

	/* globals */

	.globl	_sysInit		/* start of system code */
	.globl  sysInByte
	.globl  sysOutByte
	.globl  sysPciInByte
	.globl  sysPciOutByte
        .globl  sysPciInWord
        .globl  sysPciOutWord
        .globl  sysInWord
	.globl  sysInWordRev
        .globl  sysOutWord
        .globl  sysInLong
        .globl  sysOutLong
        .globl  sysPciErr
	.globl	sysDecGet
	.globl  sysUioRead
	.globl  sysUioWrite
	/* externals */

	.extern usrInit
	
	.text

/*******************************************************************************
*
* sysInit - start after boot
*
* This is the system start-up entry point for VxWorks in RAM, the
* first code executed after booting.  It disables interrupts, sets up
* the stack, and jumps to the C routine usrInit() in usrConfig.c.
*
* The initial stack is set to grow down from the address of sysInit().  This
* stack is used only by usrInit() and is never used again.  Memory for the
* stack must be accounted for when determining the system load address.
*
* NOTE: This routine should not be called by the user.
*
* RETURNS: N/A

* sysInit (void)              /@ THIS IS NOT A CALLABLE ROUTINE @/

*/

_sysInit:
	/*
	 * disable external interrupts and Instruction/Data MMU, set
	 * the exception prefix 
	 */
	bl aaaa /* jump to the aaaa */
         .ascii "FEC ethernet"
         .align 2
aaaa:
           xor r2,r2,r2  /* clear register R2 */
            mtmsr r2      /* clear the MSR register */
           mtspr DER, r2  /* clear the debug enable register */
           mtspr ICR, r2  /* clear the interrupt cause register */
	/* disable instruction and data caches */
        isync
	lis	p1, HIADJ ( CACHE_CMD_DISABLE)		/* load disable cmd */
	addi	p1, p1, LO (CACHE_CMD_DISABLE)
	mtspr	IC_CST, p1				/* Disable I cache */
	mtspr	DC_CST, p1				/* Disable D cache */

	/* unlock instruction and data caches */

	lis     p1, HIADJ ( CACHE_CMD_UNLOCK_ALL)	/* load unlock cmd */
	addi	p1, p1, LO (CACHE_CMD_UNLOCK_ALL)
        mtspr   IC_CST, p1				/* Unlock I cache */
        mtspr   DC_CST, p1				/* Unlock D cache */

	/* invalidate instruction and data caches */

        lis     p1, HIADJ ( CACHE_CMD_INVALIDATE)	/* load invalidate cmd*/
	addi	p1, p1, LO (CACHE_CMD_INVALIDATE)
        mtspr   IC_CST, p1				/* Invalidate I cache */
        mtspr   DC_CST, p1				/* Invalidate D cache */

       tlbia
 	/* initialize Small Data Area (SDA) start address */
 
#if	FALSE				/* XXX TPR SDA not supported yet */
	lis     r2, HIADJ( _SDA2_BASE_)
 	addi    r2, r2, LO(_SDA2_BASE_)
 
 	lis     r13, HIADJ ( _SDA_BASE_)
 	addi    r13, r13, LO(_SDA_BASE_)
#endif
 
	/* initialize the stack pointer */
	
	lis     sp, HIADJ( RAM_LOW_ADRS)
	addi    sp, sp, LO(RAM_LOW_ADRS)

	/* set the default boot code */
	
	lis	r3, HIADJ( BOOT_WARM_AUTOBOOT)
	addi	r3, r3, LO(BOOT_WARM_AUTOBOOT)

	/* jump to usrInit */

	addi	sp, sp, -FRAMEBASESZ	/* get frame stack */
	b	usrInit			/* never returns - starts up kernel */

/*****************************************************************************
*
* sysInByte - reads a byte from an io address.
*
* This function reads a byte from a specified io address.
*
* RETURNS: byte from address.
*
* UINT8 sysInByte (UINT8 * dataPtr)
*/

sysInByte:

	/* Read byte from address */

	lbzx	r3,r0,r3

	/* Sync I/O operation */

	eieio

	/* Return to caller */

	bclr	20,0

/******************************************************************************
*
* sysOutByte - writes a byte to an io address.
*
* This function writes a byte to a specified io address.
*
* RETURNS: N/A
*
* void sysOutByte (UINT8 * dataPtr, UINT8 data)
*/

sysOutByte:

	/* Write a byte to address */

	stbx	r4,r0,r3

	/* Sync I/O operation */

	eieio

	/* Return to caller */
	bclr	20,0

/*****************************************************************************
*
* sysPciInByte - reads a byte from a PCI address.
*
* This function reads a byte from a specified io address.
* Note: 
* Since PCI on MBX appears as big-endian, we must do byte swapping on
* the byte reads and writes.
*
* RETURNS: byte from address.
*
* UINT8 sysPciInByte (UINT8 * dataPtr)
*/

sysPciInByte:

	/* Swap bytes in PCI space address */

	ori	r0,r3,3
	rlwinm	r3,r3,0,30,31
	subf	r3,r3,r0
	xor	r0,r0,r0

	/* Read byte from PCI space */

	lbzx	r3,r0,r3

	/* Sync I/O operation */

	eieio

	/* Return to caller */

	bclr	20,0

/******************************************************************************
*
* sysPciOutByte - writes a byte to a PCI address.
*
* This function writes a byte to a specified io address.
* Note: 
* Since PCI on MBX appears as big-endian, we must do byte swapping on
* the byte reads and writes.
*
* RETURNS: N/A
*
* void sysPciOutByte (UINT8 * dataPtr, UINT8 data)
*/

sysPciOutByte:

	/* Swap bytes in PCI space address */

	ori	r0,r3,3
	rlwinm	r3,r3,0,30,31
	subf	r3,r3,r0
	xor	r0,r0,r0

	/* Write a byte to PCI space */

	stbx	r4,r0,r3

	/* Sync I/O operation */

	eieio

	/* Return to caller */

	bclr	20,0

/*****************************************************************************
*
* sysPciInWord - reads a word from an io address.
*
* This function reads a word from a specified io address.
*
* RETURNS: word from address.
*
* UINT16 sysPciInWord (UINT16 * dataPtr)
*/

sysPciInWord:

        /* Swap words in PCI space address */

        ori     r0,r3,2
        rlwinm  r3,r3,0,30,31
        subf    r3,r3,r0
        xor     r0,r0,r0

        /* Read word from PCI space */

        lhzx    r3,r0,r3

        /* Sync I/O operation */

        eieio

        /* Return to caller */

        bclr    20,0

/******************************************************************************
*
* sysPciOutWord - writes a word to an io address.
*
* This function writes a word to a specified io address.
*
* RETURNS: N/A
*
* void sysPciOutWord (UINT16 * dataPtr, UINT16 data)
*/

sysPciOutWord:

        /* Swap words in PCI space address */

        ori     r0,r3,2
        rlwinm  r3,r3,0,30,31
        subf    r3,r3,r0
        xor     r0,r0,r0

        /* Write a word to PCI space */

        sthx    r4,r0,r3

        /* Sync I/O operation */

        eieio

        /* Return to caller */

        bclr    20,0

/*****************************************************************************
*
* sysInWord - reads a word (16-bit big-endian) from an io address.
*
* This function reads a word from a specified io address.
*
* Note: 
* PCI on MBX appears as big-endian also (no byte swapping is needed).
*
* RETURNS: 16 bit word from read from address
*
* UINT16 sysInWord (UINT16 * dataPtr)
*/

sysInWord:

	/* Read word from address */

	lhzx	r3,r0,r3

	/* Sync I/O operation */

	eieio

	/* Return to caller */

	bclr	20,0

/*****************************************************************************
*
* sysInWordRev - reads a word (16-bit byte reversed) from an io address.
*
* This function reads a word from a specified io address and reverses the
* bytes.
*
* RETURNS: 16 bit word (byte swapped) read from address
*
* UINT16 sysInWordRev (UINT16 * dataPtr)
*/

sysInWordRev:

        /* Read word from address */

        lhbrx    r3,r0,r3

        /* Sync I/O operation */

        eieio

        /* Return to caller */

        bclr    20,0

/******************************************************************************
*
* sysOutWord - writes a word (16-bit big-endian) to an io address.
*
* This function writes a word to a specified io address.
*
* Note: 
* PCI on MBX appears as big-endian also (no byte swapping is needed).
*
* RETURNS: N/A
*
* void sysOutWord (UINT16 * dataPtr, UINT16 data)
*/

sysOutWord:

	/* Write a word to address */

	sthx	r4,r0,r3

	/* Sync I/O operation */

	eieio

	/* Return to caller */

	bclr	20,0

/*****************************************************************************
*
* sysInLong - reads a long (32-bit big-endian) from an io address.
*
* This function reads a long from a specified io address.
*
* Note: 
* PCI on MBX appears as big-endian also (no byte swapping is needed).
*
* RETURNS: long (32-bit big-endian) from address
*
* UINT32 sysInLong ( UINT32 * dataPtr)
*/

sysInLong:

	/* Read long from address */

	lwzx	r3,r0,r3

	/* Sync I/O operation */

	eieio

	/* Return to caller */

	bclr	20,0

/******************************************************************************
*
* sysOutLong - writes a long (32-bit big-endian) to an io address.
*
* This function writes a long to a specified io address.
*
* Note: 
* PCI on MBX appears as big-endian also (no byte swapping is needed).
*
* RETURNS: N/A
*
* void sysOutLong (UINT32 * dataPtr, UINT32 data)
*/

sysOutLong:

	/* Write a long to address */

	stwx	r4,r0,r3

	/* Sync I/O operation */

	eieio

	/* Return to caller */

	bclr	20,0

/*******************************************************************************
*
* sysPciErr - Error return for PCI exception trap handler
*
* This routine is called from sysPciTrap if the PCI configuration access
* generates an exception.  This code sets the return value to -1.
*
* NOTE:  
* The QSpan PCI Bridge causes machine check exceptions to
* occur when a non-present device address is put into the
* configuration register.
*
* NOMANUAL
*/

sysPciErr:
	li	p0, -1
	blr

/*******************************************************************************
*
* sysDecGet - return the decrementer contents
*
* This routine will return the current contents of the
* decrementer register (MPU.SPR22)
#
* RETURNS: decrementer contents
*
* NOMANUAL
*/

sysDecGet:
	mfspr	r3,22		/* load decrementer contents */

	/* Return to caller */

	bclr	20,0

/*******************************************************************************
*
* sysUioRead - this function reads a register from the UIO chip
*
* CALL:
*       sysUioRead(deviceAddress, registerIndex)
*       r3 = deviceAddress
*       r4 = registerIndex
*
* RETURNS: r3 = registerValue
*/
        .text
        .align  2
sysUioRead:
        stb     r4,0(r3)        /* write index register with register offset */
        eieio
        sync
        lbz     r3,1(r3)        /* retrieve specified reg offset contents */
        eieio
        sync
        bclr    20,0            /* return to caller */

/*******************************************************************************
*
* sysUioWrite - this function writes a register to the UIO chip
*
* CALL:
*       sysUioWrite(deviceAddress, registerIndex, registerValue)
*       r3 = deviceAddress
*       r4 = registerIndex
*       r5 = registerValue
*
* RETURNS: N/A
*/
        .text
        .align  2
sysUioWrite:
        stb     r4,0(r3)        /* write index register with register offset */
        eieio
        sync
        stb     r5,1(r3)        /* 1st write */
        eieio
        sync
        stb     r5,1(r3)        /* 2nd write */
        eieio
        sync
        bclr    20,0            /* return to caller */