eepro.c

GNU Mach 微内核源代码, 基于美国卡内基美隆大学的 Mach 研究项目

/* eepro.c: Intel EtherExpress Pro/10 device driver for Linux. */
/*
	Written 1994-1998 by Bao C. Ha.

	Copyright (C) 1994-1998 by Bao C. Ha.

	This software may be used and distributed
	according to the terms of the GNU Public License,
	incorporated herein by reference.

	The author may be reached at [e-mail] 
	or Hacom, 2477 Wrightsboro Rd., Augusta, GA 30904.

	Things remaining to do:
	Better record keeping of errors.
	Eliminate transmit interrupt to reduce overhead.
	Implement "concurrent processing". I won't be doing it!

	Bugs:

	If you have a problem of not detecting the 82595 during a
	reboot (warm reset), disable the FLASH memory should fix it.
	This is a compatibility hardware problem.

	Versions:

	0.10c	Some cosmetic changes. (9/28/98, BCH)

        0.10b	Should work now with (some) Pro/10+. At least for 
        	me (and my two cards) it does. _No_ guarantee for 
        	function with non-Pro/10+ cards! (don't have any)
        	(RMC, 9/11/96)

	0.10	Added support for the Etherexpress Pro/10+.  The
		IRQ map was changed significantly from the old
		pro/10.  The new interrupt map was provided by
		Rainer M. Canavan ([e-mail]).
		(BCH, 9/3/96)

	0.09	Fixed a race condition in the transmit algorithm,
		which causes crashes under heavy load with fast
		pentium computers.  The performance should also
		improve a bit.  The size of RX buffer, and hence
		TX buffer, can also be changed via lilo or insmod.
		(BCH, 7/31/96)

	0.08	Implement 32-bit I/O for the 82595TX and 82595FX
		based lan cards.  Disable full-duplex mode if TPE
		is not used.  (BCH, 4/8/96)

	0.07a	Fix a stat report which counts every packet as a
		heart-beat failure. (BCH, 6/3/95)

	0.07	Modified to support all other 82595-based lan cards.  
		The IRQ vector of the EtherExpress Pro will be set
		according to the value saved in the EEPROM.  For other
		cards, I will do autoirq_request() to grab the next
		available interrupt vector. (BCH, 3/17/95)

	0.06a,b	Interim released.  Minor changes in the comments and
		print out format. (BCH, 3/9/95 and 3/14/95)

	0.06	First stable release that I am comfortable with. (BCH,
		3/2/95)	

	0.05	Complete testing of multicast. (BCH, 2/23/95)	

	0.04	Adding multicast support. (BCH, 2/14/95)	

	0.03	First widely alpha release for public testing. 
		(BCH, 2/14/95)	

*/

static const char *version =
	"eepro.c: v0.10c 9/28/98 Bao C. Ha ([e-mail])\n";

#include <linux/module.h>

/*
  Sources:

	This driver wouldn't have been written without the availability 
	of the Crynwr's Lan595 driver source code.  It helps me to 
	familiarize with the 82595 chipset while waiting for the Intel 
	documentation.  I also learned how to detect the 82595 using 
	the packet driver's technique.

	This driver is written by cutting and pasting the skeleton.c driver
	provided by Donald Becker.  I also borrowed the EEPROM routine from
	Donald Becker's 82586 driver.

	Datasheet for the Intel 82595 (including the TX and FX version). It 
	provides just enough info that the casual reader might think that it 
	documents the i82595.

	The User Manual for the 82595.  It provides a lot of the missing
	information.

*/

#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/fcntl.h>
#include <linux/interrupt.h>
#include <linux/ptrace.h>
#include <linux/ioport.h>
#include <linux/in.h>
#include <linux/malloc.h>
#include <linux/string.h>
#include <asm/system.h>
#include <asm/bitops.h>
#include <asm/io.h>
#include <asm/dma.h>
#include <linux/errno.h>

#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>

/* First, a few definitions that the brave might change. */

/* A zero-terminated list of I/O addresses to be probed. */
static unsigned int eepro_portlist[] =
   { 0x300, 0x240, 0x280, 0x2C0, 0x200, 0x320, 0x340, 0x360, 0};

/* use 0 for production, 1 for verification, >2 for debug */

#ifndef NET_DEBUG
#define NET_DEBUG 1
#endif

static unsigned int net_debug = NET_DEBUG;

/* The number of low I/O ports used by the ethercard. */

#define EEPRO_IO_EXTENT	16

/* Different 82595 chips */

#define	LAN595		0
#define	LAN595TX	1
#define	LAN595FX	2

/* Information that need to be kept for each board. */
struct eepro_local {
	struct enet_statistics stats;
	unsigned rx_start;
	unsigned tx_start; /* start of the transmit chain */
	int tx_last;  /* pointer to last packet in the transmit chain */
	unsigned tx_end;   /* end of the transmit chain (plus 1) */
	int eepro;	/* 1 for the EtherExpress Pro/10,
			   2 for the EtherExpress Pro/10+,
			   0 for other 82595-based lan cards. */
	int version;	/* a flag to indicate if this is a TX or FX
				   version of the 82595 chip. */
	int stepping;
};

/* The station (ethernet) address prefix, used for IDing the board. */

#define SA_ADDR0 0x00	/* Etherexpress Pro/10 */
#define SA_ADDR1 0xaa
#define SA_ADDR2 0x00

#define SA2_ADDR0 0x00	/* Etherexpress Pro/10+ */
#define SA2_ADDR1 0xa0
#define SA2_ADDR2 0xc9

#define SA3_ADDR0 0x00	/* more Etherexpress Pro/10+ */
#define SA3_ADDR1 0xaa
#define SA3_ADDR2 0x00
#define SA3_ADDR3 0xc9

/* Index to functions, as function prototypes. */

extern int eepro_probe(struct device *dev);	

static int	eepro_probe1(struct device *dev, short ioaddr);
static int	eepro_open(struct device *dev);
static int	eepro_send_packet(struct sk_buff *skb, struct device *dev);
static void	eepro_interrupt(int irq, void *dev_id, struct pt_regs *regs);
static void 	eepro_rx(struct device *dev);
static void 	eepro_transmit_interrupt(struct device *dev);
static int	eepro_close(struct device *dev);
static struct enet_statistics *eepro_get_stats(struct device *dev);
static void set_multicast_list(struct device *dev);

static int read_eeprom(int ioaddr, int location);
static void hardware_send_packet(struct device *dev, void *buf, short length);
static int	eepro_grab_irq(struct device *dev);

/*
  			Details of the i82595.

You will need either the datasheet or the user manual to understand what
is going on here.  The 82595 is very different from the 82586, 82593.

The receive algorithm in eepro_rx() is just an implementation of the
RCV ring structure that the Intel 82595 imposes at the hardware level.
The receive buffer is set at 24K, and the transmit buffer is 8K.  I
am assuming that the total buffer memory is 32K, which is true for the
Intel EtherExpress Pro/10.  If it is less than that on a generic card,
the driver will be broken.

The transmit algorithm in the hardware_send_packet() is similar to the
one in the eepro_rx().  The transmit buffer is a ring linked list.
I just queue the next available packet to the end of the list.  In my
system, the 82595 is so fast that the list seems to always contain a
single packet.  In other systems with faster computers and more congested
network traffics, the ring linked list should improve performance by
allowing up to 8K worth of packets to be queued.

The sizes of the receive and transmit buffers can now be changed via lilo 
or insmod.  Lilo uses the appended line "ether=io,irq,debug,rx-buffer,eth0"
where rx-buffer is in KB unit.  Modules uses the parameter mem which is
also in KB unit, for example "insmod io=io-address irq=0 mem=rx-buffer."  
The receive buffer has to be more than 3K or less than 29K.  Otherwise,
it is reset to the default of 24K, and, hence, 8K for the trasnmit
buffer (transmit-buffer = 32K - receive-buffer).

*/

#define	RAM_SIZE	0x8000
#define	RCV_HEADER	8
#define RCV_RAM         0x6000  /* 24KB default for RCV buffer */
#define RCV_LOWER_LIMIT 0x00    /* 0x0000 */

/* #define RCV_UPPER_LIMIT ((RCV_RAM - 2) >> 8) */    /* 0x5ffe */
#define RCV_UPPER_LIMIT (((rcv_ram) - 2) >> 8)   

/* #define XMT_RAM         (RAM_SIZE - RCV_RAM) */    /* 8KB for XMT buffer */
#define XMT_RAM         (RAM_SIZE - (rcv_ram))    /* 8KB for XMT buffer */

/* #define XMT_LOWER_LIMIT (RCV_RAM >> 8) */  /* 0x6000 */
#define XMT_LOWER_LIMIT ((rcv_ram) >> 8) 
#define XMT_UPPER_LIMIT ((RAM_SIZE - 2) >> 8)   /* 0x7ffe */
#define	XMT_HEADER	8

#define	RCV_DONE	0x0008
#define	RX_OK		0x2000
#define	RX_ERROR	0x0d81

#define	TX_DONE_BIT	0x0080
#define	CHAIN_BIT	0x8000
#define	XMT_STATUS	0x02
#define	XMT_CHAIN	0x04
#define	XMT_COUNT	0x06

#define	BANK0_SELECT	0x00		
#define	BANK1_SELECT	0x40		
#define	BANK2_SELECT	0x80		

/* Bank 0 registers */

#define	COMMAND_REG	0x00	/* Register 0 */
#define	MC_SETUP	0x03
#define	XMT_CMD		0x04
#define	DIAGNOSE_CMD	0x07
#define	RCV_ENABLE_CMD	0x08
#define	RCV_DISABLE_CMD	0x0a
#define	STOP_RCV_CMD	0x0b
#define	RESET_CMD	0x0e
#define	POWER_DOWN_CMD	0x18
#define	RESUME_XMT_CMD	0x1c
#define	SEL_RESET_CMD	0x1e
#define	STATUS_REG	0x01	/* Register 1 */
#define	RX_INT		0x02
#define	TX_INT		0x04
#define	EXEC_STATUS	0x30
#define	ID_REG		0x02	/* Register 2	*/
#define	R_ROBIN_BITS	0xc0	/* round robin counter */
#define	ID_REG_MASK	0x2c
#define	ID_REG_SIG	0x24
#define	AUTO_ENABLE	0x10
#define	INT_MASK_REG	0x03	/* Register 3	*/
#define	RX_STOP_MASK	0x01
#define	RX_MASK		0x02
#define	TX_MASK		0x04
#define	EXEC_MASK	0x08
#define	ALL_MASK	0x0f
#define	IO_32_BIT	0x10
#define	RCV_BAR		0x04	/* The following are word (16-bit) registers */
#define	RCV_STOP	0x06
#define	XMT_BAR		0x0a
#define	HOST_ADDRESS_REG	0x0c
#define	IO_PORT		0x0e
#define	IO_PORT_32_BIT	0x0c

/* Bank 1 registers */

#define	REG1	0x01
#define	WORD_WIDTH	0x02
#define	INT_ENABLE	0x80
#define INT_NO_REG	0x02
#define	RCV_LOWER_LIMIT_REG	0x08
#define	RCV_UPPER_LIMIT_REG	0x09
#define	XMT_LOWER_LIMIT_REG	0x0a
#define	XMT_UPPER_LIMIT_REG	0x0b

/* Bank 2 registers */

#define	XMT_Chain_Int	0x20	/* Interrupt at the end of the transmit chain */
#define	XMT_Chain_ErrStop	0x40 /* Interrupt at the end of the chain even if there are errors */
#define	RCV_Discard_BadFrame	0x80 /* Throw bad frames away, and continue to receive others */
#define	REG2		0x02
#define	PRMSC_Mode	0x01
#define	Multi_IA	0x20
#define	REG3		0x03
#define	TPE_BIT		0x04
#define	BNC_BIT		0x20
#define	REG13		0x0d
#define	FDX		0x00
#define	A_N_ENABLE	0x02

#define	I_ADD_REG0	0x04
#define	I_ADD_REG1	0x05
#define	I_ADD_REG2	0x06
#define	I_ADD_REG3	0x07
#define	I_ADD_REG4	0x08
#define	I_ADD_REG5	0x09

#define EEPROM_REG 0x0a
#define EESK 0x01
#define EECS 0x02
#define EEDI 0x04
#define EEDO 0x08

/* Check for a network adaptor of this type, and return '0' if one exists.

   If dev->base_addr == 0, probe all likely locations.
   If dev->base_addr == 1, always return failure.
   If dev->base_addr == 2, allocate space for the device and return success
   (detachable devices only).

   */

#ifdef HAVE_DEVLIST

/* Support for a alternate probe manager, which will eliminate the
   boilerplate below. */

struct netdev_entry netcard_drv =
{"eepro", eepro_probe1, EEPRO_IO_EXTENT, eepro_portlist};

#else

int 
eepro_probe(struct device *dev)
{
	int i;
	int base_addr = dev ? dev->base_addr : 0;

	if (base_addr > 0x1ff)		/* Check a single specified location. */
		return eepro_probe1(dev, base_addr);
	else if (base_addr != 0)	/* Don't probe at all. */
		return ENXIO;

	for (i = 0; eepro_portlist[i]; i++) {
		int ioaddr = eepro_portlist[i];
		if (check_region(ioaddr, EEPRO_IO_EXTENT))
			continue;

		if (eepro_probe1(dev, ioaddr) == 0)
			return 0;
	}

	return ENODEV;
}
#endif

/* This is the real probe routine.  Linux has a history of friendly device
   probes on the ISA bus.  A good device probes avoids doing writes, and
   verifies that the correct device exists and functions.  */

int 
eepro_probe1(struct device *dev, short ioaddr)
{
	unsigned short station_addr[6], id, counter;
	int i;
	int eepro;
	const char *ifmap[] = {"AUI", "10Base2", "10BaseT"};
	enum iftype { AUI=0, BNC=1, TPE=2 };

	/* Now, we are going to check for the signature of the
	   ID_REG (register 2 of bank 0) */
	if (((id=inb(ioaddr + ID_REG)) & ID_REG_MASK) == ID_REG_SIG) {

		/* We seem to have the 82595 signature, let's
		   play with its counter (last 2 bits of
		   register 2 of bank 0) to be sure. */

		counter = (id & R_ROBIN_BITS);	
		if (((id=inb(ioaddr+ID_REG)) & R_ROBIN_BITS) == 
			(counter + 0x40)) {

			/* Yes, the 82595 has been found */

			/* Now, get the ethernet hardware address from
			   the EEPROM */

			station_addr[0] = read_eeprom(ioaddr, 2);
			station_addr[1] = read_eeprom(ioaddr, 3);
			station_addr[2] = read_eeprom(ioaddr, 4);

			/* Check the station address for the manufacturer's code */

			if ((station_addr[2] == 0x00aa) && (station_addr[1]!= 0x00c9)) {
				eepro = 1;
				printk("%s: Intel EtherExpress Pro/10 ISA at %#x,", 
					dev->name, ioaddr);
			} else
			if ( (station_addr[2] == 0x00a0)
			     || ((station_addr[2] == 0x00aa) && (station_addr[1] == 0x00c9) )) {
				eepro = 2;
				printk("%s: Intel EtherExpress Pro/10+ ISA\n at %#x,", 
					dev->name, ioaddr);
			}
			else {
				eepro = 0;
				printk("%s: Intel 82595-based lan card at %#x,", 
					dev->name, ioaddr);
			}

   			/* Fill in the 'dev' fields. */
			dev->base_addr = ioaddr;

			for (i=0; i < 6; i++) {
				dev->dev_addr[i] = ((unsigned char *) station_addr)[5-i];
				printk("%c%02x", i ? ':' : ' ', dev->dev_addr[i]);
			}

			if ((dev->mem_end & 0x3f) < 3 ||	/* RX buffer must be more than 3K */
				(dev->mem_end & 0x3f) > 29)	/* and less than 29K */
				dev->mem_end = RCV_RAM;		/* or it will be set to 24K */
			else dev->mem_end = 1024*dev->mem_end;  /* Maybe I should shift << 10 */

			/* From now on, dev->mem_end contains the actual size of rx buffer */

			if (net_debug > 3)
				printk(", %dK RCV buffer", (int)(dev->mem_end)/1024);

			outb(BANK2_SELECT, ioaddr); /* be CAREFUL, BANK 2 now */
			id = inb(ioaddr + REG3);
			if (id & TPE_BIT)
				dev->if_port = TPE;
			else dev->if_port = BNC;

			if (net_debug>3) 
				printk("id: %x\n", id);

			if (dev->irq < 2 && eepro) {
				i = read_eeprom(ioaddr, 1);
				if (eepro == 1)
				   switch (i & 0x07) {
					case 0:	dev->irq = 9; break;
					case 1:	dev->irq = 3; break;
					case 2:	dev->irq = 5; break;
					case 3:	dev->irq = 10; break;
					case 4:	dev->irq = 11; break;
					default: /* should never get here !!!!! */
						printk(" illegal interrupt vector stored in EEPROM.\n");
						return ENODEV;
					}
				else switch (i & 0x07) {
					case 0:	dev->irq = 3; break;
					case 1:	dev->irq = 4; break;
					case 2:	dev->irq = 5; break;
					case 3:	dev->irq = 7; break;