eth16i.c

GNU Mach 微内核源代码, 基于美国卡内基美隆大学的 Mach 研究项目

/* eth16i.c An ICL EtherTeam 16i and 32 EISA ethernet driver for Linux

   Written 1994-1998 by Mika Kuoppala

   Copyright (C) 1994-1998 by Mika Kuoppala
   Based on skeleton.c and heavily on at1700.c by Donald Becker

   This software may be used and distributed according to the terms
   of the GNU Public Licence, incorporated herein by reference.

   The author may be reached as [e-mail]

   This driver supports following cards :
	- ICL EtherTeam 16i
	- ICL EtherTeam 32 EISA
	  (Uses true 32 bit transfers rather than 16i compability mode)

   Example Module usage:
        insmod eth16i.o ioaddr=0x2a0 mediatype=bnc

	mediatype can be one of the following: bnc,tp,dix,auto,eprom

	'auto' will try to autoprobe mediatype.
	'eprom' will use whatever type defined in eprom.

   I have benchmarked driver with PII/300Mhz as a ftp client
   and 486/33Mhz as a ftp server. Top speed was 1128.37 kilobytes/sec.

   Sources:
     - skeleton.c  a sample network driver core for linux,
       written by Donald Becker <[e-mail]>
     - at1700.c a driver for Allied Telesis AT1700, written
       by Donald Becker.
     - e16iSRV.asm a Netware 3.X Server Driver for ICL EtherTeam16i
       written by Markku Viima
     - The Fujitsu MB86965 databook.

   Author thanks following persons due to their valueble assistance:
        Markku Viima (ICL)
	Ari Valve (ICL)
	Donald Becker
	Kurt Huwig <[e-mail]>

   Revision history:

   Version	Date		Description

   0.01         15.12-94        Initial version (card detection)
   0.02         23.01-95        Interrupt is now hooked correctly
   0.03         01.02-95        Rewrote initialization part
   0.04         07.02-95        Base skeleton done...
                                Made a few changes to signature checking
                                to make it a bit reliable.
                                - fixed bug in tx_buf mapping
                                - fixed bug in initialization (DLC_EN
                                  wasn't enabled when initialization
                                  was done.)
   0.05         08.02-95        If there were more than one packet to send,
                                transmit was jammed due to invalid
                                register write...now fixed
   0.06         19.02-95        Rewrote interrupt handling
   0.07         13.04-95        Wrote EEPROM read routines
                                Card configuration now set according to
                                data read from EEPROM
   0.08         23.06-95        Wrote part that tries to probe used interface
                                port if AUTO is selected

   0.09         01.09-95        Added module support

   0.10         04.09-95        Fixed receive packet allocation to work
                                with kernels > 1.3.x

   0.20		20.09-95	Added support for EtherTeam32 EISA

   0.21         17.10-95        Removed the unnecessary extern
				init_etherdev() declaration. Some
				other cleanups.

   0.22		22.02-96	Receive buffer was not flushed
				correctly when faulty packet was
				received. Now fixed.

   0.23		26.02-96	Made resetting the adapter
			 	more reliable.

   0.24		27.02-96	Rewrote faulty packet handling in eth16i_rx

   0.25		22.05-96	kfree() was missing from cleanup_module.

   0.26		11.06-96	Sometimes card was not found by
				check_signature(). Now made more reliable.

   0.27		23.06-96	Oops. 16 consecutive collisions halted
				adapter. Now will try to retransmit
				MAX_COL_16 times before finally giving up.

   0.28	        28.10-97	Added dev_id parameter (NULL) for free_irq

   0.29         29.10-97        Multiple card support for module users

   0.30         30.10-97        Fixed irq allocation bug.
                                (request_irq moved from probe to open)

   0.30a        21.08-98        Card detection made more relaxed. Driver
                                had problems with some TCP/IP-PROM boots
				to find the card. Suggested by
				Kurt Huwig <[e-mail]>

   0.31         28.08-98        Media interface port can now be selected
                                with module parameters or kernel
				boot parameters.

   0.32         31.08-98        IRQ was never freed if open/close
                                pair wasn't called. Now fixed.

   0.33         10.09-98        When eth16i_open() was called after
                                eth16i_close() chip never recovered.
				Now more shallow reset is made on
				close.

   Bugs:
	In some cases the media interface autoprobing code doesn't find
	the correct interface type. In this case you can
	manually choose the interface type in DOS with E16IC.EXE which is
	configuration software for EtherTeam16i and EtherTeam32 cards.
	This is also true for IRQ setting. You cannot use module
	parameter to configure IRQ of the card (yet).

   To do:
	- Real multicast support
	- Rewrite the media interface autoprobing code. Its _horrible_ !
	- Possibly merge all the MB86965 specific code to external
	  module for use by eth16.c and Donald's at1700.c
	- IRQ configuration with module parameter. I will do
	  this when i will get enough info about setting
	  irq without configuration utility.
*/

static char *version =
    "eth16i.c: v0.33 10-09-98 Mika Kuoppala ([e-mail])\n";

#include <linux/module.h>

#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/types.h>
#include <linux/fcntl.h>
#include <linux/interrupt.h>
#include <linux/ptrace.h>
#include <linux/ioport.h>
#include <linux/in.h>
#include <linux/malloc.h>
#include <linux/string.h>
#include <linux/errno.h>

#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>

#include <asm/system.h>
#include <asm/bitops.h>
#include <asm/io.h>
#include <asm/dma.h>

#ifndef LINUX_VERSION_CODE
#include <linux/version.h>
#endif

#if LINUX_VERSION_CODE >= 0x20123
#include <linux/init.h>
#else
#define __init
#define __initdata
#define __initfunc(x) x
#endif

#if LINUX_VERSION_CODE < 0x20138
#define test_and_set_bit(val,addr) set_bit(val,addr)
#endif

#if LINUX_VERSION_CODE < 0x020100
typedef struct enet_statistics eth16i_stats_type;
#else
typedef struct net_device_stats eth16i_stats_type;
#endif

/* Few macros */
#define BIT(a)		       ( (1 << (a)) )
#define BITSET(ioaddr, bnum)   ((outb(((inb(ioaddr)) | (bnum)), ioaddr)))
#define BITCLR(ioaddr, bnum)   ((outb(((inb(ioaddr)) & (~(bnum))), ioaddr)))

/* This is the I/O address space for Etherteam 16i adapter. */
#define ETH16I_IO_EXTENT       32

/* Ticks before deciding that transmit has timed out */
#define TX_TIMEOUT             (400*HZ/1000)

/* Maximum loop count when receiving packets */
#define MAX_RX_LOOP            20

/* Some interrupt masks */
#define ETH16I_INTR_ON	       0xef8a       /* Higher is receive mask */
#define ETH16I_INTR_OFF	       0x0000

/* Buffers header status byte meanings */
#define PKT_GOOD               BIT(5)
#define PKT_GOOD_RMT           BIT(4)
#define PKT_SHORT              BIT(3)
#define PKT_ALIGN_ERR          BIT(2)
#define PKT_CRC_ERR            BIT(1)
#define PKT_RX_BUF_OVERFLOW    BIT(0)

/* Transmit status register (DLCR0) */
#define TX_STATUS_REG          0
#define TX_DONE                BIT(7)
#define NET_BUSY               BIT(6)
#define TX_PKT_RCD             BIT(5)
#define CR_LOST                BIT(4)
#define TX_JABBER_ERR	       BIT(3)
#define COLLISION              BIT(2)
#define COLLISIONS_16          BIT(1)

/* Receive status register (DLCR1) */
#define RX_STATUS_REG          1
#define RX_PKT                 BIT(7)  /* Packet received */
#define BUS_RD_ERR             BIT(6)
#define SHORT_PKT_ERR          BIT(3)
#define ALIGN_ERR              BIT(2)
#define CRC_ERR                BIT(1)
#define RX_BUF_OVERFLOW        BIT(0)

/* Transmit Interrupt Enable Register (DLCR2) */
#define TX_INTR_REG            2
#define TX_INTR_DONE           BIT(7)
#define TX_INTR_COL            BIT(2)
#define TX_INTR_16_COL         BIT(1)

/* Receive Interrupt Enable Register (DLCR3) */
#define RX_INTR_REG            3
#define RX_INTR_RECEIVE        BIT(7)
#define RX_INTR_SHORT_PKT      BIT(3)
#define RX_INTR_CRC_ERR        BIT(1)
#define RX_INTR_BUF_OVERFLOW   BIT(0)

/* Transmit Mode Register (DLCR4) */
#define TRANSMIT_MODE_REG      4
#define LOOPBACK_CONTROL       BIT(1)
#define CONTROL_OUTPUT         BIT(2)

/* Receive Mode Register (DLCR5) */
#define RECEIVE_MODE_REG       5
#define RX_BUFFER_EMPTY        BIT(6)
#define ACCEPT_BAD_PACKETS     BIT(5)
#define RECEIVE_SHORT_ADDR     BIT(4)
#define ACCEPT_SHORT_PACKETS   BIT(3)
#define REMOTE_RESET           BIT(2)

#define ADDRESS_FILTER_MODE    BIT(1) | BIT(0)
#define REJECT_ALL             0
#define ACCEPT_ALL             3
#define MODE_1                 1            /* NODE ID, BC, MC, 2-24th bit */
#define MODE_2                 2            /* NODE ID, BC, MC, Hash Table */

/* Configuration Register 0 (DLCR6) */
#define CONFIG_REG_0           6
#define DLC_EN                 BIT(7)
#define SRAM_CYCLE_TIME_100NS  BIT(6)
#define SYSTEM_BUS_WIDTH_8     BIT(5)       /* 1 = 8bit, 0 = 16bit */
#define BUFFER_WIDTH_8         BIT(4)       /* 1 = 8bit, 0 = 16bit */
#define TBS1                   BIT(3)
#define TBS0                   BIT(2)
#define SRAM_BS1               BIT(1)       /* 00=8kb,  01=16kb  */
#define SRAM_BS0               BIT(0)       /* 10=32kb, 11=64kb  */

#ifndef ETH16I_TX_BUF_SIZE                   /* 0 = 2kb, 1 = 4kb  */
#define ETH16I_TX_BUF_SIZE     3             /* 2 = 8kb, 3 = 16kb */
#endif
#define TX_BUF_1x2048          0
#define TX_BUF_2x2048          1
#define TX_BUF_2x4098          2
#define TX_BUF_2x8192          3

/* Configuration Register 1 (DLCR7) */
#define CONFIG_REG_1           7
#define POWERUP                BIT(5)

/* Transmit start register */
#define TRANSMIT_START_REG     10
#define TRANSMIT_START_RB      2
#define TX_START               BIT(7)       /* Rest of register bit indicate*/
                                            /* number of packets in tx buffer*/
/* Node ID registers (DLCR8-13) */
#define NODE_ID_0              8
#define NODE_ID_RB             0

/* Hash Table registers (HT8-15) */
#define HASH_TABLE_0           8
#define HASH_TABLE_RB          1

/* Buffer memory ports */
#define BUFFER_MEM_PORT_LB     8
#define DATAPORT               BUFFER_MEM_PORT_LB
#define BUFFER_MEM_PORT_HB     9

/* 16 Collision control register (BMPR11) */
#define COL_16_REG             11
#define HALT_ON_16             0x00
#define RETRANS_AND_HALT_ON_16 0x02

/* Maximum number of attempts to send after 16 concecutive collisions */
#define MAX_COL_16	       10

/* DMA Burst and Transceiver Mode Register (BMPR13) */
#define TRANSCEIVER_MODE_REG   13
#define TRANSCEIVER_MODE_RB    2
#define IO_BASE_UNLOCK	       BIT(7)
#define LOWER_SQUELCH_TRESH    BIT(6)
#define LINK_TEST_DISABLE      BIT(5)
#define AUI_SELECT             BIT(4)
#define DIS_AUTO_PORT_SEL      BIT(3)

/* Filter Self Receive Register (BMPR14)  */
#define FILTER_SELF_RX_REG     14
#define SKIP_RX_PACKET         BIT(2)
#define FILTER_SELF_RECEIVE    BIT(0)

/* EEPROM Control Register (BMPR 16) */
#define EEPROM_CTRL_REG        16

/* EEPROM Data Register (BMPR 17) */
#define EEPROM_DATA_REG        17

/* NMC93CSx6 EEPROM Control Bits */
#define CS_0                   0x00
#define CS_1                   0x20
#define SK_0                   0x00
#define SK_1                   0x40
#define DI_0                   0x00
#define DI_1                   0x80

/* NMC93CSx6 EEPROM Instructions */
#define EEPROM_READ            0x80

/* NMC93CSx6 EEPROM Addresses */
#define E_NODEID_0             0x02
#define E_NODEID_1             0x03
#define E_NODEID_2             0x04
#define E_PORT_SELECT          0x14
  #define E_PORT_BNC           0x00
  #define E_PORT_DIX           0x01
  #define E_PORT_TP            0x02
  #define E_PORT_AUTO          0x03
  #define E_PORT_FROM_EPROM    0x04
#define E_PRODUCT_CFG          0x30


/* Macro to slow down io between EEPROM clock transitions */
#define eeprom_slow_io() do { int _i = 40; while(--_i > 0) { inb(0x80); }}while(0)

/* Jumperless Configuration Register (BMPR19) */
#define JUMPERLESS_CONFIG      19

/* ID ROM registers, writing to them also resets some parts of chip */
#define ID_ROM_0               24
#define ID_ROM_7               31
#define RESET                  ID_ROM_0

/* This is the I/O address list to be probed when seeking the card */
static unsigned int eth16i_portlist[] =
   { 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300, 0 };

static unsigned int eth32i_portlist[] =
   { 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000, 0x8000,
     0x9000, 0xA000, 0xB000, 0xC000, 0xD000, 0xE000, 0xF000, 0 };

/* This is the Interrupt lookup table for Eth16i card */
static unsigned int eth16i_irqmap[] = { 9, 10, 5, 15, 0 };
#define NUM_OF_ISA_IRQS    4

/* This is the Interrupt lookup table for Eth32i card */
static unsigned int eth32i_irqmap[] = { 3, 5, 7, 9, 10, 11, 12, 15, 0 };
#define EISA_IRQ_REG	0xc89
#define NUM_OF_EISA_IRQS   8

static unsigned int eth16i_tx_buf_map[] = { 2048, 2048, 4096, 8192 };
static unsigned int boot = 1;

/* Use 0 for production, 1 for verification, >2 for debug */
#ifndef ETH16I_DEBUG
#define ETH16I_DEBUG 0
#endif
static unsigned int eth16i_debug = ETH16I_DEBUG;

/* Information for each board */

struct eth16i_local {
	eth16i_stats_type stats;
	unsigned char     tx_started;
	unsigned char     tx_buf_busy;
	unsigned short    tx_queue;  /* Number of packets in transmit buffer */
	unsigned short    tx_queue_len;
	unsigned int      tx_buf_size;
	unsigned long     open_time;
	unsigned long     tx_buffered_packets;
	unsigned long     col_16;
};

/* Function prototypes */

extern int     eth16i_probe(struct device *dev);

static int     eth16i_probe1(struct device *dev, int ioaddr);
static int     eth16i_check_signature(int ioaddr);
static int     eth16i_probe_port(int ioaddr);
static void    eth16i_set_port(int ioaddr, int porttype);
static int     eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l);
static int     eth16i_receive_probe_packet(int ioaddr);
static int     eth16i_get_irq(int ioaddr);
static int     eth16i_read_eeprom(int ioaddr, int offset);
static int     eth16i_read_eeprom_word(int ioaddr);
static void    eth16i_eeprom_cmd(int ioaddr, unsigned char command);
static int     eth16i_open(struct device *dev);
static int     eth16i_close(struct device *dev);
static int     eth16i_tx(struct sk_buff *skb, struct device *dev);
static void    eth16i_rx(struct device *dev);
static void    eth16i_interrupt(int irq, void *dev_id, struct pt_regs *regs);
static void    eth16i_reset(struct device *dev);
static void    eth16i_skip_packet(struct device *dev);
static void    eth16i_multicast(struct device *dev);
static void    eth16i_select_regbank(unsigned char regbank, int ioaddr);
static void    eth16i_initialize(struct device *dev);

#if 0
static int     eth16i_set_irq(struct device *dev);
#endif

#ifdef MODULE
static ushort  eth16i_parse_mediatype(const char* s);
#endif

static struct enet_statistics *eth16i_get_stats(struct device *dev);

static char *cardname = "ICL EtherTeam 16i/32";

#ifdef HAVE_DEVLIST

/* Support for alternate probe manager */
/struct netdev_entry eth16i_drv =
 {"eth16i", eth16i_probe1, ETH16I_IO_EXTENT, eth16i_probe_list};

#else  /* Not HAVE_DEVLIST */

__initfunc(int eth16i_probe(struct device *dev))
{
	int i;
	int ioaddr;
	int base_addr = dev ? dev->base_addr : 0;

	if(eth16i_debug > 4)
		printk(KERN_DEBUG "Probing started for %s\n", cardname);

	if(base_addr > 0x1ff)           /* Check only single location */
		return eth16i_probe1(dev, base_addr);
	else if(base_addr != 0)         /* Don't probe at all */
		return ENXIO;

	/* Seek card from the ISA io address space */
	for(i = 0; (ioaddr = eth16i_portlist[i]) ; i++) {
		if(check_region(ioaddr, ETH16I_IO_EXTENT))
			continue;
		if(eth16i_probe1(dev, ioaddr) == 0)
			return 0;
	}

	/* Seek card from the EISA io address space */
	for(i = 0; (ioaddr = eth32i_portlist[i]) ; i++) {
		if(check_region(ioaddr, ETH16I_IO_EXTENT))
			continue;
		if(eth16i_probe1(dev, ioaddr) == 0)
			return 0;
	}

	return ENODEV;
}
#endif  /* Not HAVE_DEVLIST */

__initfunc(static int eth16i_probe1(struct device *dev, int ioaddr))
{
	static unsigned version_printed = 0;
	boot = 1;  /* To inform initilization that we are in boot probe */

	/*
	  The MB86985 chip has on register which holds information in which
	  io address the chip lies. First read this register and compare
	  it to our current io address and if match then this could
	  be our chip.
	  */

	if(ioaddr < 0x1000) {

		if(eth16i_portlist[(inb(ioaddr + JUMPERLESS_CONFIG) & 0x07)]
		   != ioaddr)
			return -ENODEV;
	}

	/* Now we will go a bit deeper and try to find the chip's signature */

	if(eth16i_check_signature(ioaddr) != 0)
		return -ENODEV;

	/*
	   Now it seems that we have found a ethernet chip in this particular
	   ioaddr. The MB86985 chip has this feature, that when you read a
	   certain register it will increase it's io base address to next
	   configurable slot. Now when we have found the chip, first thing is
	   to make sure that the chip's ioaddr will hold still here.
	   */

	eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
	outb(0x00, ioaddr + TRANSCEIVER_MODE_REG);

	outb(0x00, ioaddr + RESET);             /* Reset some parts of chip */
	BITSET(ioaddr + CONFIG_REG_0, BIT(7));  /* Disable the data link */

	if(dev == NULL)
		dev = init_etherdev(0, 0);

	if( (eth16i_debug & version_printed++) == 0)
		printk(KERN_INFO "%s", version);

	dev->base_addr = ioaddr;

#if 0
	if(dev->irq) {
		if(eth16i_set_irq(dev)) {