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📄 yellowfin.c

📁 GNU Mach 微内核源代码, 基于美国卡内基美隆大学的 Mach 研究项目
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/* yellowfin.c: A Packet Engines G-NIC ethernet driver for linux. *//*	Written 1997-1998 by Donald Becker.	This software may be used and distributed according to the terms	of the GNU Public License, incorporated herein by reference.	This driver is for the Packet Engines G-NIC PCI Gigabit Ethernet adapter.	It also supports the Symbios Logic version of the same chip core.	The author may be reached as becker@CESDIS.gsfc.nasa.gov, or C/O	Center of Excellence in Space Data and Information Sciences	   Code 930.5, Goddard Space Flight Center, Greenbelt MD 20771	Support and updates available at	http://cesdis.gsfc.nasa.gov/linux/drivers/yellowfin.html*/static const char *version = "yellowfin.c:v0.99A 4/7/98 becker@cesdis.gsfc.nasa.gov\n";/* A few user-configurable values. */static int max_interrupt_work = 20;static int min_pci_latency = 64;static int mtu = 0;#ifdef YF_PROTOTYPE			/* Support for prototype hardware errata. *//* System-wide count of bogus-rx frames. */static int bogus_rx = 0;static int dma_ctrl = 0x004A0263; 			/* Constrained by errata */static int fifo_cfg = 0x0020;				/* Bypass external Tx FIFO. */#elif YF_NEW					/* A future perfect board :->.  */static int dma_ctrl = 0x00CAC277;			/* Override when loading module! */static int fifo_cfg = 0x0028;#elsestatic int dma_ctrl = 0x004A0263; 			/* Constrained by errata */static int fifo_cfg = 0x0020;				/* Bypass external Tx FIFO. */#endif/* Set the copy breakpoint for the copy-only-tiny-frames scheme.   Setting to > 1518 effectively disables this feature. */static const int rx_copybreak = 100;/* Keep the ring sizes a power of two for efficiency.   Making the Tx ring too large decreases the effectiveness of channel   bonding and packet priority.   There are no ill effects from too-large receive rings. */#define TX_RING_SIZE	16#define RX_RING_SIZE	32/* Operational parameters that usually are not changed. *//* Time in jiffies before concluding the transmitter is hung. */#define TX_TIMEOUT  ((2000*HZ)/1000)#include <linux/config.h>#ifdef MODULE#ifdef MODVERSIONS#include <linux/modversions.h>#endif#include <linux/module.h>#include <linux/version.h>#else#define MOD_INC_USE_COUNT#define MOD_DEC_USE_COUNT#endif#include <linux/kernel.h>#include <linux/sched.h>#include <linux/string.h>#include <linux/timer.h>#include <linux/ptrace.h>#include <linux/errno.h>#include <linux/ioport.h>#include <linux/malloc.h>#include <linux/interrupt.h>#include <linux/pci.h>#include <linux/bios32.h>#include <asm/processor.h>		/* Processor type for cache alignment. */#include <asm/bitops.h>#include <asm/io.h>#include <linux/netdevice.h>#include <linux/etherdevice.h>#include <linux/skbuff.h>/* Kernel compatibility defines, common to David Hind's PCMCIA package.   This is only in the support-all-kernels source code. */#include <linux/version.h>		/* Evil, but neccessary */#if defined (LINUX_VERSION_CODE) && LINUX_VERSION_CODE < 0x10300#define RUN_AT(x) (x)			/* What to put in timer->expires.  */#define DEV_ALLOC_SKB(len) alloc_skb(len, GFP_ATOMIC)#define virt_to_bus(addr)  ((unsigned long)addr)#define bus_to_virt(addr) ((void*)addr)#else  /* 1.3.0 and later */#define RUN_AT(x) (jiffies + (x))#define DEV_ALLOC_SKB(len) dev_alloc_skb(len + 2)#endif#if defined (LINUX_VERSION_CODE) && LINUX_VERSION_CODE < 0x10338#ifdef MODULE#if !defined(CONFIG_MODVERSIONS) && !defined(__NO_VERSION__)char kernel_version[] = UTS_RELEASE;#endif#else#undef MOD_INC_USE_COUNT#define MOD_INC_USE_COUNT#undef MOD_DEC_USE_COUNT#define MOD_DEC_USE_COUNT#endif#endif /* 1.3.38 */#if (LINUX_VERSION_CODE >= 0x10344)#define NEW_MULTICAST#include <linux/delay.h>#endif#if (LINUX_VERSION_CODE >= 0x20100)char kernel_version[] = UTS_RELEASE;#endif#ifdef SA_SHIRQ#define IRQ(irq, dev_id, pt_regs) (irq, dev_id, pt_regs)#else#define IRQ(irq, dev_id, pt_regs) (irq, pt_regs)#endif#if (LINUX_VERSION_CODE < 0x20123)#define test_and_set_bit(val, addr) set_bit(val, addr)#endifstatic const char *card_name = "Yellowfin G-NIC Gbit Ethernet";/* The PCI I/O space extent. */#define YELLOWFIN_TOTAL_SIZE 0x100#ifdef HAVE_DEVLISTstruct netdev_entry yellowfin_drv ={card_name, yellowfin_pci_probe, YELLOWFIN_TOTAL_SIZE, NULL};#endif#ifdef YELLOWFIN_DEBUGint yellowfin_debug = YELLOWFIN_DEBUG;#elseint yellowfin_debug = 1;#endif/*				Theory of OperationI. Board CompatibilityThis device driver is designed for the Packet Engines "Yellowfin" GigabitEthernet adapter.  The only PCA currently supported is the G-NIC 64-bitPCI card.II. Board-specific settingsPCI bus devices are configured by the system at boot time, so no jumpersneed to be set on the board.  The system BIOS preferably should assign thePCI INTA signal to an otherwise unused system IRQ line.Note: Kernel versions earlier than 1.3.73 do not support shared PCIinterrupt lines.III. Driver operationIIIa. Ring buffersThe Yellowfin uses the Descriptor Based DMA Architecture specified by Apple.This is a descriptor list scheme similar to that used by the EEPro100 andTulip.  This driver uses two statically allocated fixed-size descriptor listsformed into rings by a branch from the final descriptor to the beginning ofthe list.  The ring sizes are set at compile time by RX/TX_RING_SIZE.The driver allocates full frame size skbuffs for the Rx ring buffers atopen() time and passes the skb->data field to the Yellowfin as receive databuffers.  When an incoming frame is less than RX_COPYBREAK bytes long,a fresh skbuff is allocated and the frame is copied to the new skbuff.When the incoming frame is larger, the skbuff is passed directly up theprotocol stack and replaced by a newly allocated skbuff.The RX_COPYBREAK value is chosen to trade-off the memory wasted byusing a full-sized skbuff for small frames vs. the copying costs of largerframes.  For small frames the copying cost is negligible (esp. consideringthat we are pre-loading the cache with immediately useful headerinformation).  For large frames the copying cost is non-trivial, and thelarger copy might flush the cache of useful data.IIIC. SynchronizationThe driver runs as two independent, single-threaded flows of control.  Oneis the send-packet routine, which enforces single-threaded use by thedev->tbusy flag.  The other thread is the interrupt handler, which is singlethreaded by the hardware and other software.The send packet thread has partial control over the Tx ring and 'dev->tbusy'flag.  It sets the tbusy flag whenever it's queuing a Tx packet. If the nextqueue slot is empty, it clears the tbusy flag when finished otherwise it setsthe 'yp->tx_full' flag.The interrupt handler has exclusive control over the Rx ring and records statsfrom the Tx ring.  After reaping the stats, it marks the Tx queue entry asempty by incrementing the dirty_tx mark. Iff the 'yp->tx_full' flag is set, itclears both the tx_full and tbusy flags.IV. NotesThanks to Kim Stearns of Packet Engines for providing a pair of G-NIC boards.IVb. ReferencesYellowfin Engineering Design Specification, 4/23/97 Preliminary/Confidentialhttp://cesdis.gsfc.nasa.gov/linux/misc/100mbps.htmlIVc. ErrataSee Packet Engines confidential appendix.*//* A few values that may be tweaked. */#define PKT_BUF_SZ		1536			/* Size of each temporary Rx buffer.*/#ifndef PCI_VENDOR_ID_PKT_ENG		/* To be defined in linux/pci.h */#define PCI_VENDOR_ID_PKT_ENG			0x1000 /* Hmm, likely number.. */#define PCI_DEVICE_ID_YELLOWFIN			0x0702#endif/* The rest of these values should never change. */static void yellowfin_timer(unsigned long data);/* Offsets to the Yellowfin registers.  Various sizes and alignments. */enum yellowfin_offsets {	TxCtrl=0x00, TxStatus=0x04, TxPtr=0x0C,	TxIntrSel=0x10, TxBranchSel=0x14, TxWaitSel=0x18,	RxCtrl=0x40, RxStatus=0x44, RxPtr=0x4C,	RxIntrSel=0x50, RxBranchSel=0x54, RxWaitSel=0x58,	EventStatus=0x80, IntrEnb=0x82, IntrClear=0x84, IntrStatus=0x86,	ChipRev=0x8C, DMACtrl=0x90, Cnfg=0xA0, RxDepth=0xB8, FlowCtrl=0xBC,	AddrMode=0xD0, StnAddr=0xD2, HashTbl=0xD8, FIFOcfg=0xF8,};/* The Yellowfin Rx and Tx buffer descriptors. */struct yellowfin_desc {	u16 request_cnt;	u16 cmd;	u32 addr;	u32 branch_addr;	u16 result_cnt;	u16 status;};struct tx_status_words {	u16 tx_cnt;	u16 tx_errs;	u16 total_tx_cnt;	u16 paused;};/* Bits in yellowfin_desc.cmd */enum desc_cmd_bits {	CMD_TX_PKT=0x1000, CMD_RX_BUF=0x2000, CMD_TXSTATUS=0x3000,	CMD_NOP=0x6000, CMD_STOP=0x7000,	BRANCH_ALWAYS=0x0C, INTR_ALWAYS=0x30, WAIT_ALWAYS=0x03,	BRANCH_IFTRUE=0x04,};/* Bits in yellowfin_desc.status */enum desc_status_bits { RX_EOP=0x0040, };/* Bits in the interrupt status/mask registers. */enum intr_status_bits {	IntrRxDone=0x01, IntrRxInvalid=0x02, IntrRxPCIFault=0x04,IntrRxPCIErr=0x08,	IntrTxDone=0x10, IntrTxInvalid=0x20, IntrTxPCIFault=0x40,IntrTxPCIErr=0x80,	IntrEarlyRx=0x100, IntrWakeup=0x200, };struct yellowfin_private {	/* Descriptor rings first for alignment.  Tx requires a second descriptor	   for status. */	struct yellowfin_desc rx_ring[RX_RING_SIZE];	struct yellowfin_desc tx_ring[TX_RING_SIZE*2];	const char *product_name;	struct device *next_module;	/* The saved address of a sent-in-place packet/buffer, for skfree(). */	struct sk_buff* tx_skbuff[TX_RING_SIZE];	struct tx_status_words tx_status[TX_RING_SIZE];	/* The addresses of receive-in-place skbuffs. */	struct sk_buff* rx_skbuff[RX_RING_SIZE];	int chip_id;	struct enet_statistics stats;	struct timer_list timer;	/* Media selection timer. */	int in_interrupt;	unsigned int cur_rx, cur_tx;		/* The next free ring entry */	unsigned int dirty_rx, dirty_tx;	/* The ring entries to be free()ed. */	unsigned int tx_full:1;				/* The Tx queue is full. */	unsigned int full_duplex:1;			/* Full-duplex operation requested. */	unsigned int medialock:1;			/* Do not sense media. */	unsigned int default_port:4;		/* Last dev->if_port value. */	u32 pad[4];							/* Used for 32-byte alignment */};#ifdef MODULE/* Used to pass the media type, etc. */#define MAX_UNITS 8				/* More are supported, limit only on options */static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};#if LINUX_VERSION_CODE > 0x20115MODULE_AUTHOR("Donald Becker <becker@cesdis.gsfc.nasa.gov>");MODULE_DESCRIPTION("Packet Engines Yellowfin G-NIC Gigabit Ethernet driver");MODULE_PARM(max_interrupt_work, "i");MODULE_PARM(min_pci_latency, "i");MODULE_PARM(mtu, "i");MODULE_PARM(debug, "i");MODULE_PARM(rx_copybreak, "i");MODULE_PARM(options, "1-" __MODULE_STRING(MAX_UNITS) "i");#endif#endifstatic struct device *yellowfin_probe1(struct device *dev, int ioaddr, int irq,								   int chip_id, int options);static int yellowfin_open(struct device *dev);static void yellowfin_timer(unsigned long data);static void yellowfin_tx_timeout(struct device *dev);static void yellowfin_init_ring(struct device *dev);static int yellowfin_start_xmit(struct sk_buff *skb, struct device *dev);static int yellowfin_rx(struct device *dev);static void yellowfin_interrupt IRQ(int irq, void *dev_instance, struct pt_regs *regs);static int yellowfin_close(struct device *dev);static struct enet_statistics *yellowfin_get_stats(struct device *dev);#ifdef NEW_MULTICASTstatic void set_rx_mode(struct device *dev);#elsestatic void set_rx_mode(struct device *dev, int num_addrs, void *addrs);#endif#ifdef MODULE/* A list of all installed Yellowfin devices, for removing the driver module. */static struct device *root_yellowfin_dev = NULL;#endifint yellowfin_probe(struct device *dev){	int cards_found = 0;	static int pci_index = 0;	/* Static, for multiple probe calls. */	/* Ideally we would detect all network cards in slot order.  That would	   be best done a central PCI probe dispatch, which wouldn't work	   well with the current structure.  So instead we detect just the	   Yellowfin cards in slot order. */	if (pcibios_present()) {		unsigned char pci_bus, pci_device_fn;		for (;pci_index < 0xff; pci_index++) {			u8 pci_irq_line, pci_latency;			u16 pci_command, vendor, device;			u32 pci_ioaddr, chip_idx = 0;#ifdef REVERSE_PROBE_ORDER			if (pcibios_find_class (PCI_CLASS_NETWORK_ETHERNET << 8,									0xfe - pci_index,									&pci_bus, &pci_device_fn)				!= PCIBIOS_SUCCESSFUL)				continue;#else			if (pcibios_find_class (PCI_CLASS_NETWORK_ETHERNET << 8,									pci_index,									&pci_bus, &pci_device_fn)				!= PCIBIOS_SUCCESSFUL)				break;#endif			pcibios_read_config_word(pci_bus, pci_device_fn,									 PCI_VENDOR_ID, &vendor);			pcibios_read_config_word(pci_bus, pci_device_fn,									 PCI_DEVICE_ID, &device);			pcibios_read_config_byte(pci_bus, pci_device_fn,									 PCI_INTERRUPT_LINE, &pci_irq_line);			pcibios_read_config_dword(pci_bus, pci_device_fn,									  PCI_BASE_ADDRESS_0, &pci_ioaddr);			/* Remove I/O space marker in bit 0. */			pci_ioaddr &= ~3;			if (vendor != PCI_VENDOR_ID_PKT_ENG)				continue;			if (device != PCI_DEVICE_ID_YELLOWFIN)				continue;			if (yellowfin_debug > 2)				printk("Found Packet Engines Yellowfin G-NIC at I/O %#x, IRQ %d.\n",					   pci_ioaddr, pci_irq_line);			if (check_region(pci_ioaddr, YELLOWFIN_TOTAL_SIZE))				continue;#ifdef MODULE			dev = yellowfin_probe1(dev, pci_ioaddr, pci_irq_line, chip_idx,						 cards_found < MAX_UNITS ? options[cards_found] : 0);#else			dev = yellowfin_probe1(dev, pci_ioaddr, pci_irq_line, chip_idx,						 dev ? dev->mem_start : 0);#endif			if (dev) {			  /* Get and check the bus-master and latency values. */			  pcibios_read_config_word(pci_bus, pci_device_fn,									   PCI_COMMAND, &pci_command);			  if ( ! (pci_command & PCI_COMMAND_MASTER)) {				printk("  PCI Master Bit has not been set! Setting...\n");				pci_command |= PCI_COMMAND_MASTER;				pcibios_write_config_word(pci_bus, pci_device_fn,										  PCI_COMMAND, pci_command);			  }			  pcibios_read_config_byte(pci_bus, pci_device_fn,									   PCI_LATENCY_TIMER, &pci_latency);			  if (pci_latency < min_pci_latency) {				printk("  PCI latency timer (CFLT) is unreasonably low at %d."					   "  Setting to %d clocks.\n",					   pci_latency, min_pci_latency);				pcibios_write_config_byte(pci_bus, pci_device_fn,										  PCI_LATENCY_TIMER, min_pci_latency);			  } else if (yellowfin_debug > 1)				printk("  PCI latency timer (CFLT) is %#x.\n", pci_latency);			  dev = 0;			  cards_found++;			}		}	}#if defined (MODULE)	return cards_found;#else	return cards_found ? 0 : -ENODEV;#endif

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