am53c974.c

GNU Mach 微内核源代码, 基于美国卡内基美隆大学的 Mach 研究项目

  else {
   printk(":\n");
   for (ptr = (Scsi_Cmnd *) hostdata->disconnected_queue; ptr; ptr = (Scsi_Cmnd *)ptr->host_scribble) 
       print_Scsi_Cmnd (ptr); }
    
sti();
}

#endif /* AM53C974_DEBUG */

/**************************************************************************
 * Function : void AM53C974_print(struct Scsi_Host *instance)
 *
 * Purpose : dump the chip registers for debugging purposes
 *
 * Input : instance - which AM53C974
 **************************************************************************/
static void AM53C974_print(struct Scsi_Host *instance)
{
AM53C974_local_declare();
unsigned long ctcreg, dmastc, dmaspa, dmawbc, dmawac;
unsigned char cmdreg, statreg, isreg, cfireg, cntlreg[4], dmacmd, dmastatus;
AM53C974_setio(instance);

cli();
ctcreg = AM53C974_read_8(CTCHREG) << 16;
ctcreg |= AM53C974_read_8(CTCMREG) << 8;
ctcreg |= AM53C974_read_8(CTCLREG);
cmdreg = AM53C974_read_8(CMDREG);
statreg = AM53C974_read_8(STATREG);
isreg = AM53C974_read_8(ISREG);
cfireg = AM53C974_read_8(CFIREG);
cntlreg[0] = AM53C974_read_8(CNTLREG1);
cntlreg[1] = AM53C974_read_8(CNTLREG2);
cntlreg[2] = AM53C974_read_8(CNTLREG3);
cntlreg[3] = AM53C974_read_8(CNTLREG4);
dmacmd = AM53C974_read_8(DMACMD);
dmastc = AM53C974_read_32(DMASTC);
dmaspa = AM53C974_read_32(DMASPA);
dmawbc = AM53C974_read_32(DMAWBC);
dmawac = AM53C974_read_32(DMAWAC);
dmastatus = AM53C974_read_8(DMASTATUS);
sti();

printk("AM53C974 register dump:\n");
printk("IO base: 0x%04lx; CTCREG: 0x%04lx; CMDREG: 0x%02x; STATREG: 0x%02x; ISREG: 0x%02x\n",
       io_port, ctcreg, cmdreg, statreg, isreg);
printk("CFIREG: 0x%02x; CNTLREG1-4: 0x%02x; 0x%02x; 0x%02x; 0x%02x\n",
        cfireg, cntlreg[0], cntlreg[1], cntlreg[2], cntlreg[3]);
printk("DMACMD: 0x%02x; DMASTC: 0x%04lx; DMASPA: 0x%04lx\n", dmacmd, dmastc, dmaspa);
printk("DMAWBC: 0x%04lx; DMAWAC: 0x%04lx; DMASTATUS: 0x%02x\n", dmawbc, dmawac, dmastatus);
printk("---------------------------------------------------------\n");
}

/**************************************************************************
* Function : void AM53C974_keywait(void)
*
* Purpose : wait until a key is pressed, if it was the 'r' key leave singlestep mode;
*           this function is used for debugging only
*
* Input : none
**************************************************************************/
static void AM53C974_keywait(void)
{
#ifdef AM53C974_DEBUG
int key;

if (!deb_stop) return;
#endif

cli();
while ((inb_p(0x64) & 0x01) != 0x01) ;
#ifdef AM53C974_DEBUG
key = inb(0x60);
if (key == 0x93) deb_stop = 0;  /* don't stop if 'r' was pressed */
#endif
sti();
}

/**************************************************************************
* Function : AM53C974_setup(char *str, int *ints)
*
* Purpose : LILO command line initialization of the overrides array,
* 
* Inputs : str - unused, ints - array of integer parameters with ints[0]
*	    equal to the number of ints.
*
* NOTE : this function needs to be declared as an external function
*         in init/main.c and included there in the bootsetups list
***************************************************************************/
void AM53C974_setup(char *str, int *ints)
{
if (ints[0] < 4) 
   printk("AM53C974_setup: wrong number of parameters;\n correct syntax is: AM53C974=host-scsi-id, target-scsi-id, max-rate, max-offset\n");
  else {
   if (commandline_current < (sizeof(overrides) / sizeof(override_t))) {
      if ((ints[1] < 0) || (ints[1] > 7) ||
          (ints[2] < 0) || (ints[2] > 7) ||
          (ints[1] == ints[2]) ||
          (ints[3] < (DEF_CLK / MAX_PERIOD)) || (ints[3] > (DEF_CLK / MIN_PERIOD)) ||
          (ints[4] < 0) || (ints[4] > MAX_OFFSET))
         printk("AM53C974_setup: illegal parameter\n");
        else {
         overrides[commandline_current].host_scsi_id = ints[1];
         overrides[commandline_current].target_scsi_id = ints[2];
         overrides[commandline_current].max_rate = ints[3];
         overrides[commandline_current].max_offset = ints[4];
         commandline_current++; }
      }
     else
      printk("AM53C974_setup: too many overrides\n");
   }
}

#if defined (CONFIG_PCI)
/**************************************************************************
* Function : int AM53C974_bios_detect(Scsi_Host_Template *tpnt)
*
* Purpose : detects and initializes AM53C974 SCSI chips with PCI Bios
*
* Inputs : tpnt - host template
* 
* Returns : number of host adapters detected
**************************************************************************/
int AM53C974_bios_detect(Scsi_Host_Template *tpnt)
{
int count = 0;        /* number of boards detected */
int pci_index;
pci_config_t pci_config;

for (pci_index = 0; pci_index <= 16; ++pci_index) {
    unsigned char pci_bus, pci_device_fn;
    if (pcibios_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_SCSI, pci_index, &pci_bus, &pci_device_fn) != 0)
       break;

    pcibios_read_config_word(pci_bus, pci_device_fn, PCI_VENDOR_ID, &pci_config._vendor);
    pcibios_read_config_word(pci_bus, pci_device_fn, PCI_DEVICE_ID, &pci_config._device);
    pcibios_read_config_word(pci_bus, pci_device_fn, PCI_COMMAND, &pci_config._command);
    pcibios_read_config_word(pci_bus, pci_device_fn, PCI_STATUS, &pci_config._status);
    pcibios_read_config_dword(pci_bus, pci_device_fn, PCI_CLASS_REVISION, &pci_config._class_revision);
    pcibios_read_config_byte(pci_bus, pci_device_fn, PCI_CACHE_LINE_SIZE, &pci_config._cache_line_size);
    pcibios_read_config_byte(pci_bus, pci_device_fn, PCI_LATENCY_TIMER, &pci_config._latency_timer);
    pcibios_read_config_byte(pci_bus, pci_device_fn, PCI_HEADER_TYPE, &pci_config._header_type);
    pcibios_read_config_byte(pci_bus, pci_device_fn, PCI_BIST, &pci_config._bist);
    pcibios_read_config_dword(pci_bus, pci_device_fn, PCI_BASE_ADDRESS_0, &pci_config._base0);
    pcibios_read_config_dword(pci_bus, pci_device_fn, PCI_BASE_ADDRESS_1, &pci_config._base1);
    pcibios_read_config_dword(pci_bus, pci_device_fn, PCI_BASE_ADDRESS_2, &pci_config._base2);
    pcibios_read_config_dword(pci_bus, pci_device_fn, PCI_BASE_ADDRESS_3, &pci_config._base3);
    pcibios_read_config_dword(pci_bus, pci_device_fn, PCI_BASE_ADDRESS_4, &pci_config._base4);
    pcibios_read_config_dword(pci_bus, pci_device_fn, PCI_BASE_ADDRESS_5, &pci_config._base5);
    pcibios_read_config_dword(pci_bus, pci_device_fn, PCI_ROM_ADDRESS, &pci_config._baserom);
    pcibios_read_config_byte(pci_bus, pci_device_fn, PCI_INTERRUPT_LINE, &pci_config._int_line);
    pcibios_read_config_byte(pci_bus, pci_device_fn, PCI_INTERRUPT_PIN, &pci_config._int_pin);
    pcibios_read_config_byte(pci_bus, pci_device_fn, PCI_MIN_GNT, &pci_config._min_gnt);
    pcibios_read_config_byte(pci_bus, pci_device_fn, PCI_MAX_LAT, &pci_config._max_lat);
    pci_config._pcibus = 0xFFFFFFFF;
    pci_config._cardnum = 0xFFFFFFFF;
 
    /* check whether device is I/O mapped -- should be */
    if (!(pci_config._command & PCI_COMMAND_IO)) continue;

    /* PCI Spec 2.1 states that it is either the driver's or the PCI card's responsibility
       to set the PCI Master Enable Bit if needed. 
       (from Mark Stockton <[e-mail]>) */
    if (!(pci_config._command & PCI_COMMAND_MASTER)) {
       pci_config._command |= PCI_COMMAND_MASTER;
       printk("PCI Master Bit has not been set. Setting...\n");
       pcibios_write_config_word(pci_bus, pci_device_fn, PCI_COMMAND, pci_config._command); }

    /* everything seems OK now, so initialize */
    if (AM53C974_init(tpnt, pci_config)) count++ ;
    }
return (count);
}
#endif

/**************************************************************************
* Function : int AM53C974_nobios_detect(Scsi_Host_Template *tpnt)
*
* Purpose : detects and initializes AM53C974 SCSI chips using PCI config 2 
*
* Inputs : tpnt - host template
* 
* Returns : number of host adapters detected
*
* NOTE : This code assumes the controller on PCI bus 0.
*
* Origin: Robin Cutshaw ([e-mail])
**************************************************************************/
int AM53C974_nobios_detect(Scsi_Host_Template *tpnt)
{
int          count = 0;		/* number of boards detected */
pci_config_t pci_config;

/* first try PCI config method 1 */
for (pci_config._pcibus = 0; pci_config._pcibus < 0x10; pci_config._pcibus++) {
    for (pci_config._cardnum = 0; pci_config._cardnum < 0x20; pci_config._cardnum++) {
        unsigned long config_cmd;
	config_cmd = 0x80000000 | (pci_config._pcibus<<16) | (pci_config._cardnum<<11);

        outl(config_cmd, 0xCF8);         /* ioreg 0 */
        pci_config._device_vendor = inl(0xCFC);

        if ((pci_config._vendor == PCI_VENDOR_ID_AMD) && (pci_config._device == PCI_DEVICE_ID_AMD_SCSI)) {
           outl(config_cmd | PCI_COMMAND, 0xCF8); pci_config._status_command  = inl(0xCFC);
           outl(config_cmd | PCI_CLASS_REVISION, 0xCF8); pci_config._class_revision = inl(0xCFC);
           outl(config_cmd | PCI_CACHE_LINE_SIZE, 0xCF8); pci_config._bist_header_latency_cache = inl(0xCFC);
           outl(config_cmd | PCI_BASE_ADDRESS_0, 0xCF8); pci_config._base0 = inl(0xCFC);
           outl(config_cmd | PCI_BASE_ADDRESS_1, 0xCF8); pci_config._base1 = inl(0xCFC);
           outl(config_cmd | PCI_BASE_ADDRESS_2, 0xCF8); pci_config._base2 = inl(0xCFC);
           outl(config_cmd | PCI_BASE_ADDRESS_3, 0xCF8); pci_config._base3 = inl(0xCFC);
           outl(config_cmd | PCI_BASE_ADDRESS_4, 0xCF8); pci_config._base4 = inl(0xCFC);
           outl(config_cmd | PCI_BASE_ADDRESS_5, 0xCF8); pci_config._base5 = inl(0xCFC);
           outl(config_cmd | PCI_ROM_ADDRESS, 0xCF8); pci_config._baserom = inl(0xCFC);
           outl(config_cmd | PCI_INTERRUPT_LINE, 0xCF8); pci_config._max_min_ipin_iline = inl(0xCFC);

           /* check whether device is I/O mapped -- should be */
           if (!(pci_config._command & PCI_COMMAND_IO)) continue;

           /* PCI Spec 2.1 states that it is either the driver's or the PCI card's responsibility
              to set the PCI Master Enable Bit if needed. 
              From Mark Stockton <[e-mail]> */
           if (!(pci_config._command & PCI_COMMAND_MASTER)) {
              pci_config._command |= PCI_COMMAND_MASTER;
              printk("Config 1; PCI Master Bit has not been set. Setting...\n");
              outl(config_cmd | PCI_COMMAND, 0xCF8); outw(pci_config._command, 0xCFC); }

           /* everything seems OK now, so initialize */
           if (AM53C974_init(tpnt, pci_config)) count++ ;
           }
        }
    }
outb(0, 0xCF8); /* is this really necessary? */

/* try PCI config method 2, if no device was detected by method 1 */
if (!count) {
   AM53C974_PCIREG_OPEN();

   pci_config._pcibus = 0xFFFFFFFF;
   pci_config._cardnum = 0xFFFFFFFF;

   for (pci_config._ioaddr = 0xC000; pci_config._ioaddr < 0xD000; pci_config._ioaddr += 0x0100) {
       pci_config._device_vendor = inl(pci_config._ioaddr);

       if ((pci_config._vendor == PCI_VENDOR_ID_AMD) && (pci_config._device == PCI_DEVICE_ID_AMD_SCSI)) {
          pci_config._status_command = inl(pci_config._ioaddr + PCI_COMMAND);
          pci_config._class_revision = inl(pci_config._ioaddr + PCI_CLASS_REVISION);
          pci_config._bist_header_latency_cache = inl(pci_config._ioaddr + PCI_CACHE_LINE_SIZE);
          pci_config._base0 = inl(pci_config._ioaddr + PCI_BASE_ADDRESS_0);
          pci_config._base1 = inl(pci_config._ioaddr + PCI_BASE_ADDRESS_1);
          pci_config._base2 = inl(pci_config._ioaddr + PCI_BASE_ADDRESS_2);
          pci_config._base3 = inl(pci_config._ioaddr + PCI_BASE_ADDRESS_3);
          pci_config._base4 = inl(pci_config._ioaddr + PCI_BASE_ADDRESS_4);
          pci_config._base5 = inl(pci_config._ioaddr + PCI_BASE_ADDRESS_5);
          pci_config._baserom = inl(pci_config._ioaddr + PCI_ROM_ADDRESS);
          pci_config._max_min_ipin_iline = inl(pci_config._ioaddr + PCI_INTERRUPT_LINE);

          /* check whether device is I/O mapped -- should be */
          if (!(pci_config._command & PCI_COMMAND_IO)) continue;

          /* PCI Spec 2.1 states that it is either the driver's or the PCI card's responsibility
             to set the PCI Master Enable Bit if needed.
             From Mark Stockton <[e-mail]> */
          if (!(pci_config._command & PCI_COMMAND_MASTER)) {
              pci_config._command |= PCI_COMMAND_MASTER;
              printk("Config 2; PCI Master Bit has not been set. Setting...\n");
              outw(pci_config._command, pci_config._ioaddr + PCI_COMMAND); }

          /* everything seems OK now, so initialize */
          if (AM53C974_init(tpnt, pci_config)) count++ ;
          }
       }
   AM53C974_PCIREG_CLOSE();
   }

return(count);
}

/**************************************************************************
* Function : int AM53C974_detect(Scsi_Host_Template *tpnt)
*
* Purpose : detects and initializes AM53C974 SCSI chips
*
* Inputs : tpnt - host template
* 
* Returns : number of host adapters detected
**************************************************************************/
int AM53C974_detect(Scsi_Host_Template *tpnt)
{
int count;        /* number of boards detected */

tpnt->proc_dir = &proc_scsi_am53c974;

#if defined (CONFIG_PCI)
if (pcibios_present())
   count = AM53C974_bios_detect(tpnt);
  else
#endif
count = AM53C974_nobios_detect(tpnt);
return (count);
}

/**************************************************************************
* Function : int AM53C974_init(Scsi_Host_Template *tpnt, pci_config_t pci_config)
*
* Purpose : initializes instance and corresponding AM53/79C974 chip,
*
* Inputs : tpnt - template, pci_config - PCI configuration,
* 
* Returns : 1 on success, 0 on failure.
* 
* NOTE: If no override for the controller's SCSI id is given and AM53C974_SCSI_ID 
*       is not defined we assume that the SCSI address of this controller is correctly
*       set up by the BIOS (as reflected by contents of register CNTLREG1).
*       This is the only BIOS assistance we need.
**************************************************************************/
static int AM53C974_init(Scsi_Host_Template *tpnt, pci_config_t pci_config)
{
AM53C974_local_declare();
int                      i, j;
struct Scsi_Host         *instance, *search;
struct AM53C974_hostdata *hostdata;

#ifdef AM53C974_OPTION_DEBUG_PROBE_ONLY