gdth.h

GNU Mach 微内核源代码, 基于美国卡内基美隆大学的 Mach 研究项目

    unchar	first_chan;			/* first channel number */
    unchar	last_chan;			/* last channel number */
    unchar	chan_count;			/* (R) channel count */
    ulong	list_offset;			/* offset of list[0] */
    struct {
	unchar	proc_id;			/* processor id */
	unchar	proc_defect;			/* defect ? */
	unchar	reserved[2];
    } list[MAXBUS];
} gdth_iochan_str;

/* cache info/config IOCTL */
typedef struct {
    ulong       version;                        /* firmware version */
    ushort      state;                          /* cache state (on/off) */
    ushort      strategy;                       /* cache strategy */
    ushort      write_back;                     /* write back state (on/off) */
    ushort      block_size;                     /* cache block size */
} gdth_cpar_str;

typedef struct {
    ulong       csize;                          /* cache size */
    ulong       read_cnt;                       /* read/write counter */
    ulong       write_cnt;
    ulong       tr_hits;                        /* hits */
    ulong       sec_hits;
    ulong       sec_miss;                       /* misses */
} gdth_cstat_str;

typedef struct {
    gdth_cpar_str   cpar;
    gdth_cstat_str  cstat;
} gdth_cinfo_str;

/* board info IOCTL */
typedef struct {
    ulong	ser_no;				/* serial no. */
    unchar	oem_id[2];			/* OEM ID */
    ushort	ep_flags;			/* eprom flags */
    ulong	proc_id;			/* processor ID */
    ulong	memsize;			/* memory size (bytes) */
    unchar	mem_banks;			/* memory banks */
    unchar	chan_type;			/* channel type */
    unchar	chan_count;			/* channel count */
    unchar	rdongle_pres;			/* dongle present? */
    ulong	epr_fw_ver;			/* (eprom) firmware version */
    ulong	upd_fw_ver;			/* (update) firmware version */
    ulong	upd_revision;			/* update revision */
    char	type_string[16];		/* controller name */
    char	raid_string[16];		/* RAID firmware name */
    unchar	update_pres;			/* update present? */
    unchar	xor_pres;			/* XOR engine present? */
    unchar	prom_type;			/* ROM type (eprom/flash eprom) */
    unchar	prom_count;			/* number of ROM devices */
    ulong	dup_pres;			/* duplexing module present? */
    ulong	chan_pres;			/* number of expansion channels */
    ulong	mem_pres;			/* memory expansion installed? */
    unchar	ft_bus_system;			/* fault bus supported? */
    unchar	subtype_valid;			/* board_subtype valid? */
    unchar	board_subtype;			/* controller subtype/hardware level */
    unchar	ramparity_pres;			/* RAM parity check hardware present? */
} gdth_binfo_str; 

/* scatter/gather element */
typedef struct {
    ulong       sg_ptr;                         /* address */
    ulong       sg_len;                         /* length */
} gdth_sg_str;

/* command structure */
typedef struct {
    ulong       BoardNode;                      /* board node (always 0) */
    ulong       CommandIndex;                   /* command number */
    ushort      OpCode;                         /* the command (READ,..) */
    union {
        struct {
            ushort      DeviceNo;               /* number of cache drive */
            ulong       BlockNo;                /* block number */
            ulong       BlockCnt;               /* block count */
            ulong       DestAddr;               /* dest. addr. (if s/g: -1) */
            ulong       sg_canz;                /* s/g element count */
            gdth_sg_str sg_lst[GDTH_MAXSG];     /* s/g list */
        } cache;                                /* cache service cmd. str. */
        struct {
            ushort      param_size;             /* size of p_param buffer */
            ulong       subfunc;                /* IOCTL function */
            ulong       channel;                /* device */
            ulong       p_param;                /* buffer */
        } ioctl;                                /* IOCTL command structure */
        struct {
            ushort      reserved;
            ulong       msg_handle;             /* message handle */
            ulong       msg_addr;               /* message buffer address */
        } screen;                               /* screen service cmd. str. */
        struct {
            ushort      reserved;
            ulong       direction;              /* data direction */
            ulong       mdisc_time;             /* disc. time (0: no timeout)*/
            ulong       mcon_time;              /* connect time(0: no to.) */
            ulong       sdata;                  /* dest. addr. (if s/g: -1) */
            ulong       sdlen;                  /* data length (bytes) */
            ulong       clen;                   /* SCSI cmd. length(6,10,12) */
            unchar      cmd[12];                /* SCSI command */
            unchar      target;                 /* target ID */
            unchar      lun;                    /* LUN */
            unchar      bus;                    /* SCSI bus number */
            unchar      priority;               /* only 0 used */
            ulong       sense_len;              /* sense data length */
            ulong       sense_data;             /* sense data addr. */
            struct raw  *link_p;                /* linked cmds (not supp.) */
            ulong       sg_ranz;                /* s/g element count */
            gdth_sg_str sg_lst[GDTH_MAXSG];     /* s/g list */
        } raw;                                  /* raw service cmd. struct. */
    } u;
    /* additional variables */
    unchar      Service;                        /* controller service */
    ushort      Status;                         /* command result */
    ulong       Info;                           /* additional information */
    Scsi_Cmnd   *RequestBuffer;                 /* request buffer */
} gdth_cmd_str;

/* controller event structure */
#define ES_ASYNC    1
#define ES_DRIVER   2
#define ES_TEST     3
#define ES_SYNC     4
typedef struct {
    ushort                  size;               /* size of structure */
    union {
        char                stream[16];
        struct {
            ushort          ionode;
            ushort          service;
            ulong           index;
        } driver;
        struct {
            ushort          ionode;
            ushort          service;
            ushort          status;
            ulong           info;
            unchar          scsi_coord[3];
        } async;
        struct {
            ushort          ionode;
            ushort          service;
            ushort          status;
            ulong           info;
            ushort          hostdrive;
            unchar          scsi_coord[3];
            unchar          sense_key;
        } sync;
        struct {
            ulong           l1, l2, l3, l4;
        } test;
    } eu;
} gdth_evt_data;

typedef struct {
    ulong           first_stamp;
    ulong           last_stamp;
    ushort          same_count;
    ushort          event_source;
    ushort          event_idx;
    unchar          application;
    unchar          reserved;
    gdth_evt_data   event_data;
} gdth_evt_str;


/* DPRAM structures */

/* interface area ISA/PCI */
typedef struct {
    unchar              S_Cmd_Indx;             /* special command */
    unchar volatile     S_Status;               /* status special command */
    ushort              reserved1;
    ulong               S_Info[4];              /* add. info special command */
    unchar volatile     Sema0;                  /* command semaphore */
    unchar              reserved2[3];
    unchar              Cmd_Index;              /* command number */
    unchar              reserved3[3];
    ushort volatile     Status;                 /* command status */
    ushort              Service;                /* service(for async.events) */
    ulong               Info[2];                /* additional info */
    struct {
        ushort          offset;                 /* command offs. in the DPRAM*/
        ushort          serv_id;                /* service */
    } comm_queue[MAXOFFSETS];                   /* command queue */
    ulong               bios_reserved[2];
    unchar              gdt_dpr_cmd[1];         /* commands */
} gdt_dpr_if;

/* SRAM structure PCI controllers */
typedef struct {
    ulong       magic;                          /* controller ID from BIOS */
    ushort      need_deinit;                    /* switch betw. BIOS/driver */
    unchar      switch_support;                 /* see need_deinit */
    unchar      padding[9];
    unchar      os_used[16];                    /* OS code per service */
    unchar      unused[28];
    unchar      fw_magic;                       /* contr. ID from firmware */
} gdt_pci_sram;

/* SRAM structure EISA controllers (but NOT GDT3000/3020) */
typedef struct {
    unchar      os_used[16];                    /* OS code per service */
    ushort      need_deinit;                    /* switch betw. BIOS/driver */
    unchar      switch_support;                 /* see need_deinit */
    unchar      padding;
} gdt_eisa_sram;


/* DPRAM ISA controllers */
typedef struct {
    union {
        struct {
            unchar      bios_used[0x3c00-32];   /* 15KB - 32Bytes BIOS */
            ulong       magic;                  /* controller (EISA) ID */
            ushort      need_deinit;            /* switch betw. BIOS/driver */
            unchar      switch_support;         /* see need_deinit */
            unchar      padding[9];
            unchar      os_used[16];            /* OS code per service */
        } dp_sram;
        unchar          bios_area[0x4000];      /* 16KB reserved for BIOS */
    } bu;
    union {
        gdt_dpr_if      ic;                     /* interface area */
        unchar          if_area[0x3000];        /* 12KB for interface */
    } u;
    struct {
        unchar          memlock;                /* write protection DPRAM */
        unchar          event;                  /* release event */
        unchar          irqen;                  /* board interrupts enable */
        unchar          irqdel;                 /* acknowledge board int. */
        unchar volatile Sema1;                  /* status semaphore */
        unchar          rq;                     /* IRQ/DRQ configuration */
    } io;
} gdt2_dpram_str;

/* DPRAM PCI controllers */
typedef struct {
    union {
        gdt_dpr_if      ic;                     /* interface area */
        unchar          if_area[0xff0-sizeof(gdt_pci_sram)];
    } u;
    gdt_pci_sram        gdt6sr;                 /* SRAM structure */
    struct {
        unchar          unused0[1];
        unchar volatile Sema1;                  /* command semaphore */
        unchar          unused1[3];
        unchar          irqen;                  /* board interrupts enable */
        unchar          unused2[2];
        unchar          event;                  /* release event */
        unchar          unused3[3];
        unchar          irqdel;                 /* acknowledge board int. */
        unchar          unused4[3];
    } io;
} gdt6_dpram_str;

/* PLX register structure (new PCI controllers) */
typedef struct {
    unchar              cfg_reg;        /* DPRAM cfg.(2:below 1MB,0:anywhere)*/
    unchar              unused1[0x3f];
    unchar volatile     sema0_reg;              /* command semaphore */
    unchar volatile     sema1_reg;              /* status semaphore */
    unchar              unused2[2];
    ushort volatile     status;                 /* command status */
    ushort              service;                /* service */
    ulong               info[2];                /* additional info */
    unchar              unused3[0x10];
    unchar              ldoor_reg;              /* PCI to local doorbell */
    unchar              unused4[3];
    unchar volatile     edoor_reg;              /* local to PCI doorbell */
    unchar              unused5[3];