ryt1.c

此为单片机MSP430系列中常用的初始化命令和串口异步通信的简单示例.

unsigned char logger_buffer[128];
unsigned char data_buffer[128];
unsigned char buffer_index, temp1;

/* Function prototypes */
void InitIO(void);
void delay_time(unsigned int k); 
void clear_logger_buffer(void);	    /* clear logger_buffer[128] */
void clear_data_buffer(void);	    /* clear data_buffer[128] */

void InitClockSource(void);  //Use DCOCLK as default MCLK.
void InitUART1(void);  //HF XT2CLK,8MHz, SMLK


void main(void)
{//Main start 
  WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
  InitIO();
  P4OUT |= BIT2;  // Set P4.2
  delay_time(35000);
  P4OUT &= ~BIT2; // Clear P4.2
  delay_time(35000);
  P4OUT |= BIT2;  // Set P4.2
  delay_time(35000);
  P4OUT &= ~BIT2; // Clear P4.2
  delay_time(65000);
  
  InitClockSource();  //Use DCOCLK as default MCLK.
  InitUART1();  //HF XT2CLK,8MHz, SMLK
  
  _EINT();
    
  //verify page write by reading and comparing page contents

  for (;;)                             
  {//main loop start
  _NOP();
  //_BIS_SR(LPM3_bits);_NOP();            // Wait in LPM3 until some interruption occurs.
  
  
  //TXBUF0 = RXBUF0;                      // RXBUF1 to TXBUF1
  while((U1TCTL & 0x01) == 0 ) {}
  U1TXBUF = 0x55;                      // RXBUF1 to TXBUF1
  //while ((U0TCTL&0x01)==0);   
  //delay_time(6500);
   
    
  }//main loop end
}//Main end



void InitClockSource(void)  //Use DCOCLK as default MCLK.
{
    unsigned int i;
    //BCSCTL1 = 0x84;
    // 8* (1/32768Hz)*1024*64= 16s
    //BCSCTL1 |= DIVA_3; //ACLK for real timer prescale to 8
    //Default MCLK is 738KHz, e-flash clock 16us/bit by TDS224.
    //BCSCTL1 |= (RSEL0|RSEL2); //select MCLK output frequency about 1.334MHz. 
    //BCSCTL1 |= (RSEL0|RSEL1|RSEL2); //select MCLK output frequency about 3.2MHz. 
    
   // P5DIR |= BIT4;P5SEL |= BIT4; //FOR TEST!
    //P5DIR |= BIT5;P5SEL |= BIT5; //FOR TEST!
    //P5DIR |= BIT6;P5SEL |= BIT6; //FOR TEST!
    
    
    do 
    {
      IFG1 &= ~OFIFG;                       // Clear OSCFault flag
      for (i = 0xFF; i > 0; i--);           // Time for flag to set
    } 
    while ((IFG1 & OFIFG) != 0);          // OSCFault flag still set?    
    BCSCTL1 &= ~XT2OFF; //open the XT2(8MHz)
    BCSCTL2 |= SELS; //select TX2CLK for SMCLK
}

void InitIO(void)
{
//P5.0            Output          IEB
//P5.1            Output          SDI
//P5.2            Input           SDO
//P5.3            Output          SCLK
//P5.4            Input           BUSY
  P5DIR = 0;
  P5DIR = P5DIR+IEB+SDI+SCLK; //set I/O direction of P5.
  P5SEL = 0;
  P4DIR |= BIT2;  // P4.2 output for LED

}

void InitUART1(void)  
{
/*use HF XT2CLK,8MHz, SMLK as UART0 clock, UBR = 8000000/9.6K=833.33333, so UBR=833.
  UBR1=03H, UBR0=41H. 0.333333*8=2.66664-->three "1" -->10010001-->U0MCTL=91H, 
  that is, 833*5+834*3= 833.375, error rate=(833.375-833.33)/833.33=0.0054%.
  As a result, we get the lowest error rate.
  */
  U1CTL |= SWRST; 
  U1CTL &= ~SYNC;
  U1CTL |= CHAR; //8 bit, 1 stop.
  U1BR0=0x41; U1BR1=0x03; 
  //U0MCTL=0x91; //set baud rate 9600bps@8MHz
  U1MCTL=0;
  //U0TCTL |= (TXEPT+SSEL0+SSEL1); //select clock source:SMCLK.
  U1TCTL = SSEL1+SSEL0; //select clock source:SMCLK.
  U1RCTL = 0x00;
  ME2 |= (UTXE1+URXE1);
  P3SEL |= BIT6+BIT7;  //P3.6,7=USART1 TXD1/RXD1
  P3DIR |= BIT6;
  
  U1CTL &=~ SWRST; 
  IE2 |= URXIE1;
  
}

// UART0 RX ISR will for exit from LPM3 in Mainloop
interrupt[UART1RX_VECTOR] void usart1_rx (void)
{
  //_BIC_SR_IRQ(LPM3_bits);               // Clear LPM3 bits from 0(SR)
  //_BIC_SR(LPM3_bits);               // Clear LPM3 bits from 0(SR)
  P4OUT |= BIT2;  // Set P4.2
  //TXBUF0 = RXBUF0;  
    delay_time(6500);
    P4OUT &= ~BIT2; // Clear P4.2
    
                      // RXBUF0 to TXBUF0
  //TXBUF0 = 0x55;                      // RXBUF0 to TXBUF0
  //while ((UTCTL0&0x01)==0);   
  /*
  while(1)
  {
    P4OUT |= BIT2;  // Set P4.2
    delay_time(6500);
    P4OUT &= ~BIT2; // Clear P4.2
    delay_time(6500);
  }
 */
}