msp430dayii_dma_09.c

基于TI的MSP430的方面的相关的软件和MSP430的相关的资料.

//*******************************************************************************
//  MSP-430-Day II Demo - DMA0 ADC12 A10 Block Transfer to RAM, TBCCR1, DCO 
//
//  Description; A 0x20 word block of data is sampled and recorded into RAM 
//  from the ADC12 channel 10 the integrated temperature sensor using the 
//  Record() function. Timer_B CCR1 begins the ADC12 sample period, CCR0 the hold
//  and conversion start. Timer_B operates in the up mode with CCR0 defining the
//  sample period. DMA0 will automatically transfer each ADC12 conversion code 
//  to memory when complete. At the end of the recording block, DMA0 will issue 
//  an interrupt existing the function.
//  In the example the RAM block use to record the ADC12 data begins at 0x220. 
//  P1.0 is toggled durring DMA transfer only for demonstration purposes.
//  ACLK = 32768, MCLK = SMCLK = default DCO =1048576
//  //* MSP430FG439 Device Required*//
//
//               MSP430FG439
//            -----------------
//        /|\|              XIN|-  
//         | |                 | 32KHz
//         --|RST          XOUT|-
//           |                 |
//           |A10          P1.0|-->LED
//
//  M.Buccini
//  Texas Instruments, Inc
//  February 2004
//  Updated for IAR Embedded Workbench Version: 2.21B
//*******************************************************************************
#include <msp430xG43x.h>

void Record(void); 

void main(void)
{
  WDTCTL = WDTPW + WDTHOLD;                 // Stop watchdog
  FLL_CTL0 |= XCAP14PF;                     // Set load capacitance
  P1DIR |= 0x01;                            // P1.0 = output

  while (1)                                 // Repeat forever
  {
    Record();                             
    _NOP();                                 // << SET BREAKPOINT HERE
  }
}

// Record ADC12 A10 channel data and store in RAM using DMA0
void Record(void)
{
  // setup modules
  volatile unsigned int i;
  ADC12MCTL0 = 0x01A;
  ADC12IFG = 0x00;                           
  ADC12CTL1 = SHS_3 + CONSEQ_2;             // S&H TB.OUT1, rep. single chan
  ADC12CTL0 = REF2_5V + REFON + ADC12ON + ENC;      // VRef ADC12 on, enabled
  for (i = 0xFFF; i > 0; i--);              // Time VRef to settle

  TBCCR0 = 100;                             // Init TBCCR0 w/ sample prd
  TBCCR1 = 100 - 30;                        // Trigger for ADC12 SC
  TBCCTL1 = OUTMOD_7;                       // Reset OUT1 on EQU1, set on EQU0

  DMA0SA = ADC12MEM0_;                      // Src address = ADC12 module
  DMA0DA = 0x220;                           // Dst address = RAM memory
  DMA0SZ = 0x20;                            // Size in words
  DMACTL0 = DMA0TSEL_6;                     // ADC12IFGx triggers DMA0
  DMA0CTL = DMADSTINCR_3 + DMAIE + DMAEN;   // Config

  // start recording and enter LPM0
  P1OUT |= 0x01;                            // Set P1.0 (LED On)
  TBCTL = TBSSEL_2+ MC_1 + TBCLR;           // SMCLK, clear TBR, up mode
  _BIS_SR(LPM0_bits + GIE);                 // Enter LPM0 w/ interrupts
  
  // power-down MSP430 modules
  ADC12CTL1 &= ~CONSEQ_2;                   // Stop conversion immediately
  ADC12CTL0 &= ~ENC;                        // Disable ADC12 conversion
  ADC12CTL0 = 0;                            // Switch off ADC12 & ref voltage
  TBCTL = 0;                                // Disable Timer_B
  P1OUT &= ~0x01;                           // Clear P1.0 (LED Off)
}
  
// DMA interrupt service routine
#pragma vector=DAC12_DMA_VECTOR
__interrupt void DACDMA_ISR (void)
{
  DMA0CTL &= ~DMAIFG;                       // Clear DMA0 interrupt flag
  _BIC_SR_IRQ(LPM0_bits);                   // Exit LPM0 on reti
}