syslib.c

这是micrel公司宽带路由ARM9芯片的VXWORKS BSP 源代码

#endif /* INCLUDE_CACHE_SUPPORT */

#if defined(INCLUDE_MMU)

    /* Install the appropriate MMU library and translation routines */

    mmuArm920tLibInstall (NULL, NULL);

#endif /* defined(INCLUDE_MMU) */

    return;
}


#if !defined(KS8695) && !defined(KS8695X)  /* KS8695P only */
#if defined(INCLUDE_PCI)
/*******************************************************************************
*
* sysKs8695pPciInit - initialize the KS8695P PCI bridge controller
*
*
* RETURNS: N/A
*/

void sysKs8695pPciInit (void)
{

    /* Reset the Bridge 
	KS8695P_REG_WRITE(REG_PCI_PBCS, 0x80000000);
    */

    /* initialize subid/subdevice  */
	KS8695P_REG_WRITE(REG_PCI_CRCSID, 0x86950010);

    /* prefetch limits with 16 words, retru enable */
	KS8695P_REG_WRITE(REG_PCI_PBCS, 0x40000000);

    /* Set PCI-AHB Bridge Bus Mode to Host Bridge and Mini PCI Mode */
#ifdef MINI_PCI
    /* Set PCI-AHB Bridge Bus Mode to Host Bridge and Mini PCI Mode */
	KS8695P_REG_WRITE(REG_PCI_PBM, 0xA0000000);	
#else
    /* Set PCI-AHB Bridge Bus Mode to Host Bridge and PCI Mode */
	KS8695P_REG_WRITE(REG_PCI_PBM, 0x80000000);	
#endif

     /* configure memory mapping */

    /* memory map as seen by the CPU on the local bus */
	KS8695P_REG_WRITE(REG_PCI_PMBA, CPU_PCI_MEM_ADRS);		                /* 0x6000-0000 */

    /* mask bits */
	KS8695P_REG_WRITE(REG_PCI_PMBAM, CPU_PCI_MEM_MASK);	

    /* memory address (PCI view of PCI memory space)  */
	KS8695P_REG_WRITE(REG_PCI_PMBAT, PCI_MEM_ADRS);	                        /* 0x4000-0000 */

    /* enable memory address translation */
    KS8695P_REG_WRITE(REG_PCI_PMBAC, PMBAC_TRANS_ENABLE);
        

     /* configure IO mapping */

    /* memory map as seen by the CPU on the local bus */
	KS8695P_REG_WRITE(REG_PCI_PIOBA, CPU_PCI_IO_ADRS);                       /* 0x8000-0000 */

	/* mask bits */
	KS8695P_REG_WRITE(REG_PCI_PIOBAM, CPU_PCI_IO_MASK);	

    /* PCI view of PCI space for PCI devices */
	KS8695P_REG_WRITE(REG_PCI_PIOBAT, PCI_IO_ADRS);                          /* 0x8000-0000 */

    /* enable IO address translation 
    KS8695P_REG_WRITE(REG_PCI_PIOBAC, PMBAC_TRANS_ENABLE);
    */

    pciConfigOutLong (0, 0, 0, PCI_CFG_BASE_ADDRESS_0, PCI2DRAM_BASE_ADRS);  /* 0x4400-0000 */

    pciConfigOutLong (0, 0, 0, PCI_CFG_CACHE_LINE_SIZE, 0x0000FF08);

    pciConfigOutLong (0, 0, 0, PCI_CFG_COMMAND, 0x00000006);                 /* master, memory mapping */

    return;
}
#endif /* defined(INCLUDE_PCI) */
#endif /* #if !defined(KS8695) && !defined(KS8695X)  */

/*******************************************************************************
*
* sysHwInit - initialize the CPU board hardware
*
* This routine initializes various features of the hardware.
* Normally, it is called from usrInit() in usrConfig.c.
*
* NOTE: This routine should not be called directly by the user.
*
* RETURNS: N/A
*/

void sysHwInit (void)
{
    /* install the IRQ/SVC interrupt stack splitting routine */

    _func_armIntStackSplit = sysIntStackSplit;

#if !defined(KS8695) && !defined(KS8695X)  /* KS8695P only */
#if defined(INCLUDE_PCI)

    /* Initialise the KS8695P PCI bridge controller */

    sysKs8695pPciInit();

    /*  Initialise PCI driver library. */

    if (pciIomapLibInit (PCI_MECHANISM_3, (REG_IO_BASE+REG_PCI_CRCFID),
    			 (REG_IO_BASE+REG_PCI_CRCFID), 0) != OK)
	sysToMonitor (BOOT_NO_AUTOBOOT);

#endif  /* INCLUDE_PCI */
#endif  /* #if !defined(KS8695) && !defined(KS8695X) */

#ifdef INCLUDE_SERIAL
    /* initialise the serial devices */

    sysSerialHwInit ();      /* initialise serial data structure */
#endif /* INCLUDE_SERIAL */
}

/*******************************************************************************
*
* sysHwInit2 - additional system configuration and initialization
*
* This routine connects system interrupts and does any additional
* configuration necessary.  Note that this is called from
* sysClkConnect() in the timer driver.
*
* RETURNS: N/A
*
*/

void sysHwInit2 (void)
{
    static BOOL initialised = FALSE;

    if (initialised)
    	return;

    /* initialise the interrupt library and interrupt driver */

    intLibInit (KS8695P_INT_NUM_LEVELS, KS8695P_INT_NUM_LEVELS, INT_MODE);

    ks8695pIntDevInit();

    /* connect sys clock interrupt and auxiliary clock interrupt */

    (void)intConnect (SYS_TIMER_INT_VEC, sysClkInt, 0);
    (void)intConnect (AUX_TIMER_INT_VEC, sysAuxClkInt, 0);

#ifdef INCLUDE_SERIAL
    /* connect serial interrupt */

    sysSerialHwInit2();
#endif /* INCLUDE_SERIAL */

    sysEndInit();

#if !defined(KS8695) && !defined(KS8695X)  /* KS8695P only */
#if defined (INCLUDE_PCI)
#if defined (INCLUDE_DEC21X40END) || defined (INCLUDE_FEI82557END)

    /* map all appropriate Ethernet PCI device memory and I/O addresses */

    pciConfigOutLong (0, 5, 0, PCI_CFG_COMMAND, 0x00000007);

    sysLanPciInit ();

    pciConfigOutLong (0, 5, 0, PCI_CFG_COMMAND, 0x00000007);

#endif  /* INCLUDE_DEC21X40END/FEI82557END */

#if defined (INCLUDE_USB)
    /* Low level init for usb */

    sysUsbPciInit();

#endif  /* INCLUDE_USB */
#endif  /* INCLUDE_PCI */
#endif  /* #if !defined(KS8695) && !defined(KS8695X) */

    initialised = TRUE;

}

/*******************************************************************************
*
* sysPhysMemTop - get the address of the top of physical memory
*
* This routine returns the address of the first missing byte of memory,
* which indicates the top of memory.
*
* Normally, the user specifies the amount of physical memory with the
* macro LOCAL_MEM_SIZE in config.h.  BSPs that support run-time
* memory sizing do so only if the macro LOCAL_MEM_AUTOSIZE is defined.
* If not defined, then LOCAL_MEM_SIZE is assumed to be, and must be, the
* true size of physical memory.
*
* NOTE: Do no adjust LOCAL_MEM_SIZE to reserve memory for application
* use.  See sysMemTop() for more information on reserving memory.
*
* RETURNS: The address of the top of physical memory.
*
* SEE ALSO: sysMemTop()
*/

char * sysPhysMemTop (void)
{
    static char * physTop = NULL;

    if (physTop == NULL)
	{
#ifdef LOCAL_MEM_AUTOSIZE
        /* If auto-sizing is possible, this would be the spot.  */

#if defined(INCLUDE_MMU)
        physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + sysPhysMemDesc[0].len);
#else
	    physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + local_mem_size);
#endif /* defined(INCLUDE_MMU) */

#else /* LOCAL_MEM_AUTOSIZE */
	  /* Don't do autosizing, if size is given */

	  physTop = (char *)(LOCAL_MEM_LOCAL_ADRS + LOCAL_MEM_SIZE);

#endif /* LOCAL_MEM_AUTOSIZE */
	}

    return physTop;
}

/*******************************************************************************
*
* sysMemTop - get the address of the top of VxWorks memory
*
* This routine returns a pointer to the first byte of memory not
* controlled or used by VxWorks.
*
* The user can reserve memory space by defining the macro USER_RESERVED_MEM
* in config.h.  This routine returns the address of the reserved memory
* area.  The value of USER_RESERVED_MEM is in bytes.
*
* RETURNS: The address of the top of VxWorks memory.
*/

char * sysMemTop (void)
    {
    static char * memTop = NULL;

    if (memTop == NULL)
	{
	memTop = sysPhysMemTop () - USER_RESERVED_MEM;
	}

    return memTop;
    }

/*******************************************************************************
*
* sysToMonitor - transfer control to the ROM monitor
*
* This routine transfers control to the ROM monitor.  It is usually called
* only by reboot() -- which services ^X -- and bus errors at interrupt
* level.  However, in some circumstances, the user may wish to introduce a
* new <startType> to enable special boot ROM facilities.
*
* RETURNS: Does not return.
*/

STATUS sysToMonitor
    (
    int startType	/* passed to ROM to tell it how to boot */
    )
    {

    KS8695P_REG_BIT_CLR (REG_TIMER_CTRL, REG_TIMER_CTRL_TOUT0E); 
    KS8695P_REG_WRITE (REG_TIMER0, 0x000000FF);
    KS8695P_REG_WRITE (REG_TIMER0_PCOUNT, 0x00000005);
    KS8695P_REG_BIT_SET (REG_TIMER_CTRL, REG_TIMER_CTRL_TOUT0E); 

    for (;;);

    }

/****************************************************************************
*
* sysProcNumGet - get the processor number
*
* This routine returns the processor number for the CPU board, which is
* set with sysProcNumSet().
*
* RETURNS: The processor number for the CPU board.
*
* SEE ALSO: sysProcNumSet()
*/

int sysProcNumGet (void)
    {
    return 0;
    }

/****************************************************************************
*
* sysProcNumSet - set the processor number
*
* Set the processor number for the CPU board.  Processor numbers should be
* unique on a single backplane.
*
* NOTE
* By convention, only processor 0 should dual-port its memory.
*
* RETURNS: N/A
*
* SEE ALSO: sysProcNumGet()
*/

void sysProcNumSet
    (
    int procNum		/* processor number */
    )
    {
    sysProcNum = procNum;
    }


/*****************************************************************************
*
* Each time VxWorks is rebooted, it starts assigning system-assigned
* port numbers beginning at 1024.  Thus, if vxWorks is rebooted two or
* more times in succession, the same port number will be re-used.
*
* This behavior causes problems when vxWorks is being booted from a
* remote FTP server (particularly one running Solaris), because port
* 1024 goes into a TIME_WAIT state on the server and cannot be reused
* until it times out, typically in 2-4 minutes.
*
* This hack reduces the likelihood of this happening by "wasting"
* a different number of system-assigned port numbers for each boot.
*/

void sysBindFix(void)
{
    UINT8		N;

    sysNvRamGet((char *) &N, 1, NV_OFF_BINDFIX);
    N -= 16;
    sysNvRamSet((char *) &N, 1, NV_OFF_BINDFIX);

    /* This is quite fast even when N=255 */

    while (N--) {
	int s;

	struct sockaddr_in saddr;
	saddr.sin_addr.s_addr = htonl(INADDR_ANY);
	saddr.sin_port = 0;
	saddr.sin_family = AF_INET;
	s = (int)socket(AF_INET, SOCK_STREAM, 0);
	bind(s, (struct sockaddr *) &saddr, sizeof(saddr));
	close(s);
    }
}

#ifdef INCLUDE_FLASH
/******************************************************************************
*
* sysFlashWriteEnable - enable write access to the Flash memory
*
* This routine is used by flashMem.c to enable write access to the
* Flash memory.
*
* RETURNS: N/A
*/

void sysFlashWriteEnable (void)
     {

     }

/******************************************************************************
*
* sysFlashWriteDisable - disable write access to the Flash memory
*
* This routine is used by flashMem.c to disable write access to the
* Flash memory.
*
* RETURNS: N/A
*/

void sysFlashWriteDisable (void)
     {

     }


#endif /* INCLUDE_FLASH */