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📄 config.h

📁 三星官方基于VXWORKS的S3C2510的BSP
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/* config.h - ARM PID configuration header */

/* Copyright 1996-1998 Wind River Systems, Inc. */

/*
modification history
--------------------
01d,25nov99,knp changed name "end" to "secEnd"
01c,12nov99,knp added INCLUDE_SNDS_HDLC_END and INCLUDE_SNDS_END definitions
01b,03nov99,ak   added definition for DRAM type
01a,22sep99,knp  adapted from ver.01n of pid7t for SNDS100
*/

/*
This module contains the configuration parameters for the ARM PID BSP.
*/

#ifndef	INCconfigh
#define	INCconfigh

/* BSP version/revision identification, before configAll.h */

#define BSP_VER_1_1	1	/* 1.2 is backward compatible with 1.1 */
#define BSP_VER_1_2	1
#define BSP_VERSION	"1.2"
#define BSP_REV		"/0"	/* 0 for first revision */

#include "configAll.h"

#if	(CPU == ARM7TDMI)
#  define DEFAULT_BOOT_LINE \
  "secEnd(0,0)aman:/tornado/target/config/Release7/vxWorks h=192.168.49.105 e=192.168.49.99 u=aman pw=aman tn=snds100"
#elif	(CPU == ARM7TDMI_T)
#  define DEFAULT_BOOT_LINE \
   "oli(0,0)host:/tor/target/config/snds100/vxWorks " \
   "h=90.0.0.3 e=90.0.0.50 u=target tn=targetname"
#elif	(CPU == ARM710A)
#  define DEFAULT_BOOT_LINE \
   "oli(0,0)host:/tor/target/config/snds100/vxWorks " \
   "h=90.0.0.3 e=90.0.0.50 u=target tn=targetname"
#endif	/* CPU == ARM7TDMI_T */


/* Memory configuration */

#undef	LOCAL_MEM_AUTOSIZE			/* run-time memory sizing */
#define LOCAL_MEM_SIZE		0x00400000	/* 4M */
#define USER_RESERVED_MEM	0		/* see sysMemTop() */
#define	DRAM_TYPE 1		/* 1 - SDRAM, 0 - EDO DRAM */

/*
 * Boot ROM is an image written either to EPROM or to a Flash device.
 * If a Flash device is used, part of it can be reserved for boot
 * parameters etc. (see the Flash section below).
 *
 * The following parameters are defined here and in the Makefile.
 * They must be kept synchronized; effectively config.h depends on Makefile.
 * Any changes made here must be made in the Makefile and vice versa.
 *
 * ROM_BASE_ADRS is the base of the Flash ROM/EPROM.
 * ROM_TEXT_ADRS is the entry point of the VxWorks image
 * ROM_SIZE is the size of the part of the Flash ROM/EPROM allocated to
 *		the VxWorks image (block size - size of headers)
 *
 * Two other constants are used:
 * ROM_COPY_SIZE is the size of the part of the ROM to be copied into RAM
 * 		 (uncompressed bootrom)
 * ROM_SIZE_TOTAL is the size of the entire Flash ROM (used in sysPhysMemDesc)
 *
 * The values are given as literals here to make it easier to ensure
 * that they are the same as those in the Makefile.
 */

#define ROM_BASE_ADRS		0x01000000	/* base of Flash/EPROM 16 MB */
#define ROM_TEXT_ADRS		ROM_BASE_ADRS	/* code start addr in ROM */
#define ROM_SIZE		0x0080000	/* size of ROM holding VxWorks 512K*/

#define ROM_COPY_SIZE		ROM_SIZE
#define ROM_SIZE_TOTAL		0x00080000	/* total size of ROM 256 K*/

#define RAM_LOW_ADRS		0x00001000	/* VxWorks image entry point */
#define RAM_HIGH_ADRS		0x00100000	/* RAM address for ROM boot */


/*
 * Flash memory configuration
 *
 * If a Flash memory part is fitted instead of an EPROM, part of it can
 * be used as NVRAM storage, if desired.  If this is wanted, define
 * INCLUDE_FLASH and reduce ROM_SIZE in this file and in Makefile by
 * NV_RAM_SIZE.  The default is not to provide support for Flash.
 */

#undef INCLUDE_FLASH

#ifdef INCLUDE_FLASH
#define FLASH_SIZE		0x80000		/* 512kB */
#define NV_RAM_SIZE		0x100		/* how much Flash we reserve */
#define FLASH_NV_RAM_OFFSET	(FLASH_SIZE - NV_RAM_SIZE)
				/* offset from start of Flash to NVRAM bit */
#undef	NV_BOOT_OFFSET
#define NV_BOOT_OFFSET		0		/* bootline at start of NVRAM */
#define FLASH_NO_OVERLAY	/* do not read-modify-write all of Flash */
#else
#define NV_RAM_SIZE		NONE
#endif	/* INCLUDE_FLASH */


/* Serial port configuration */

#define INCLUDE_SERIAL
#undef	NUM_TTY
#define NUM_TTY			N_SIO_CHANNELS


/*
 * Cache configuration
 *
 * Note that when MMU is enabled, cache modes are controlled by
 * the MMU table entries in sysPhysMemDesc[], not the cache mode
 * macros defined here.
 */

#if (CPU == ARM710A)
/*
 * 710A can be either write-through or copyback (defines whether write-buffer
 * is enabled); cache itself is write-through.
 */

#undef  USER_I_CACHE_MODE
#define USER_I_CACHE_MODE	CACHE_COPYBACK

/* 710A has combined Instruction and Data cache, so modes must be identical */

#undef  USER_D_CACHE_MODE
#define USER_D_CACHE_MODE	(USER_I_CACHE_MODE)

#endif /* CPU == ARM710A */

/* De-select unused (default) network drivers selected in configAll.h */

#undef	INCLUDE_ENP		/* include CMC Ethernet interface*/
#undef	INCLUDE_EX		/* include Excelan Ethernet interface */
#undef	INCLUDE_SM_NET		/* include backplane net interface */
#undef	INCLUDE_SM_SEQ_ADDR	/* shared memory network auto address setup */



/* Enhanced Network Driver (END) Support */

#define INCLUDE_END
#undef	END_OVERRIDE		/* define if you are using old boot ROMs. */

#ifdef	INCLUDE_END
#define INCLUDE_SNDS_END		 /* Include Ethernet driver */
#define INCLUDE_SNDS_HDLC_END	 /* Include HDLC END driver */
#define INCLUDE_OLI_END		/* Olicom PCMCIA Ethernet card END driver */
#undef  WDB_COMM_TYPE 		/* WDB agent communication path is END */ 
/*#define WDB_COMM_TYPE        WDB_COMM_END*/
#define WDB_COMM_TYPE        WDB_COMM_SERIAL
#endif  /* INCLUDE_END */

/* added in configAll.h file by jwchoi */
#undef WDB_TTY_CHANNEL
#define WDB_TTY_CHANNEL		1	/* default Sio SERIAL channel */

/* /tyCo/0 for COM1 port on target system 
*  /tyCo/1 for COM2 port on target systen 
*/
#undef WDB_TTY_DEV_NAME
#define WDB_TTY_DEV_NAME           "/tyCo/0"          /* default TYCODRV_5_2 device name */
/* add end by jwchoi */

#undef CONSOLE_BAUD_RATE
#define CONSOLE_BAUD_RATE		38400

/*
 * Interrupt mode - interrupts can be in either preemptive or non-preemptive
 * mode.  For non-preemptive mode, change INT_MODE to INT_NON_PREEMPT_MODEL
 */

#define INT_MODE	INT_NON_PREEMPT_MODEL


/*
 * miscellaneous definitions
 * Note: ISR_STACK_SIZE is defined here rather than in ../all/configAll.h
 * (as is more usual) because the stack size depends on the interrupt
 * structure of the BSP.
 */

#define ISR_STACK_SIZE	0x800	/* size of ISR stack, in bytes */

/* Optional timestamp support */

#define	INCLUDE_TIMESTAMP	/* to include timestamp driver */

#define INCLUDE_DOSFS
#define INCLUDE_RAMDRV

/* Optional TrueFFS support */

#undef	INCLUDE_TFFS		/* to include TrueFFS driver */

#ifdef INCLUDE_TFFS
#define INCLUDE_SHOW_ROUTINES
#define INCLUDE_DOSFS
#endif /* INCLUDE_TFFS */

/*#define INCLUDE_MMU_BASIC*/
#define INCLUDE_CACHE_SUPPORT

#include "snds100.h"

#endif	/* INCconfigh */
#if defined(PRJ_BUILD)
#include "prjParams.h"
#endif

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