mc68hc908ql4.h

摩托罗拉公司发布的QL4的Lin总线kit,freescale网站上花钱买的

    byte TRIM    :8;
  } MergedBits;
} OSCTRIMSTR;
extern volatile OSCTRIMSTR _OSCTRIM @0x00000038;
#define OSCTRIM _OSCTRIM.Byte
#define OSCTRIM_TRIM0 _OSCTRIM.Bits.TRIM0
#define OSCTRIM_TRIM1 _OSCTRIM.Bits.TRIM1
#define OSCTRIM_TRIM2 _OSCTRIM.Bits.TRIM2
#define OSCTRIM_TRIM3 _OSCTRIM.Bits.TRIM3
#define OSCTRIM_TRIM4 _OSCTRIM.Bits.TRIM4
#define OSCTRIM_TRIM5 _OSCTRIM.Bits.TRIM5
#define OSCTRIM_TRIM6 _OSCTRIM.Bits.TRIM6
#define OSCTRIM_TRIM7 _OSCTRIM.Bits.TRIM7
#define OSCTRIM_TRIM _OSCTRIM.MergedBits.TRIM

/*** ADSCR - ADC Status and Control Register  -MBR ***/
typedef union {
  byte Byte;
  struct {
//    byte CH0     :1;           /* ADC Channel Select Bit 0 */
//    byte CH1     :1;           /* ADC Channel Select Bit 1 */
//    byte CH2     :1;           /* ADC Channel Select Bit 2 */
//    byte CH3     :1;           /* ADC Channel Select Bit 3 */
//    byte CH4     :1;           /* ADC Channel Select Bit 4 */
    byte ADCH0     :1;           /* ADC Channel Select Bit 0 */
    byte ADCH1     :1;           /* ADC Channel Select Bit 1 */
    byte ADCH2     :1;           /* ADC Channel Select Bit 2 */
    byte ADCH3     :1;           /* ADC Channel Select Bit 3 */
    byte ADCH4     :1;           /* ADC Channel Select Bit 4 */
    byte ADCO    :1;           /* ADC Continuous Conversion Bit */
    byte AIEN    :1;           /* ADC Interrupt Enable Bit */
    byte COCO    :1;           /* Conversions Complete Bit */
  } Bits;
  struct {
//    byte CH      :5;
    byte ADCH    :5;    
    byte ADCO    :1;
    byte AIEN    :1;
    byte COCO    :1;
  } MergedBits;
} ADSCRSTR;
extern volatile ADSCRSTR _ADSCR @0x0000003C;
#define ADSCR _ADSCR.Byte
//#define ADSCR_CH0 _ADSCR.Bits.CH0
//#define ADSCR_CH1 _ADSCR.Bits.CH1
//#define ADSCR_CH2 _ADSCR.Bits.CH2
//#define ADSCR_CH3 _ADSCR.Bits.CH3
//#define ADSCR_CH4 _ADSCR.Bits.CH4
#define ADSCR_ADCH0 _ADSCR.Bits.ADCH0
#define ADSCR_ADCH1 _ADSCR.Bits.ADCH1
#define ADSCR_ADCH2 _ADSCR.Bits.ADCH2
#define ADSCR_ADCH3 _ADSCR.Bits.ADCH3
#define ADSCR_ADCH4 _ADSCR.Bits.ADCH4
#define ADSCR_ADCO _ADSCR.Bits.ADCO
#define ADSCR_AIEN _ADSCR.Bits.AIEN
#define ADSCR_COCO _ADSCR.Bits.COCO
//#define ADSCR_CH _ADSCR.MergedBits.CH
#define ADSCR_ADCH _ADSCR.MergedBits.ADCH

/*** ADR - ADC Data Register ***/
//typedef union {
//  byte Byte;
//  struct {
//    byte AD0     :1;           /* ADC Data Bit 0 */
//    byte AD1     :1;           /* ADC Data Bit 1 */
//    byte AD2     :1;           /* ADC Data Bit 2 */
//    byte AD3     :1;           /* ADC Data Bit 3 */
//    byte AD4     :1;           /* ADC Data Bit 4 */
//   byte AD5     :1;           /* ADC Data Bit 5 */
//    byte AD6     :1;           /* ADC Data Bit 6 */
//    byte AD7     :1;           /* ADC Data Bit 7 */
//  } Bits;
//  struct {
//    byte AD      :8;
//  } MergedBits;
//} ADRSTR;
//extern volatile ADRSTR _ADR @0x0000003E;
//#define ADR _ADR.Byte
//#define ADR_AD0 _ADR.Bits.AD0
//#define ADR_AD1 _ADR.Bits.AD1
//#define ADR_AD2 _ADR.Bits.AD2
//#define ADR_AD3 _ADR.Bits.AD3
//#define ADR_AD4 _ADR.Bits.AD4
//#define ADR_AD5 _ADR.Bits.AD5
//#define ADR_AD6 _ADR.Bits.AD6
//#define ADR_AD7 _ADR.Bits.AD7
//#define ADR_AD _ADR.MergedBits.AD

/*** ADRH - ADC Data Register High  -MBR ***/
typedef union {
  byte Byte;
  struct {
    byte AD2     :1;           /* ADC Data Bit 2 */
    byte AD3     :1;           /* ADC Data Bit 3 */
    byte AD4     :1;           /* ADC Data Bit 4 */
    byte AD5     :1;           /* ADC Data Bit 5 */
    byte AD6     :1;           /* ADC Data Bit 6 */
    byte AD7     :1;           /* ADC Data Bit 7 */
    byte AD8     :1;           /* ADC Data Bit 8 */
    byte AD9     :1;           /* ADC Data Bit 9 */
  } Bits;
  struct {
    byte ADH     :8;
  } MergedBits;
} ADRHSTR;
extern volatile ADRHSTR _ADRH @0x0000003D;
#define ADRH _ADRH.Byte
#define ADRH_AD2 _ADRH.Bits.AD2
#define ADRH_AD3 _ADRH.Bits.AD3
#define ADRH_AD4 _ADRH.Bits.AD4
#define ADRH_AD5 _ADRH.Bits.AD5
#define ADRH_AD6 _ADRH.Bits.AD6
#define ADRH_AD7 _ADRH.Bits.AD7
#define ADRH_AD8 _ADRH.Bits.AD8
#define ADRH_AD9 _ADRH.Bits.AD9
#define ADRH_ADH _ADRH.MergedBits.ADH

/*** ADRH - ADC Data Register Low  -MBR ***/
typedef union {
  byte Byte;
  struct {
    byte      :1;           
    byte      :1;           
    byte      :1;           
    byte      :1;           
    byte      :1;           
    byte      :1;           
    byte AD0     :1;           /* ADC Data Bit 0 */
    byte AD1     :1;           /* ADC Data Bit 1 */
  } Bits;
  struct {
    byte ADL     :8;
  } MergedBits;
} ADRLSTR;
extern volatile ADRLSTR _ADRL @0x0000003E;
#define ADRL _ADRL.Byte
#define ADRL_AD0 _ADRL.Bits.AD0
#define ADRL_AD1 _ADRL.Bits.AD1
#define ADRL_ADL _ADRL.MergedBits.ADL


/*** ADCLK - ADC Clock Register  -MBR ***/
typedef union {
  byte Byte;
  struct {
    byte         :1; 
    byte         :1; 
//    byte         :1; 
//    byte         :1; 
//    byte         :1; 
    byte MODE0   :1;           /* ADC Modes of result justification bits*/
    byte MODE1   :1; 
    byte ADICLK  :1;           /* ADC Input Clock Select Bit */
    byte ADIV0   :1;           /* ADC Clock Prescaler Bit 0 */
    byte ADIV1   :1;           /* ADC Clock Prescaler Bit 1 */
    byte ADIV2   :1;           /* ADC Clock Prescaler Bit 2 */
  } Bits;
  struct {
    byte         :1;
    byte         :1;
//    byte         :1;
//    byte         :1;
    byte MODE    :2;
    byte ADICLK  :1;
    byte ADIV    :3;
  } MergedBits;
} ADCLKSTR;
extern volatile ADCLKSTR _ADCLK @0x0000003F;
#define ADCLK _ADCLK.Byte
#define ADCLK_MODE0 _ADCLK.Bits.MODE0
#define ADCLK_MODE1 _ADCLK.Bits.MODE1
#define ADCLK_ADICLK _ADCLK.Bits.ADICLK
#define ADCLK_ADIV0 _ADCLK.Bits.ADIV0
#define ADCLK_ADIV1 _ADCLK.Bits.ADIV1
#define ADCLK_ADIV2 _ADCLK.Bits.ADIV2
#define ADCLK_ADIV _ADCLK.MergedBits.ADIV

/*_______________________________________________________________________________________________*/
/*** ------------ SLIC MODULE REGISTERS HERE ------------ -MBR ***/

/*__________________ SLCC1 - SLIC Control Register 1 _________MBR____*/
typedef union {
  byte Byte;
  struct {
    byte SLCIE   :1;           /* SLIC Interrupt Enable */
    byte IMSG    :1;           /* SLIC Ignore Message Bit */
    byte TXABRT  :1;           /* Transmit Abort Message  */
    byte WAKETX  :1;           /* Transmit Wakeup Symbol */
    byte         :1;           /* reserved */
    byte INITREQ :1;           /* Initialization Request Bit */
    byte         :1;           /* reserved */
    byte         :1;           /* reserved */
  } Bits;
} SLCC1STR;
extern volatile SLCC1STR _SLCC1 @0x00000040;
#define SLCC1 _SLCC1.Byte
#define SLCC1_SLCIE _SLCC1.Bits.SLCIE
#define SLCC1_IMSG _SLCC1.Bits.IMSG
#define SLCC1_TXABRT _SLCC1.Bits.TXABRT
#define SLCC1_WAKETX _SLCC1.Bits.WAKETX
#define SLCC1_INITREQ _SLCC1.Bits.INITREQ

/*__________________ SLCC2 - SLIC Control Register 2 _________MBR____*/
typedef union {
  byte Byte;
  struct {
    byte SLCE    :1;           /* SLIC Module Enable */
    byte         :1;           /* reserved */
    byte BTM     :1;           /* UART Byte Transfer Mode - not enabled in Alpha samples  */
    byte SLCWCM  :1;           /* SLIC Wait Clock Mode */
    byte         :1;           /* reserved */
    byte         :1;           /* reserved */
    byte         :1;           /* reserved */
    byte         :1;           /* reserved */
  } Bits;
} SLCC2STR;
extern volatile SLCC2STR _SLCC2 @0x00000041;
#define SLCC2 _SLCC1.Byte
#define SLCC2_SLCE _SLCC2.Bits.SLCE
#define SLCC2_BTM _SLCC2.Bits.BTM
#define SLCC2_SLCWCM _SLCC2.Bits.SLCWCM

/*__________________ SLCS - SLIC Status Register ___________MBR____*/
typedef union {
  byte Byte;
  struct {
    byte SLCF    :1;           /* SLIC Interrupt Flag */
    byte         :1;           /* reserved */
    byte         :1;           /* reserved  */
    byte         :1;           /* reserved */
    byte         :1;           /* reserved */
    byte INITACK :1;           /* Initialization Mode Acknowledge */
    byte         :1;           /* reserved */
    byte SLCACT  :1;           /* SLIC Active (Oscillator Trim Blocking Semaphore) */
  } Bits;
} SLCSSTR;
extern volatile SLCSSTR _SLCS @0x00000042;
#define SLCS _SLCS.Byte
#define SLCS_SLCF _SLCS.Bits.SLCF
#define SLCS_INITACK _SLCS.Bits.INITACK
#define SLCS_SLCACT _SLCS.Bits.SLCACT

/*__________________ SLCP - SLIC Prescaler Register ________MBR____*/
typedef union {
  byte Byte;
  struct {
    byte         :1;           /* reserved */
    byte         :1;           /* reserved */
    byte         :1;           /* reserved  */
    byte         :1;           /* reserved */
    byte         :1;           /* reserved */
    byte         :1;           /* reserved */
    byte RXFP0   :1;           /* Receive Filter Prescaler 0 */
    byte RXFP1   :1;           /* Receive Filter Prescaler 1 */
  } Bits;
  struct {
    byte         :1;
    byte         :1;
    byte         :1;
    byte         :1;    
    byte         :1;
    byte         :1;    
    byte RXFP    :2;           /* Receive Filter Prescaler 0 & 1 */
  } MergedBits;
} SLCPSTR;
extern volatile SLCPSTR _SLCP @0x00000043;
#define SLCP _SLCP.Byte
#define SLCP_RXFP0 _SLCP.Bits.RXFP0
#define SLCP_RXFP1 _SLCP.Bits.RXFP1
#define SLCP_RXFP _SLCP.MergedBits.RXFP

/*__________________ SLCBTH - SLIC Bit Time Register High ____MBR____*/
typedef union {
  byte Byte;
  struct {
    byte BT8     :1;           /* SLIC Bit Time Register BIT 8  */
    byte BT9     :1;           /* SLIC Bit Time Register BIT 9  */
    byte BT10    :1;           /* SLIC Bit Time Register BIT 10 */
    byte BT11    :1;           /* SLIC Bit Time Register BIT 11 */
    byte BT12    :1;           /* SLIC Bit Time Register BIT 12 */
    byte         :1;           /* reserved */
    byte         :1;           /* reserved */
    byte         :1;           /* reserved */
  } Bits;
  struct {
    byte BT_8   :5;
    byte         :1;
    byte         :1;
    byte         :1;        
  } MergedBits;
} SLCBTHSTR;
extern volatile SLCBTHSTR _SLCBTH @0x00000044;
#define SLCBTH _SLCBTH.Byte
#define SLCBTH_BT8 _SLCBTH.Bits.BT8
#define SLCBTH_BT9 _SLCBTH.Bits.BT9
#define SLCBTH_BT10 _SLCBTH.Bits.BT10
#define SLCBTH_BT11 _SLCBTH.Bits.BT11
#define SLCBTH_BT12 _SLCBTH.Bits.BT12
#define SLCBTH_BT_8 _SLCBTH.MergedBits.BT_8

/*__________________ SLCBTL - SLIC Bit Time Register Low _____MBR____*/
typedef union {
  byte Byte;
  struct {
    byte         :1;           /* reserved (always 0) */
    byte BT1     :1;           /* SLIC Bit Time Register BIT 1  */
    byte BT2     :1;           /* SLIC Bit Time Register BIT 2  */
    byte BT3     :1;           /* SLIC Bit Time Register BIT 3  */
    byte BT4     :1;           /* SLIC Bit Time Register BIT 4  */
    byte BT5     :1;           /* SLIC Bit Time Register BIT 5  */
    byte BT6     :1;           /* SLIC Bit Time Register BIT 6  */
    byte BT7     :1;           /* SLIC Bit Time Register BIT 7  */
  } Bits;
  struct {
    byte         :1;
    byte BT      :7;
  } MergedBits;
} SLCBTLSTR;
extern volatile SLCBTLSTR _SLCBTL @0x00000045;
#define SLCBTL _SLCBTL.Byte
#define SLCBTL_BT1 _SLCBTL.Bits.BT1
#define SLCBTL_BT2 _SLCBTL.Bits.BT2
#define SLCBTL_BT3 _SLCBTL.Bits.BT3
#define SLCBTL_BT4 _SLCBTL.Bits.BT4
#define SLCBTL_BT5 _SLCBTL.Bits.BT5
#define SLCBTL_BT6 _SLCBTL.Bits.BT6
#define SLCBTL_BT7 _SLCBTL.Bits.BT7
#define SLCBTL_BT _SLCBTL.MergedBits.BT

/*__________________ SLCSV - SLIC State Vector Register _____MBR____*/
typedef union {
  byte Byte;
  struct {
    byte         :1;           /* reserved */
    byte         :1;           /* reserved */
    byte I0      :1;           /* Interrupt State Vector (BIT 2)  */
    byte I1      :1;           /* Interrupt State Vector (BIT 3)  */
    byte I2      :1;           /* Interrupt State Vector (BIT 4)  */
    byte I3      :1;           /* Interrupt State Vector (BIT 5)  */
    byte         :1;           /* reserved */
    byte         :1;           /* reserved */
  } Bits;
  struct {
    byte         :1;           // might want to do more here to facilitate jmp tables
    byte         :1;  
    byte I       :4;
    byte         :1;
    byte         :1;
  } MergedBits;
} SLCSVSTR;
extern volatile SLCSVSTR _SLCSV @0x00000046;
#define SLCSV _SLCSV.Byte
#define SLCSV_I0 _SLCSV.Bits.I0
#define SLCSV_I1 _SLCSV.Bits.I1
#define SLCSV_I2 _SLCSV.Bits.I2
#define SLCSV_I3 _SLCSV.Bits.I3
#define SLCSV_I _SLCSV.MergedBits.I

/*__________________ SLCDLC - SLIC Data Length Register _____MBR____*/
typedef union {
  byte Byte;
  struct {
    byte DLC0    :1;           /* Data Length Control Bit 0 */
    byte DLC1    :1;           /* Data Length Control Bit 1 */
    byte DLC2    :1;           /* Data Length Control Bit 2 */
    byte DLC3    :1;           /* Data Length Control Bit 3 */
    byte DLC4    :1;           /* Data Length Control Bit 4 */
    byte DLC5    :1;           /* Data Length Control Bit 5 */
    byte CHKMOD  :1;           /* LIN Checksum Mode */
    byte TXGO    :1;           /* SLIC Transmit Go */