mc68hc908ql4.h

摩托罗拉公司发布的QL4的Lin总线kit,freescale网站上花钱买的

    byte COPD    :1;           /* COP Disable Bit */
    byte STOP    :1;           /* STOP Instruction Enable Bit */
    byte SSREC   :1;           /* Short Stop Recovery Bit */
    byte LVI5OR3 :1;           /* LVI 5-V or 3-V Operating Mode Bit */
    byte LVIPWRD :1;           /* Low Voltage Inhibit Power Disable Bit */
    byte LVIRSTD :1;           /* Low Voltage Inhibit Reset Disable Bit */
    byte LVISTOP :1;           /* LVI Enable in Stop Mode Bit */
    byte COPRS   :1;           /* COP Reset Period Selection Bit */
  } Bits;
} CONFIG1STR;
extern volatile CONFIG1STR _CONFIG1 @0x0000001F;
#define CONFIG1 _CONFIG1.Byte
#define CONFIG1_COPD _CONFIG1.Bits.COPD
#define CONFIG1_STOP _CONFIG1.Bits.STOP
#define CONFIG1_SSREC _CONFIG1.Bits.SSREC
#define CONFIG1_LVI5OR3 _CONFIG1.Bits.LVI5OR3
#define CONFIG1_LVIPWRD _CONFIG1.Bits.LVIPWRD
#define CONFIG1_LVIRSTD _CONFIG1.Bits.LVIRSTD
#define CONFIG1_LVISTOP _CONFIG1.Bits.LVISTOP
#define CONFIG1_COPRS _CONFIG1.Bits.COPRS

/*** TSC - TIM Status and Control Register TSC ***/
typedef union {
  byte Byte;
  struct {
    byte PS0     :1;           /* Prescaler Select Bit */
    byte PS1     :1;           /* Prescaler Select Bit */
    byte PS2     :1;           /* Prescaler Select Bit */
    byte         :1; 
    byte TRST    :1;           /* TIM Reset Bit */
    byte TSTOP   :1;           /* TIM Stop Bit */
    byte TOIE    :1;           /* TIM Overflow Interrupt Enable Bit */
    byte TOF     :1;           /* TIM Overflow Flag Bit */
  } Bits;
  struct {
    byte PS      :3;
    byte         :1;
    byte TRST    :1;
    byte TSTOP   :1;
    byte TOIE    :1;
    byte TOF     :1;
  } MergedBits;
} TSCSTR;
extern volatile TSCSTR _TSC @0x00000020;
#define TSC _TSC.Byte
#define TSC_PS0 _TSC.Bits.PS0
#define TSC_PS1 _TSC.Bits.PS1
#define TSC_PS2 _TSC.Bits.PS2
#define TSC_TRST _TSC.Bits.TRST
#define TSC_TSTOP _TSC.Bits.TSTOP
#define TSC_TOIE _TSC.Bits.TOIE
#define TSC_TOF _TSC.Bits.TOF
#define TSC_PS _TSC.MergedBits.PS

/*** TCNTH - TIM Counter Register High  -MBR ***/
typedef union {
  byte Byte;
  struct {
    byte BIT8    :1;           /* TIM Counter Bit */
    byte BIT9    :1;           /* TIM Counter Bit */
    byte BIT10   :1;           /* TIM Counter Bit */
    byte BIT11   :1;           /* TIM Counter Bit */
    byte BIT12   :1;           /* TIM Counter Bit */
    byte BIT13   :1;           /* TIM Counter Bit */
    byte BIT14   :1;           /* TIM Counter Bit */
    byte BIT15   :1;           /* TIM Counter Bit */
  } Bits;
  struct {
    byte BIT_8   :8;
  } MergedBits;
} TCNTHSTR;
extern volatile TCNTHSTR _TCNTH @0x00000021;
#define TCNTH _TCNTH.Byte
#define TCNTH_BIT8 _TCNTH.Bits.BIT8
#define TCNTH_BIT9 _TCNTH.Bits.BIT9
#define TCNTH_BIT10 _TCNTH.Bits.BIT10
#define TCNTH_BIT11 _TCNTH.Bits.BIT11
#define TCNTH_BIT12 _TCNTH.Bits.BIT12
#define TCNTH_BIT13 _TCNTH.Bits.BIT13
#define TCNTH_BIT14 _TCNTH.Bits.BIT14
#define TCNTH_BIT15 _TCNTH.Bits.BIT15
#define TCNTH_BIT_8 _TCNTH.MergedBits.BIT_8

/*** TCNTL - TIM Counter Register Low ***/
typedef union {
  byte Byte;
  struct {
    byte BIT0    :1;           /* TIM Counter Bit */
    byte BIT1    :1;           /* TIM Counter Bit */
    byte BIT2    :1;           /* TIM Counter Bit */
    byte BIT3    :1;           /* TIM Counter Bit */
    byte BIT4    :1;           /* TIM Counter Bit */
    byte BIT5    :1;           /* TIM Counter Bit */
    byte BIT6    :1;           /* TIM Counter Bit */
    byte BIT7    :1;           /* TIM Counter Bit */
  } Bits;
  struct {
    byte BIT     :8;
  } MergedBits;
} TCNTLSTR;
extern volatile TCNTLSTR _TCNTL @0x00000022;
#define TCNTL _TCNTL.Byte
#define TCNTL_BIT0 _TCNTL.Bits.BIT0
#define TCNTL_BIT1 _TCNTL.Bits.BIT1
#define TCNTL_BIT2 _TCNTL.Bits.BIT2
#define TCNTL_BIT3 _TCNTL.Bits.BIT3
#define TCNTL_BIT4 _TCNTL.Bits.BIT4
#define TCNTL_BIT5 _TCNTL.Bits.BIT5
#define TCNTL_BIT6 _TCNTL.Bits.BIT6
#define TCNTL_BIT7 _TCNTL.Bits.BIT7
#define TCNTL_BIT _TCNTL.MergedBits.BIT

/*** TMODH - TIM Counter Modulo Register High ***/
typedef union {
  byte Byte;
  struct {
    byte BIT8    :1;           /* TIM Counter Modulo Bit */
    byte BIT9    :1;           /* TIM Counter Modulo Bit */
    byte BIT10   :1;           /* TIM Counter Modulo Bit */
    byte BIT11   :1;           /* TIM Counter Modulo Bit */
    byte BIT12   :1;           /* TIM Counter Modulo Bit */
    byte BIT13   :1;           /* TIM Counter Modulo Bit */
    byte BIT14   :1;           /* TIM Counter Modulo Bit */
    byte BIT15   :1;           /* TIM Counter Modulo Bit */
  } Bits;
  struct {
    byte BIT_8   :8;
  } MergedBits;
} TMODHSTR;
extern volatile TMODHSTR _TMODH @0x00000023;
#define TMODH _TMODH.Byte
#define TMODH_BIT8 _TMODH.Bits.BIT8
#define TMODH_BIT9 _TMODH.Bits.BIT9
#define TMODH_BIT10 _TMODH.Bits.BIT10
#define TMODH_BIT11 _TMODH.Bits.BIT11
#define TMODH_BIT12 _TMODH.Bits.BIT12
#define TMODH_BIT13 _TMODH.Bits.BIT13
#define TMODH_BIT14 _TMODH.Bits.BIT14
#define TMODH_BIT15 _TMODH.Bits.BIT15
#define TMODH_BIT_8 _TMODH.MergedBits.BIT_8

/*** TMODL - TIM Counter Modulo Register Low ***/
typedef union {
  byte Byte;
  struct {
    byte BIT0    :1;           /* TIM Counter Modulo Bit */
    byte BIT1    :1;           /* TIM Counter Modulo Bit */
    byte BIT2    :1;           /* TIM Counter Modulo Bit */
    byte BIT3    :1;           /* TIM Counter Modulo Bit */
    byte BIT4    :1;           /* TIM Counter Modulo Bit */
    byte BIT5    :1;           /* TIM Counter Modulo Bit */
    byte BIT6    :1;           /* TIM Counter Modulo Bit */
    byte BIT7    :1;           /* TIM Counter Modulo Bit */
  } Bits;
  struct {
    byte BIT     :8;
  } MergedBits;
} TMODLSTR;
extern volatile TMODLSTR _TMODL @0x00000024;
#define TMODL _TMODL.Byte
#define TMODL_BIT0 _TMODL.Bits.BIT0
#define TMODL_BIT1 _TMODL.Bits.BIT1
#define TMODL_BIT2 _TMODL.Bits.BIT2
#define TMODL_BIT3 _TMODL.Bits.BIT3
#define TMODL_BIT4 _TMODL.Bits.BIT4
#define TMODL_BIT5 _TMODL.Bits.BIT5
#define TMODL_BIT6 _TMODL.Bits.BIT6
#define TMODL_BIT7 _TMODL.Bits.BIT7
#define TMODL_BIT _TMODL.MergedBits.BIT

/*** TSC0 - TIM Channel 0 Status and Control Register ***/
typedef union {
  byte Byte;
  struct {
    byte CH0MAX  :1;           /* Channel 0 Maximum Duty Cycle Bit */
    byte TOV0    :1;           /* Toggle-On-Overflow Bit */
    byte ELS0A   :1;           /* Edge/Level Select Bit */
    byte ELS0B   :1;           /* Edge/Level Select Bit */
    byte MS0A    :1;           /* Mode Select Bit A */
    byte MS0B    :1;           /* Mode Select Bit B */
    byte CH0IE   :1;           /* Channel 0 Interrupt Enable Bit */
    byte CH0F    :1;           /* Channel 0 Flag Bit */
  } Bits;
} TSC0STR;
extern volatile TSC0STR _TSC0 @0x00000025;
#define TSC0 _TSC0.Byte
#define TSC0_CH0MAX _TSC0.Bits.CH0MAX
#define TSC0_TOV0 _TSC0.Bits.TOV0
#define TSC0_ELS0A _TSC0.Bits.ELS0A
#define TSC0_ELS0B _TSC0.Bits.ELS0B
#define TSC0_MS0A _TSC0.Bits.MS0A
#define TSC0_MS0B _TSC0.Bits.MS0B
#define TSC0_CH0IE _TSC0.Bits.CH0IE
#define TSC0_CH0F _TSC0.Bits.CH0F

/*** TCH0H - TIM Channel 0 Register High ***/
typedef union {
  byte Byte;
  struct {
    byte BIT8    :1;           /* TIM Channel Register BIT 8 */
    byte BIT9    :1;           /* TIM Channel Register BIT 9 */
    byte BIT10   :1;           /* TIM Channel Register BIT 10 */
    byte BIT11   :1;           /* TIM Channel Register BIT 11 */
    byte BIT12   :1;           /* TIM Channel Register BIT 12 */
    byte BIT13   :1;           /* TIM Channel Register BIT 13 */
    byte BIT14   :1;           /* TIM Channel Register BIT 14 */
    byte BIT15   :1;           /* TIM Channel Register BIT 15 */
  } Bits;
  struct {
    byte BIT_8   :8;
  } MergedBits;
} TCH0HSTR;
extern volatile TCH0HSTR _TCH0H @0x00000026;
#define TCH0H _TCH0H.Byte
#define TCH0H_BIT8 _TCH0H.Bits.BIT8
#define TCH0H_BIT9 _TCH0H.Bits.BIT9
#define TCH0H_BIT10 _TCH0H.Bits.BIT10
#define TCH0H_BIT11 _TCH0H.Bits.BIT11
#define TCH0H_BIT12 _TCH0H.Bits.BIT12
#define TCH0H_BIT13 _TCH0H.Bits.BIT13
#define TCH0H_BIT14 _TCH0H.Bits.BIT14
#define TCH0H_BIT15 _TCH0H.Bits.BIT15
#define TCH0H_BIT_8 _TCH0H.MergedBits.BIT_8

/*** TCH0L - TIM Channel 0 Register Low ***/
typedef union {
  byte Byte;
  struct {
    byte BIT0    :1;           /* TIM Channel Register BIT 0 */
    byte BIT1    :1;           /* TIM Channel Register BIT 1 */
    byte BIT2    :1;           /* TIM Channel Register BIT 2 */
    byte BIT3    :1;           /* TIM Channel Register BIT 3 */
    byte BIT4    :1;           /* TIM Channel Register BIT 4 */
    byte BIT5    :1;           /* TIM Channel Register BIT 5 */
    byte BIT6    :1;           /* TIM Channel Register BIT 6 */
    byte BIT7    :1;           /* TIM Channel Register BIT 7 */
  } Bits;
  struct {
    byte BIT     :8;
  } MergedBits;
} TCH0LSTR;
extern volatile TCH0LSTR _TCH0L @0x00000027;
#define TCH0L _TCH0L.Byte
#define TCH0L_BIT0 _TCH0L.Bits.BIT0
#define TCH0L_BIT1 _TCH0L.Bits.BIT1
#define TCH0L_BIT2 _TCH0L.Bits.BIT2
#define TCH0L_BIT3 _TCH0L.Bits.BIT3
#define TCH0L_BIT4 _TCH0L.Bits.BIT4
#define TCH0L_BIT5 _TCH0L.Bits.BIT5
#define TCH0L_BIT6 _TCH0L.Bits.BIT6
#define TCH0L_BIT7 _TCH0L.Bits.BIT7
#define TCH0L_BIT _TCH0L.MergedBits.BIT

/*** TSC1 - TIM Channel 1 Status and Control Register ***/
typedef union {
  byte Byte;
  struct {
    byte CH1MAX  :1;           /* Channel 1 Maximum Duty Cycle Bit */
    byte TOV1    :1;           /* Toggle-On-Overflow Bit */
    byte ELS1A   :1;           /* Edge/Level Select Bit */
    byte ELS1B   :1;           /* Edge/Level Select Bit */
    byte MS1A    :1;           /* Mode Select Bit A */
    byte         :1; 
    byte CH1IE   :1;           /* Channel 1 Interrupt Enable Bit */
    byte CH1F    :1;           /* Channel 1 Flag Bit */
  } Bits;
} TSC1STR;
extern volatile TSC1STR _TSC1 @0x00000028;
#define TSC1 _TSC1.Byte
#define TSC1_CH1MAX _TSC1.Bits.CH1MAX
#define TSC1_TOV1 _TSC1.Bits.TOV1
#define TSC1_ELS1A _TSC1.Bits.ELS1A
#define TSC1_ELS1B _TSC1.Bits.ELS1B
#define TSC1_MS1A _TSC1.Bits.MS1A
#define TSC1_CH1IE _TSC1.Bits.CH1IE
#define TSC1_CH1F _TSC1.Bits.CH1F

/*** TCH1H - TIM Channel 1 Register High ***/
typedef union {
  byte Byte;
  struct {
    byte BIT8    :1;           /* TIM Channel Register BIT 8 */
    byte BIT9    :1;           /* TIM Channel Register BIT 9 */
    byte BIT10   :1;           /* TIM Channel Register BIT 10 */
    byte BIT11   :1;           /* TIM Channel Register BIT 11 */
    byte BIT12   :1;           /* TIM Channel Register BIT 12 */
    byte BIT13   :1;           /* TIM Channel Register BIT 13 */
    byte BIT14   :1;           /* TIM Channel Register BIT 14 */
    byte BIT15   :1;           /* TIM Channel Register BIT 15 */
  } Bits;
  struct {
    byte BIT_8   :8;
  } MergedBits;
} TCH1HSTR;
extern volatile TCH1HSTR _TCH1H @0x00000029;
#define TCH1H _TCH1H.Byte
#define TCH1H_BIT8 _TCH1H.Bits.BIT8
#define TCH1H_BIT9 _TCH1H.Bits.BIT9
#define TCH1H_BIT10 _TCH1H.Bits.BIT10
#define TCH1H_BIT11 _TCH1H.Bits.BIT11
#define TCH1H_BIT12 _TCH1H.Bits.BIT12
#define TCH1H_BIT13 _TCH1H.Bits.BIT13
#define TCH1H_BIT14 _TCH1H.Bits.BIT14
#define TCH1H_BIT15 _TCH1H.Bits.BIT15
#define TCH1H_BIT_8 _TCH1H.MergedBits.BIT_8

/*** TCH1L - TIM Channel 1 Register Low ***/
typedef union {
  byte Byte;
  struct {
    byte BIT0    :1;           /* TIM Channel Register BIT 0 */
    byte BIT1    :1;           /* TIM Channel Register BIT 1 */
    byte BIT2    :1;           /* TIM Channel Register BIT 2 */
    byte BIT3    :1;           /* TIM Channel Register BIT 3 */
    byte BIT4    :1;           /* TIM Channel Register BIT 4 */
    byte BIT5    :1;           /* TIM Channel Register BIT 5 */
    byte BIT6    :1;           /* TIM Channel Register BIT 6 */
    byte BIT7    :1;           /* TIM Channel Register BIT 7 */
  } Bits;
  struct {
    byte BIT     :8;
  } MergedBits;
} TCH1LSTR;
extern volatile TCH1LSTR _TCH1L @0x0000002A;
#define TCH1L _TCH1L.Byte
#define TCH1L_BIT0 _TCH1L.Bits.BIT0
#define TCH1L_BIT1 _TCH1L.Bits.BIT1
#define TCH1L_BIT2 _TCH1L.Bits.BIT2
#define TCH1L_BIT3 _TCH1L.Bits.BIT3
#define TCH1L_BIT4 _TCH1L.Bits.BIT4
#define TCH1L_BIT5 _TCH1L.Bits.BIT5
#define TCH1L_BIT6 _TCH1L.Bits.BIT6
#define TCH1L_BIT7 _TCH1L.Bits.BIT7
#define TCH1L_BIT _TCH1L.MergedBits.BIT

/*** OSCSTAT - Oscillator Status Register -MBR ***/
typedef union {
  byte Byte;
  struct {
    byte ECGST   :1;           /* External Clock Status Bit */
    byte ECGON   :1;           /* External Clock Generator On Bit */
//    byte         :1; 
    byte BFS     :1; 		   /* Bus Frequency Select Bit */
    byte         :1; 
    byte         :1; 
    byte         :1; 
    byte         :1; 
    byte         :1; 
  } Bits;
} OSCSTATSTR;
extern volatile OSCSTATSTR _OSCSTAT @0x00000036;
#define OSCSTAT _OSCSTAT.Byte
#define OSCSTAT_ECGST _OSCSTAT.Bits.ECGST
#define OSCSTAT_ECGON _OSCSTAT.Bits.ECGON
#define OSCSTAT_BFS _OSCSTAT.Bits.BFS

/*** OSCTRIM - Oscillator Trim Register ***/
typedef union {
  byte Byte;
  struct {
    byte TRIM0   :1;           /* ICG Trim Factor Bit */
    byte TRIM1   :1;           /* ICG Trim Factor Bit */
    byte TRIM2   :1;           /* ICG Trim Factor Bit */
    byte TRIM3   :1;           /* ICG Trim Factor Bit */
    byte TRIM4   :1;           /* ICG Trim Factor Bit */
    byte TRIM5   :1;           /* ICG Trim Factor Bit */
    byte TRIM6   :1;           /* ICG Trim Factor Bit */
    byte TRIM7   :1;           /* ICG Trim Factor Bit */
  } Bits;
  struct {