fsfchangelog.10

GCC

	* i370/t-mvs: New file.
	* configure (i370-*-mvs*): Use it.
	* i370/mvs.h (FUNCTION_PROLOGUE): LE/370 takes 120 bytes for DSA.
	Have only one copy of timestamp and PPA2 per object module.
	Only have unnamed CSECT to match IBM C.

Mon Mar 18 19:26:21 1996  Paul Russell  ([e-mail])

	* combine.c (simplify_if_then_else): Allow for case that
	condition might no longer be a condition.

Mon Mar 18 19:14:42 1996  Richard Kenner  ([e-mail])

	* c-typeck.c (build_conditional_expr): If OP1 is null, set
	both OP1 and ORIG_OP1 to IFEXP.

	* c-iterate.c (iterator_loop_epilogue): Don't clear DECL_RTL
	for a static decl.

Mon Mar 18 08:02:25 1996  Stephen L Moshier <[e-mail]>

	* alpha.c (summarize_insn, case SUBREG, CONST_*): New cases.

Sun Mar 17 16:55:00 1996  Doug Evans  <[e-mail]>

	* combine.c (find_split_point): Handle NULL return from
	make_extraction.
	(make_field_assignment): Likewise.

Sat Mar 16 18:56:47 1996  Richard Kenner  ([e-mail])

	* tree.c (substitute_in_expr, case COMPONENT_REF): Ignore
	if inner PLACEHOLDER_EXPR has not yet been initialized.

	* i386.c (standard_80386_constant_p): -0.0 is not 0.0.
	* i386.md (insv): Restore missing end of comment.

	* combine.c (make_extraction): Correct typo in force_to_mode
	call in previous change.
	Return 0 if pos+len out of range of want desired mode.

Sat Mar 16 16:20:43 1996  David Mosberger-Tang  <[e-mail]>

	* alpha.md (trap): New attribute.
	Modify patterns for all floating-point trap generating instructions.
	* alpha.h (CPP_SPEC): Added -mieee and -mieee-with-inexact.
	(alpha_trap_precision, alpha_fp_rounding_mode, alpha_fp_trap_mode):
	New enum types.
	(target_flags, alpha_tp, alpha_fprm, alpha_fptm): New external vars.
	(alpha_fprm_string, alpha_fptm_string, alpha_tp_string): Likewise.
	(TARGET_IEEE{,_WITH_INEXACT,_CONFORMANT}): New macros.
	(MASK_IEEE{,_WITH_INEXACT,_CONFORMANT}): Likewise.
	(MASK_FP, MASK_FPREGS,
	(TARGET_SWITCHES): Added "ieee-conformant", "ieee", and
	"ieee-with-inexact"; use MASK symbols.
	(TARGET_OPTIONS): New macro.
	(OVERRIDE_OPTIONS, FINAL_PRESCAN_{INSN,LABEL}): New macros.
	(PRINT_OPERAND_PUNCT_VALID_P): Allow operand codes for FP insns.
	(CC1_SPEC): New macro.
	* alpha.c (alpha_tp, alpha_fprm, alpha_fptm): New variables.
	(alpha_tp_string, alpha_fprm_string, alpha_fptm_string
	(trap_pending): Likewise.
	(override_options, summarize_insn, final_prescan_insn): New functions.
	(print_operand): Handle cases '&', '\'', ')', and '+'.
	(output_prolog): Emit ".eflag 48" if TARGET_IEEE_CONFORMANT.
	(output_epilog): Call final_prescan_insn before emitting epilog.

	* final.c (final_scan_insn, case CODE_LABEL): Invoke
	FINAL_PRESCAN_INSN if FINAL_SCAN_LABEL is defined.

	* alpha/{linux.h,x-linux,xm-linux.h}: New files.
	* configure (alpha-*-linux*): New case.
	* alpha.c (output_prolog): Set alpha_function_needs_gp if profiling
	and TARGET_PROFILING_NEEDS_GP defined.

Thu Mar 14 22:28:20 1996  David Edelsohn  <[e-mail]>

	* rs6000.h (LEGITIMATE_OFFSET_ADDRESS_P): Fix last change.
	* aix41.h (LINK_SPEC): add -bnoentry if shared and no explicit entry.

Thu Mar 14 12:47:33 1996  Jim Wilson  <[e-mail]>

	* mips.h (ASM_OUTPUT_DOUBLE_INT): Use 'X' if CONST_INT and
	HOST_BITS_PER_WIDE_INT == 64.

	* mips.c (mips_expand_prologue): Change TYPE_NEEDS_CONSTRUCTING to
	TREE_ADDRESSABLE;

Thu Mar 14 11:21:37 1996  Michael Meissner  <[e-mail]>

	* rs6000.h (LEGITIMATE_OFFSET_ADDRESS_P): For 32-bit mode,
	allow TImode variables with int offsets, so that structures
	greater than 8 bytes and less than or equal to 16 bytes can be
	instantiated correctly.

	* rs6000.c (rs6000_valid_type_attribute_p): Add exception
	attribute for Windows NT.

	* win-nt.h (ASM_OUTPUT_FUNCTION_PREFIX): Delete, merge into
	ASM_DECLARE_FUNCTION_NAME.
	(ASM_DECLARE_FUNCTION_NAME): Add support for exception attribute
	setting fields 3 & 4 of the structured exception handling table.

Thu Mar 14 01:53:19 1996  Jeffrey A. Law  <[e-mail]>

	* pa.h (ASM_DECLARE_FUNCTION_NAME): Change TYPE_NEEDS_CONSTRUCTING
	to TREE_ADDRESSABLE.  From Jim Wilson.

Wed Mar 13 13:40:32 1996  Jim Wilson  <[e-mail]>

	* c-tree.h (warn_sign_compare): Add extern to declaration.

Wed Mar 13 13:37:00 1996  Doug Evans  <[e-mail]>

	* configure: Use cross-make and build-make if building
	cross compiler with cross compiler.

Wed Mar 13 12:00:34 1996  Michael Meissner  <[e-mail]>

	* i386/cygwin32.h (ASM_OUTPUT_ALIGN): Correct defination.

	* rs6000/{win-nt,cygwin32}.h (STARTFILE_SPEC): Add crti.o before
	all objects.
	(ENDFILE_SPEC): Add crtn.o after all objects.

	* configure (powerpcle-*-cygwin32): Use t-winnt, not t-cygin32
	* rs6000/t-cygwin32: Delete, no longer used.

	* rs6000/t-winnt ({,INSTALL_}LIBGCC): Build and install crti.o and
	crtn.o.

	* rs6000/win-nt.h (EXTRA_SECTION_FUNCTIONS): Add ctors_section and
	dtors_section.
	(INVOKE__main): Define, so that __main is called.
	(ASM_OUTPUT_{CONSTRUCTOR,DESTRUCTOR}): Define to put pointers to
	the constructor/destructor in the appropriate section.

	* nt-c{i,n}.asm: New files to be linked before/after all of the users'
	objects.

Wed Mar 13 00:42:17 1996  Per Bothner  <[e-mail]>

	* dbxout.c (dbxout_type):  Better "variant" handling to ignore
	const/volatile but not typedef names.  Improves Feb 12 change.

Tue Mar 12 17:25:14 1996  David Mosberger-Tang  <[e-mail]>

	* glimits.h (__LONG_MAX__): On Alpha, use 64 bit value.

Tue Mar 12 15:07:49 1996  Torbjorn Granlund  <[e-mail]>

	* m68k.c (valid_dbcc_comparison_p): Don't test cc_prev_status here.
	(flags_in_68881): New function.
	* m68k.md (dbra peepholes): Use flags_in_68881.

Tue Mar 12 13:54:15 1996  Richard Kenner  ([e-mail])

	* sparc.md (nonlocal_goto): Emit barrier after jump.
	(setjmp{,_64,_32}): New patterns.

Tue Mar 12 12:43:27 1996  Jim Wilson  <[e-mail]>

	* i960.h (ROUND_TYPE_SIZE): Return round_up result instead of
	COMPUTED.

	* expr.c (expand_expr, case COMPONENT_REF): For unaligned object in
	an aligned union, delete check for EXPAND_SUM.

	* expr.h (clear_storage): Add comment terminator.

Mon Mar 11 19:07:50 1996  Jeffrey A. Law  <[e-mail]>

	* recog.c (constrain_operands, case 'V'): Don't call
	offsettable_memref_p before reload has completed.

Mon Mar 11 16:06:13 1996  Doug Evans  <[e-mail]>

	* h8300.h (SP_AND_G_REGS): Renamed from SP_AND_G_REG.
	(CC_DONE_CBIT): Delete.
	(CC_OVERFLOW_0,CC_OVERFLOW_UNUSABLE,CC_NO_CARRY): Define.
	* h8300.c (cond_string): Delete CC_DONE_CBIT handling.
	(notice_update_cc): Delete CC_CBIT, CC_WHOOPS.  Add CC_SET_ZN_C0.
	(restore_compare_p): New function.
	(shift_one): Use shll instead of shal so overflow bit is usable.
	Set cc_valid bits to cc_status.flags values.
	(emit_a_shift): Set cc_status.flags.
	* h8300.md (attr cc): Delete whoops,cbit.  Add set_zn_c0.
	(all patterns) Update cc attr setting.
	(tstqi,tsthi,tstsi): Delete CC_DONE_CBIT handling.
	(addhi3,subhi3): Change define_expand to define_insn.
	(branch_true,branch_false): Check if compare needs to be restored.

Mon Mar 11 13:55:23 1996  Michael Meissner  <[e-mail]>

	* rs6000.h (CONST_DOUBLE_OK_FOR_LETTER_P): Add 'H' for movdi
	patterns in 32 bit that generate 3 instructions.
	(num_insns_constant): Add declaration.

	* rs6000.c (num_insns_constant{,_wide}) Functions to determine the
	number of insns it takes to generate an integer constant.
	(easy_fp_constant): Allow DImode in easy constants.  Use
	num_insns_constant_wide.
	(input_operand): Allow any CONST_{INT,DOUBLE}'s for {SI,DI}mode.

	* rs6000.md (movdi): Generate a normal movdi using a CONST_DOUBLE
	for 32 bit mode rather than using SUBREG's.  For 64 bit mode,
	break large integer constants into smaller pieces.  Add various
	define_splits to handle loading the various DImode constants.

Mon Mar 11 06:54:19 1996  Richard Kenner  ([e-mail])

	* combine.c (make_extraction): Use proper mode for INNER in all cases.
	(simplify_comparison, case ZERO_EXTRACT): For bits big endian and
	no extzv, use BITS_PER_WORD.
	* fx80.md, gmicro.md, i386.md, m68k.md, tahoe.md, vax.md:
	Use proper modes and predicates for {sign,zero}_extract.

Sun Mar 10 06:23:52 1996  J"orn Rennecke ([e-mail])

	* emit-rtl.c (free_insn): New variable.
	(init_emit, restore_emit_status): Clear it.
	(gen_sequence): Store insn in free_insn when sequence length is 1.
	(make_insn_raw): Use free_insn if available and still in the
	rtl generation phase.

Fri Mar  8 15:37:31 1996  Mike Stump  <[e-mail]>

	* expr.c (expand_expr, case TARGET_EXPR): Delay putting the cleanup
	on the cleanup chain until after the subexpression has been expanded.

Fri Mar  8 16:14:51 1996  J"orn Rennecke ([e-mail])

        * i386.c (ix86_binary_operator_ok): One memory operand is OK.
        This is independent of commutativity.

Fri Mar  8 14:07:43 1996  Jim Wilson  <[e-mail]>

	* expr.c (store_constructor_field): Call store_field if bitpos is
	nonzero and target is not a MEM.

	* jump.c (jump_optimize): When handle a USE insn before an
	unconditional jump, disable the optimization if the USE is the
	only insn in the loop.

	* sh.c (reg_unused_after): Return 0 if see a JUMP_INSN.

Fri Mar  8 12:08:36 1996  Doug Evans  <[e-mail]>

	* sparc/lynx.h (CPP_SPEC): Use %(cpp_cpu).

	* sparc/sparc.md (move_pic_label_si,move_label_di): Rewrite length
	attr calcs to be more conservative.

Thu Mar  7 19:14:21 1996  Doug Evans  <[e-mail]>

	* sparc/t-splet: New file.
	* sparc/splet.h: New file.
	* configure (sparclet-*-aout*): Use them.

	* sparc.h (MASK_LIVE_G0,TARGET_LIVE_G0): Define.
	(FIRST_PSEUDO_REGISTER): Add 1 for %icc (now 101).
	(FIXED_REGISTERS,CALL_USED_REGISTERS): Update.
	(FIXED_REGISTERS): %g0 is fixed by default.
	(SPARC_{FIRST,LAST}_V9_FCC_REG): Define.
	(SPARC_{ICC,FCC}_REG): Define.
	(CONDITIONAL_REGISTER_USAGE): Don't fix %fcc0 if v8.
	(REG_CLASS_CONTENTS): Reg 0 is an int reg, reg 100 is %icc.
	(REGNO_REG_CLASS): Rewrite to use global `sparc_regno_reg_class'.
	(REG_ALLOC_ORDER,REG_LEAF_ALLOC_ORDER,LEAF_REGISTERS): Add %icc.
	(REG_CLASS_FROM_LETTER): Handle 'c' for FPCC_REGS in non-v9 case.
	(REGNO_OK_FOR_{BASE,INDEX}_P): Treat %g0 as a normal reg.
	(REG_OK_FOR_{BASE,INDEX}_P,EXTRA_CONSTRAINT): Likewise.
	(REGISTER_NAMES): Add %icc.
	(ADDITIONAL_REGISTER_NAMES): Use SPARC_ICC_REG.
	* sparc.c (leaf_reg_remap): Add %icc=100.
	(reg_or_0_operand): Don't allow 0 if TARGET_LIVE_G0.
	(fcc_reg_operand): Renamed from ccfp_reg_operand.
	Use SPARC_FCC_REG.  Don't treat reg 0 as an fcc reg.  Don't match
	modes if `mode' argument is VOIDmode.
	(icc_or_fcc_reg_operand): New function.
	(gen_compare_reg): Use SPARC_FCC_REG for v8 fp compares.
	Use SPARC_ICC_REG for int compares.
	(eligible_for_epilogue_delay): Don't allow anything if TARGET_LIVE_G0.
	Delete unnecessary test for %g0.
	(emit_move_sequence): Don't emit (set (mem) (const_int 0)) if
	TARGET_LIVE_G0.
	(output_scc_insn): Label moved to operand 3.  Condition code reg
	moved to operand 2.
	(sparc_mode_class): Enum C_MODE renamed to CC_MODE.
	(hard_32bit_mode_classes): Set reg 0 to S_MODES.  Add entry for %icc.
	(hard_64bit_mode_classes): Set reg 0 to D_MODES.  Add entry for %icc.
	(sparc_regno_reg_class): New global.
	(sparc_init_modes): Initialize it.
	(output_cbranch): Delete fp_cond_reg argument.
	(print_operand, MEM op): Don't print "%g0+" if TARGET_LIVE_G0.
	(sparc_flat_eligible_for_epilogue_delay): Don't allow anything if
	TARGET_LIVE_G0.
	* sparc.md (live_g0): New attribute.
	(*): Integer condition code register is now reg 100.
	Use SPARC_ICC_REG instead of hardcoding reg 100 where possible.
	Non-v9 floating point condition code register is now reg 96.
	(*cmp{sf,df,tf}_{fpe,fp}_sp{32,64}): Combine v9/non-v9 cases.
	(*{normal,inverted}_{,fp,fpe}_branch): Update call to output_cbranch.
	(*mov{qi,hi,si}_insn): Don't use if TARGET_LIVE_G0.
	(*mov{qi,hi,si}_insn_liveg0): New patterns.
	(*mov{si,di,sf,df,tf}_ccfp{,e}_sp64): ccfp_reg_operand renamed to
	fcc_reg_operand.
	(*negdi2_sp32,negsi2,one_cmplsi2,ffssi2): Ensure %%g0 is 0 if
	TARGET_LIVE_G0.
	(*one_cmpldi2_sp32): Move operand 1 to rs1 and use 0 as rs2.
	(patterns that use %g0 in rs2): Use 0 immediate value instead.
	(patterns that read %g0): Don't use if TARGET_LIVE_G0.

Thu Mar  7 15:39:16 1996  Jim Wilson  <[e-mail]>

	* sh.h (PASS_IN_REG_P): Change < to <=.
	* va-sh.h (va_start): Change __SH3E___ to __SH3E__.
	(va_arg): Add little-endian SH3E support.  Fix big-endian version
	to work for arguments smaller than the word size.

Thu Mar  7 10:37:37 1996  Jeffrey A. Law  <[e-mail]>

	* lib2funcs.asm: Remove entry/exit routines.  Move them into...
	* ee.asm: New file.  Entry/exit code.
	* ee_fp.asm: New file.  Entry/exit code with frame pointer.
	* t-pa: Corresponding changes.