psocgpioint.inc

用VC编辑的一个MD5算法

; AnalogColumn_InputMUX_1 address and mask equates
AnalogColumn_InputMUX_1_Bypass_ADDR:	equ	2h
AnalogColumn_InputMUX_1_Data_ADDR:	equ	0h
AnalogColumn_InputMUX_1_DriveMode_0_ADDR:	equ	100h
AnalogColumn_InputMUX_1_DriveMode_1_ADDR:	equ	101h
AnalogColumn_InputMUX_1_IntCtrl_0_ADDR:	equ	102h
AnalogColumn_InputMUX_1_IntCtrl_1_ADDR:	equ	103h
AnalogColumn_InputMUX_1_IntEn_ADDR:	equ	1h
AnalogColumn_InputMUX_1_MASK:	equ	1h
; AnalogColumn_InputMUX_2 address and mask equates
AnalogColumn_InputMUX_2_Bypass_ADDR:	equ	2h
AnalogColumn_InputMUX_2_Data_ADDR:	equ	0h
AnalogColumn_InputMUX_2_DriveMode_0_ADDR:	equ	100h
AnalogColumn_InputMUX_2_DriveMode_1_ADDR:	equ	101h
AnalogColumn_InputMUX_2_IntCtrl_0_ADDR:	equ	102h
AnalogColumn_InputMUX_2_IntCtrl_1_ADDR:	equ	103h
AnalogColumn_InputMUX_2_IntEn_ADDR:	equ	1h
AnalogColumn_InputMUX_2_MASK:	equ	2h
; AnalogOutBuf_3 address and mask equates
AnalogOutBuf_3_Bypass_ADDR:	equ	2h
AnalogOutBuf_3_Data_ADDR:	equ	0h
AnalogOutBuf_3_DriveMode_0_ADDR:	equ	100h
AnalogOutBuf_3_DriveMode_1_ADDR:	equ	101h
AnalogOutBuf_3_IntCtrl_0_ADDR:	equ	102h
AnalogOutBuf_3_IntCtrl_1_ADDR:	equ	103h
AnalogOutBuf_3_IntEn_ADDR:	equ	1h
AnalogOutBuf_3_MASK:	equ	4h
; AnalogOutBuf_0 address and mask equates
AnalogOutBuf_0_Bypass_ADDR:	equ	2h
AnalogOutBuf_0_Data_ADDR:	equ	0h
AnalogOutBuf_0_DriveMode_0_ADDR:	equ	100h
AnalogOutBuf_0_DriveMode_1_ADDR:	equ	101h
AnalogOutBuf_0_IntCtrl_0_ADDR:	equ	102h
AnalogOutBuf_0_IntCtrl_1_ADDR:	equ	103h
AnalogOutBuf_0_IntEn_ADDR:	equ	1h
AnalogOutBuf_0_MASK:	equ	8h
; AnalogOutBuf_2 address and mask equates
AnalogOutBuf_2_Bypass_ADDR:	equ	2h
AnalogOutBuf_2_Data_ADDR:	equ	0h
AnalogOutBuf_2_DriveMode_0_ADDR:	equ	100h
AnalogOutBuf_2_DriveMode_1_ADDR:	equ	101h
AnalogOutBuf_2_IntCtrl_0_ADDR:	equ	102h
AnalogOutBuf_2_IntCtrl_1_ADDR:	equ	103h
AnalogOutBuf_2_IntEn_ADDR:	equ	1h
AnalogOutBuf_2_MASK:	equ	10h
; AnalogOutBuf_1 address and mask equates
AnalogOutBuf_1_Bypass_ADDR:	equ	2h
AnalogOutBuf_1_Data_ADDR:	equ	0h
AnalogOutBuf_1_DriveMode_0_ADDR:	equ	100h
AnalogOutBuf_1_DriveMode_1_ADDR:	equ	101h
AnalogOutBuf_1_IntCtrl_0_ADDR:	equ	102h
AnalogOutBuf_1_IntCtrl_1_ADDR:	equ	103h
AnalogOutBuf_1_IntEn_ADDR:	equ	1h
AnalogOutBuf_1_MASK:	equ	20h
; AnalogColumn_InputMUX_2 address and mask equates
AnalogColumn_InputMUX_2_Bypass_ADDR:	equ	2h
AnalogColumn_InputMUX_2_Data_ADDR:	equ	0h
AnalogColumn_InputMUX_2_DriveMode_0_ADDR:	equ	100h
AnalogColumn_InputMUX_2_DriveMode_1_ADDR:	equ	101h
AnalogColumn_InputMUX_2_IntCtrl_0_ADDR:	equ	102h
AnalogColumn_InputMUX_2_IntCtrl_1_ADDR:	equ	103h
AnalogColumn_InputMUX_2_IntEn_ADDR:	equ	1h
AnalogColumn_InputMUX_2_MASK:	equ	80h