rs_timer.asm

用VC编辑的一个MD5算法

;------------------------------------------------------------------------------
;  FILENAME:   Rs_Timer.asm
;   VERSION:   Rev B, 2002 Mar 30
;------------------------------------------------------------------------------
;  DESCRIPTION:
;     Rs_Timer Timer8 User Module API.
;------------------------------------------------------------------------------
;	Copyright (c) Cypress MicroSystems 2000-2002. All Rights Reserved.
;------------------------------------------------------------------------------

;-----------------------------------------------
; include instance specific register definitions
;-----------------------------------------------
include "m8c.inc"
include "Rs_Timer.inc"

area text (ROM, REL)

;-------------------------------------------------------------------
;  Declare the functions global for both assembler and C compiler.
;
;  Note that there are two names for each API. First name is 
;  assembler reference. Name with underscore is name refence for
;  C compiler.  Calling function in C source code does not require 
;  the underscore.
;-------------------------------------------------------------------
export   Rs_Timer_EnableInt
export  _Rs_Timer_EnableInt
export   Rs_Timer_DisableInt
export  _Rs_Timer_DisableInt
export   Rs_Timer_Start
export  _Rs_Timer_Start
export   Rs_Timer_Stop
export  _Rs_Timer_Stop
export   Rs_Timer_WritePeriod
export  _Rs_Timer_WritePeriod
export   Rs_Timer_WriteCompareValue
export  _Rs_Timer_WriteCompareValue
export   bRs_Timer_ReadCompareValue
export  _bRs_Timer_ReadCompareValue
export   bRs_Timer_ReadTimer
export  _bRs_Timer_ReadTimer 
export   bRs_Timer_ReadTimerSaveCV
export  _bRs_Timer_ReadTimerSaveCV 
export   bRs_Timer_ReadCounter       ; obsolete
export  _bRs_Timer_ReadCounter       ; obsolete
export   bRs_Timer_CaptureCounter    ; obsolete
export  _bRs_Timer_CaptureCounter    ; obsolete

;-----------
;  EQUATES
;-----------
bfCONTROL_REG_START_BIT:   equ   1     ; Control register start bit 

;-----------------------------------------------------------------------------
;  FUNCTION NAME: Rs_Timer_EnableInt
;
;  DESCRIPTION:
;     Enables this Timer's interrupt by setting the interrupt enable mask bit
;     associated with this User Module. Remember to call the global interrupt
;     enable function by using the macro: M8C_EnableGInt.
;
;  ARGUMENTS:
;     none.
;
;  RETURNS:
;     none.
;
;  SIDE EFFECTS:
;     none.
;
;  THEORY of OPERATION:  
;     Sets the specific user module interrupt enable mask bit.
;
;-----------------------------------------------------------------------------
 Rs_Timer_EnableInt:
_Rs_Timer_EnableInt:
   M8C_EnableIntMask Rs_Timer_INT_REG, bRs_Timer_INT_MASK
   ret	

	
;-----------------------------------------------------------------------------
;  FUNCTION NAME: Rs_Timer_DisableInt
;
;  DESCRIPTION:
;     Disables this timer's interrupt by clearing the interrupt enable mask bit
;     associated with this User Module. 
;
;  ARGUMENTS:
;     none.
;
;  RETURNS:
;     none.
;
;  SIDE EFFECTS:
;     none.
;
;  THEORY of OPERATION:  
;     Clears the specific user module interrupt enable mask bit.
;
;-----------------------------------------------------------------------------
 Rs_Timer_DisableInt:
_Rs_Timer_DisableInt:
   M8C_DisableIntMask Rs_Timer_INT_REG, bRs_Timer_INT_MASK
   ret


;-----------------------------------------------------------------------------
;  FUNCTION NAME: Rs_Timer_Start
;
;  DESCRIPTION:
;     Sets the start bit in the Control register of this user module.  The
;     timer will begin counting on the next input clock.
;
;  ARGUMENTS:
;     none.
;
;  RETURNS:
;     none.
;
;  SIDE EFFECTS:
;     none.
;
;  THEORY of OPERATION:  
;     Set the start bit in the Control register.
;
;-----------------------------------------------------------------------------
 Rs_Timer_Start:
_Rs_Timer_Start:
   or    REG[Rs_Timer_CONTROL_REG], bfCONTROL_REG_START_BIT
   ret	


;-----------------------------------------------------------------------------
;  FUNCTION NAME: Rs_Timer_Stop
;
;  DESCRIPTION:
;     Disables Timer operation.
;
;  ARGUMENTS:
;     none.
;
;  RETURNS:
;     none.
;
;  SIDE EFFECTS:
;     After this function completes, the Counter register will latch any data
;     written to the Period register.  Writing to the Period register is 
;     performed using the Rs_Timer_WritePeriod function.
;
;  THEORY of OPERATION:  
;     Clear the start bit in the Control register.
;
;-----------------------------------------------------------------------------
 Rs_Timer_Stop:
_Rs_Timer_Stop:
   and   REG[Rs_Timer_CONTROL_REG], ~bfCONTROL_REG_START_BIT
   ret	


;-----------------------------------------------------------------------------
;  FUNCTION NAME: Rs_Timer_WritePeriod
;
;  DESCRIPTION:
;     Write the period value into the Period register.
;
;  ARGUMENTS:
;     BYTE  bPeriodValue - period count - passed in the Accumulator.
;
;  RETURNS:
;     none.
;
;  SIDE EFFECTS:
;     If the Timer user module is stopped, then this value will also be
;     latched into the Counter register.
;
;  THEORY of OPERATION:  
;     Write data into the Period register.
;
;-----------------------------------------------------------------------------
 Rs_Timer_WritePeriod:
_Rs_Timer_WritePeriod:
   tst   REG[Rs_Timer_CONTROL_REG], bfCONTROL_REG_START_BIT
   jnz   .CounterRunning

; Counter is stopped.  Due to chip errata, we have to set the clock low for
; the write to the period register to cause the data to be immediately transferred
; into the Counter.
.CounterStopped:
   push  X
   mov   X, A                                   ; save the period argument
   M8C_SetBank1
   mov   A, REG[Rs_Timer_INPUT_REG]            ; save the context of the clock - input register
   push  A
   and   REG[Rs_Timer_INPUT_REG], F0h          ; set the clock signal low
   M8C_SetBank0
   mov   A, X                                      
   mov   REG[Rs_Timer_PERIOD_REG], A               ; set the period register with the new period
   pop   A
   M8C_SetBank1
   mov   REG[Rs_Timer_INPUT_REG], A            ; restore the clock
   M8C_SetBank0
   pop   X
   ret

; Counter is running - write the period into the period register.
; Upon Terminal Count this value will get loaded into the counter.
.CounterRunning:
   mov   REG[Rs_Timer_PERIOD_REG], A
   ret


;-----------------------------------------------------------------------------
;  FUNCTION NAME: Rs_Timer_WriteCompareValue
;
;  DESCRIPTION:
;     Writes compare value into the CompareValue register.
;
;     NOTE! The Timer user module must be STOPPED in order to write
;           the CompareValue register.
;
;  ARGUMENTS:
;     BYTE  bCompareValue - compare value count - passed in Accumulator.
;
;  RETURNS:
;     none.
;
;  SIDE EFFECTS:
;     none.
;
;  THEORY of OPERATION:  
;     Write data into the CompareValue register.
;
;-----------------------------------------------------------------------------
 Rs_Timer_WriteCompareValue:
_Rs_Timer_WriteCompareValue:
   mov   REG[Rs_Timer_COMPARE_REG], A
   ret


;-----------------------------------------------------------------------------
;  FUNCTION NAME: bRs_Timer_ReadCompareValue
;
;  DESCRIPTION:
;     Reads the CompareValue register.
;
;  ARGUMENTS:
;     none.
;
;  RETURNS:
;     BYTE  bCompareValue - value read from CompareValue register - returned
;                           in the Accumulator.
;
;  SIDE EFFECTS:
;     none.
;
;  THEORY of OPERATION:  
;     Read the CompareValue register and return value in A.
;
;-----------------------------------------------------------------------------
 bRs_Timer_ReadCompareValue:
_bRs_Timer_ReadCompareValue:
   mov   A, REG[Rs_Timer_COMPARE_REG]
   ret


;-----------------------------------------------------------------------------
;  FUNCTION NAME: bRs_Timer_ReadTimerSaveCV
;
;  DESCRIPTION:
;     Reads the count in the Counter register.  This function preserves the
;     contents of the CompareValue register.  However, the cost of doing so
;     is that the counter is halted.  This may cause the timer to miss one or 
;     more counts, depending on the speed of the input clock.
;
;  ARGUMENTS:
;     none.
;
;  RETURNS:
;     WORD  bCount - current count value in Count register.
;        Returned in A register
;
;  SIDE EFFECTS:
;     1) May cause an interrupt, if interrupt on CompareValue is enabled.
;     2) The user module is stopped momentarily while the compare value is
;        restored.  This may cause the Count register to miss one or more
;        counts depending on the input clock speed.
;     3) Interrupts are momentarily disabled - this may cause other interrupt
;        latency issues.
;
;  THEORY of OPERATION:  
;     1) Read and save the CompareValue register.
;     2) Read the Counter register, causing its data to be latched into 
;        the CompareValue register.
;     3) Read and save the Counter value, now in the CompareValue register,
;        to the buffer.
;     4) Disable global interrupts
;     5) Halt the timer
;     6) Restore the CompareValue register values
;     7) Start the Counter again
;     8) Restore global interrupt state
;
;-----------------------------------------------------------------------------
 bRs_Timer_ReadTimerSaveCV:
_bRs_Timer_ReadTimerSaveCV:
 bRs_Timer_ReadCounter:           ;  OBSOLETE
_bRs_Timer_ReadCounter:           ;  OBSOLETE 

CpuFlags:      equ   0
bCount:        equ   1

   ; setup a stack frame to save bCount and CPU flags on the stack
   ; X now points to the MSB of the returned data - stored on stack
   mov   X, SP
   ADD   SP, 2

   ; save the control register on the stack
   mov   A, reg[Rs_Timer_CONTROL_REG]
   push  A

   ; save the CompareValue register value
   mov   A, reg[Rs_Timer_COMPARE_REG]    
   push  A

   ; Read the LSB counter. This latches the counter data into the
   ; CompareValue register of all bytes of chained PSoC blocks!
   ; This may cause an interrupt.
   mov   A, reg[Rs_Timer_COUNTER_REG]    

   ; Read the CompareValue register, which contains the counter value
   ; and store the result in the stack frame
   mov   A, reg[Rs_Timer_COMPARE_REG]    
   mov   [X+bCount], A

   ; determine current interrupt state and save in stack frame
   mov   A, 0
   tst   reg[CPU_SCR], CPUSCR_GIEMask
   jz    .SetupStatusFlag
   mov   A, FlagGlobalIE
.SetupStatusFlag:
   mov   [X+CpuFlags], A
      
   ; disable interrupts for the time being
   M8C_DisableGInt   

   ; stop the timer
   and   reg[Rs_Timer_CONTROL_REG], ~bfCONTROL_REG_START_BIT

   ; Restore the CompareValue register
   pop   A
   mov   reg[Rs_Timer_COMPARE_REG], A

   ; restore start state of the timer
   pop   A
   mov   reg[Rs_Timer_CONTROL_REG], A

   ; Return result stored in stack frame - just pop them off!
   pop   A

   ; processor status flag is still on the stack! Use the RETI
   ; command to restore it.   
   reti


;-----------------------------------------------------------------------------
;  FUNCTION NAME: bRs_Timer_ReadTimer
;
;  DESCRIPTION:
;     Performs a software capture of the Counter register.  A synchronous
;     read of the counter register is performed.  The timer is NOT stopped.
;
;     WARNING - this will cause loss of the CompareValue register data.
;
;  ARGUMENTS:
;     none.
;
;  RETURNS:
;     BYTE  bCount - current count value in Count register.
;        Returned in A register
;
;  SIDE EFFECTS:
;     May cause an interrupt.
;
;  THEORY of OPERATION:  
;     1) Read the CounterRegister - this causes the count value to be 
;        latched into the CompareValue registers.
;     2) Read and return the count register values from the CompareValue
;        registers into the return buffer.
;
;-----------------------------------------------------------------------------
 bRs_Timer_ReadTimer:
_bRs_Timer_ReadTimer:
 bRs_Timer_CaptureCounter:        ;  OBSOLETE - saved for backwards compatibility
_bRs_Timer_CaptureCounter:        ;  OBSOLETE - saved for backwards compatibility

   ; Read the counter. This latches the counter data into the
   ; CompareValue register. This may cause an interrupt.
   mov   A, REG[Rs_Timer_COUNTER_REG]    

   ; Read the CompareValue register, which contains the counter value
   ; and store ther return result
   mov   A, REG[Rs_Timer_COMPARE_REG]    

   ret

; end of Timer8 API code