txc_envoy_spi3_real.c

TranSwitch Envoy CE2 & Envoy CE4 设备驱动及编程指南

/************************************************************************************/
/*||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||*/
/************************************************************************************/
/*--------------------------------------------------------------------------*

   FUNCTION:  ENVOY_SetSpi3InputFlowCtrlCfgReal

   DESCRIPTION: This function actually processess the TXC_IfSPI3_InputFlowCtrlCfgSet
                API function.

   INPUTS:  Same as TXC_IfSPI3_InputFlowCtrlCfgSet except for the interfaceId

   RETURNS:  TXC_NO_ERR or an appropriate specific error code listed in
   appendix.

   CAVEATS: None

   REVISION HISTORY:

    Rev #     Date          Author                Description
   -----    -------      ------------         ----------------------
   0.5.0    6/03/04      F. Giannella         Initial release (beta)
 *--------------------------------------------------------------------------*/

TXC_U16BIT ENVOY_SetSpi3InputFlowCtrlCfgReal (TXC_U16BIT handle, TXC_U16BIT port,
           TXC_IfSPI3_INPUT_FLOW_CTRL_STRUCT  *spi3InputFlowCtrlDataPtr)
{
    TXC_U16BIT error = TXC_NO_ERR;
    TXC_BATCH_REG_ACCESS_32BIT_STRUCT batchData;
    TXC_REG_ACCESS_32BIT_STRUCT regData[4];
    TXC_REG_32 * baseAddr;
    TXC_SEM_ID semId;
    TXC_U16BIT rtosError;
    ENVOY_ISPI_CFG_STRUCT *spi3InputFlowCtrlPtr;

    /* First, fill the batch platform header. This function requires 2
       registers to be written */
    memset (&regData[0], 0, (4 * sizeof(TXC_REG_ACCESS_32BIT_STRUCT) ) );
    batchData.regDataPtr = &regData[0];
    batchData.writeVerifyFlag = TXC_WRITE_VERIFY_FLAG;
    batchData.semId = TXC_NULL;
    batchData.regCount = 4;

    regData[0].mask = 0xFF;  /* reg0: 2008 */
    regData[1].mask = 0xFF;  /* reg1: 200C */
    regData[2].mask = 0xFF;  /* reg2: 2010 */
    regData[3].mask = 0xFF;  /* reg3: 2014 */

    /* determine the base address of the device */
    baseAddr = (TXC_REG_32 *) ENVOY_DbGetDeviceAddr (handle);

    spi3InputFlowCtrlPtr = (ENVOY_ISPI_CFG_STRUCT *) (baseAddr + ENVOY_ISPI_CFG_OFFSET);
    regData[0].addr = (TXC_REG_32 *) &spi3InputFlowCtrlPtr->iSpi3StpaHiReg;
    regData[1].addr = (TXC_REG_32 *) &spi3InputFlowCtrlPtr->iSpi3StpaLoReg;
    regData[2].addr = (TXC_REG_32 *) &spi3InputFlowCtrlPtr->iSpi3PtpaHiReg;
    regData[3].addr = (TXC_REG_32 *) &spi3InputFlowCtrlPtr->iSpi3PtpaLoReg;

    regData[0].data = spi3InputFlowCtrlDataPtr->inputHiPhyWmarkStpa;
    regData[1].data = spi3InputFlowCtrlDataPtr->inputLoPhyWmarkStpa;
    regData[2].data = spi3InputFlowCtrlDataPtr->inputHiPhyWmarkPtpa;
    regData[3].data = spi3InputFlowCtrlDataPtr->inputLoPhyWmarkPtpa;

    /* Semaphore protect the writing of the device POS phy config and the
       writing of the L3 emulation block registers. */
    semId = ENVOY_DbGetSemId();
    rtosError = TXC_SemWait (semId, TXC_OS_SEM_WAIT_FOREVER);
    if (rtosError != TXC_NO_ERR)
    {
        return TXC_OS_RESOURCE_ERR;
    }
    error = TXC_BatchReg32BitWrite (&batchData);
    /* release the semaphore */
    rtosError = TXC_SemPost (semId);
    if (rtosError != TXC_NO_ERR)
    {
        return TXC_OS_RESOURCE_ERR;
    }
    return error;
}



/************************************************************************************/
/*||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||*/
/************************************************************************************

   FUNCTION:  ENVOY_GetSpi3InputFlowCtrlCfgReal

   DESCRIPTION: This function actually processess the TXC_IfSPI3_InputFlowCtrlCfgGet
                API function.

   INPUTS:  Same as TXC_IfSPI3_InputFlowCtrlCfgGet, except for the interfaceId

   RETURNS:  TXC_NO_ERR or an appropriate specific error code listed in appendix.

   CAVEATS:  None.

   REVISION HISTORY:

    Rev #     Date          Author                Description
   -----    -------      ------------         ----------------------
   0.5.0    6/03/04      F. Giannella         Initial release (beta)
 *--------------------------------------------------------------------------*/

TXC_U16BIT ENVOY_GetSpi3InputFlowCtrlCfgReal (TXC_U16BIT handle, TXC_U16BIT port,
           TXC_IfSPI3_INPUT_FLOW_CTRL_STRUCT  *spi3InputFlowCtrlDataPtr)
{
    TXC_U16BIT error = TXC_NO_ERR;
    TXC_BATCH_REG_ACCESS_32BIT_STRUCT batchData;
    TXC_REG_ACCESS_32BIT_STRUCT regData[4];
    TXC_REG_32            *baseAddr;
    ENVOY_ISPI_CFG_STRUCT *spi3InputFlowCtrlPtr;

    /* First, fill the batch platform header. This function requires 5
       registers to be read */
    memset (&regData[0], 0, (4 * sizeof(TXC_REG_ACCESS_32BIT_STRUCT) ) );
    batchData.regDataPtr = &regData[0];
    batchData.writeVerifyFlag = TXC_WRITE_VERIFY_FLAG;
    batchData.semId = ENVOY_DbGetSemId();
    batchData.regCount = 4;

    /* determine the base address of the device */
    baseAddr = (TXC_REG_32 *) ENVOY_DbGetDeviceAddr (handle);
    spi3InputFlowCtrlPtr = (ENVOY_ISPI_CFG_STRUCT *) (baseAddr + ENVOY_ISPI_CFG_OFFSET);

    regData[0].mask = 0xFF;  /* reg0: 2008 */
    regData[1].mask = 0xFF;  /* reg1: 200C */
    regData[2].mask = 0xFF;  /* reg2: 2010 */
    regData[3].mask = 0xFF;  /* reg3: 2014 */

    regData[0].addr = (TXC_REG_32 *) &spi3InputFlowCtrlPtr->iSpi3StpaHiReg;
    regData[1].addr = (TXC_REG_32 *) &spi3InputFlowCtrlPtr->iSpi3StpaLoReg;
    regData[2].addr = (TXC_REG_32 *) &spi3InputFlowCtrlPtr->iSpi3PtpaHiReg;
    regData[3].addr = (TXC_REG_32 *) &spi3InputFlowCtrlPtr->iSpi3PtpaLoReg;

    /* Read the registers and return the data */

    error = TXC_BatchReg32BitRead (&batchData);

    if (error == TXC_NO_ERR)
    {
        spi3InputFlowCtrlDataPtr->inputHiPhyWmarkStpa = regData[0].data & 0xFF;
        spi3InputFlowCtrlDataPtr->inputLoPhyWmarkStpa = regData[1].data & 0xFF;
        spi3InputFlowCtrlDataPtr->inputHiPhyWmarkPtpa = regData[2].data & 0xFF;
        spi3InputFlowCtrlDataPtr->inputLoPhyWmarkPtpa = regData[3].data & 0xFF;
    }
    return error;
}



/************************************************************************************/
/*||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||*/
/************************************************************************************/
/*--------------------------------------------------------------------------*

   FUNCTION:  ENVOY_SetSpi3OutputFlowCtrlCfgReal

   DESCRIPTION: This function actually processess the TXC_IfSPI3_OutputFlowCtrlCfgSet
                API function.

   INPUTS:  Same as TXC_IfSPI3_OutputFlowCtrlCfgSet except for the interfaceId

   RETURNS:  TXC_NO_ERR or an appropriate specific error code listed in
   appendix.

   CAVEATS: None

   REVISION HISTORY:

    Rev #     Date          Author                Description
   -----    -------      ------------         ----------------------
   0.5.0    6/03/04      F. Giannella         Initial release (beta)
 *--------------------------------------------------------------------------*/

TXC_U16BIT ENVOY_SetSpi3OutputFlowCtrlCfgReal (TXC_U16BIT handle, TXC_U16BIT port,
           TXC_IfSPI3_OUTPUT_FLOW_CTRL_STRUCT  *spi3OutputFlowCtrlDataPtr)
{
    TXC_U16BIT error = TXC_NO_ERR;
    TXC_BATCH_REG_ACCESS_32BIT_STRUCT batchData;
    TXC_REG_ACCESS_32BIT_STRUCT regData[3];
    TXC_REG_32 * baseAddr;
    TXC_SEM_ID semId;
    TXC_U16BIT rtosError;
    ENVOY_OSPI_CFG_STRUCT *spi3OutputFlowCtrlPtr;

    /* First, fill the batch platform header. This function requires 2
       registers to be written */
    memset (&regData[0], 0, (3 * sizeof(TXC_REG_ACCESS_32BIT_STRUCT) ) );
    batchData.regDataPtr = &regData[0];
    batchData.writeVerifyFlag = TXC_WRITE_VERIFY_FLAG;
    batchData.semId = TXC_NULL;
    batchData.regCount = 3;

    regData[0].mask = OSPI_OUTPUT_MODE_MASK;      /* reg0: 2200 */
    regData[1].mask = OSPI_MAX_CHUNK_SIZE;        /* reg1: 220C */
    regData[2].mask = OSPI_MAX_FLOW_CTRL_THRSLD;  /* reg2: 2208 */

    /* determine the base address of the device */
    baseAddr = (TXC_REG_32 *) ENVOY_DbGetDeviceAddr (handle);

    spi3OutputFlowCtrlPtr = (ENVOY_OSPI_CFG_STRUCT *) (baseAddr + ENVOY_OSPI_CFG_OFFSET);
    regData[0].addr = (TXC_REG_32 *) &spi3OutputFlowCtrlPtr->oSpi3CfgReg;
    regData[1].addr = (TXC_REG_32 *) &spi3OutputFlowCtrlPtr->oSpi3BurstSizeReg;
    regData[2].addr = (TXC_REG_32 *) &spi3OutputFlowCtrlPtr->oSpi3NearFullReg;

    if (spi3OutputFlowCtrlDataPtr->outputPtpaChunkSize == 0)
    {
        regData[0].data = OSPI_PACKET_MODE_ENB;
    }
    else
    {
        regData[0].data = 0;
        regData[1].data = spi3OutputFlowCtrlDataPtr->outputPtpaChunkSize;
    }

    regData[2].data = spi3OutputFlowCtrlDataPtr->outputLinkStpaWatermark;

    /* Semaphore protect the writing of the device POS phy config and the
       writing of the L3 emulation block registers. */
    semId = ENVOY_DbGetSemId();
    rtosError = TXC_SemWait (semId, TXC_OS_SEM_WAIT_FOREVER);
    if (rtosError != TXC_NO_ERR)
    {
        return TXC_OS_RESOURCE_ERR;
    }
    error = TXC_BatchReg32BitWrite (&batchData);
    /* release the semaphore */
    rtosError = TXC_SemPost (semId);
    if (rtosError != TXC_NO_ERR)
    {
        return TXC_OS_RESOURCE_ERR;
    }
    return error;
}



/************************************************************************************/
/*||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||*/
/************************************************************************************

   FUNCTION:  ENVOY_GetSpi3OutputFlowCtrlCfgReal

   DESCRIPTION: This function actually processess the TXC_IfSPI3_OutputFlowCtrlCfgGet
                API function.

   INPUTS:  Same as TXC_IfSPI3_OutputFlowCtrlCfgGet except for the interfaceId

   RETURNS:  TXC_NO_ERR or an appropriate specific error code listed in
   appendix.

   CAVEATS: None

   REVISION HISTORY:

    Rev #     Date          Author                Description
   -----    -------      ------------         ----------------------
   0.5.0    6/03/04      F. Giannella         Initial release (beta)
 *--------------------------------------------------------------------------*/

TXC_U16BIT ENVOY_GetSpi3OutputFlowCtrlCfgReal (TXC_U16BIT handle, TXC_U16BIT port,
           TXC_IfSPI3_OUTPUT_FLOW_CTRL_STRUCT  *spi3OutputFlowCtrlDataPtr)
{
    TXC_U16BIT error = TXC_NO_ERR;
    TXC_BATCH_REG_ACCESS_32BIT_STRUCT batchData;
    TXC_REG_ACCESS_32BIT_STRUCT regData[3];
    TXC_REG_32            *baseAddr, tmp;
    ENVOY_OSPI_CFG_STRUCT *spi3OutputFlowCtrlPtr;

    /* First, fill the batch platform header. This function requires 5
       registers to be read */
    memset (&regData[0], 0, (3 * sizeof(TXC_REG_ACCESS_32BIT_STRUCT) ) );
    batchData.regDataPtr = &regData[0];
    batchData.writeVerifyFlag = TXC_WRITE_VERIFY_FLAG;
    batchData.semId = ENVOY_DbGetSemId();
    batchData.regCount = 3;

    /* MASKs */
    regData[0].mask = OSPI_OUTPUT_MODE_MASK;      /* reg0: 2200 */
    regData[1].mask = OSPI_MAX_CHUNK_SIZE;        /* reg1: 220C */
    regData[2].mask = OSPI_MAX_FLOW_CTRL_THRSLD;  /* reg2: 2208 */

    /* determine the base address of the device */
    baseAddr = (TXC_REG_32 *) ENVOY_DbGetDeviceAddr (handle);
    spi3OutputFlowCtrlPtr = (ENVOY_OSPI_CFG_STRUCT *) (baseAddr + ENVOY_OSPI_CFG_OFFSET);

    regData[0].addr = (TXC_REG_32 *) &spi3OutputFlowCtrlPtr->oSpi3CfgReg;
    regData[1].addr = (TXC_REG_32 *) &spi3OutputFlowCtrlPtr->oSpi3BurstSizeReg;
    regData[2].addr = (TXC_REG_32 *) &spi3OutputFlowCtrlPtr->oSpi3NearFullReg;

    /* Read the registers and return the data */

    error = TXC_BatchReg32BitRead (&batchData);

    tmp = regData[1].data & 0xFF;

    if (error == TXC_NO_ERR)
    {
        spi3OutputFlowCtrlDataPtr->outputLinkStpaWatermark = regData[2].data & 0xFF;
        if (regData[0].data)
        {
            spi3OutputFlowCtrlDataPtr->outputPtpaChunkSize = 0;
        }
        else if (tmp == 0)
        {
            spi3OutputFlowCtrlDataPtr->outputPtpaChunkSize = TXC_U16_IGNORE;
            error = TXC_INVALID_CFG_ERR;
        }
        else
        {
            spi3OutputFlowCtrlDataPtr->outputPtpaChunkSize = tmp;
        }
    }
    return error;
}




/************************************************************************************/
/*||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||*/
/************************************************************************************

   FUNCTION:  ENVOY_RtrvSpi3ExtGlobalCountersReal

   DESCRIPTION: This function actually processess the TXC_IfSPI3_Ext_InputGlobalCntRtrv
                API function.

   INPUTS:  Same as TXC_IfSPI3_Ext_InputGlobalCntRtrv except for the interfaceId

   RETURNS:  TXC_NO_ERR or an appropriate specific error code listed in
   appendix.

   CAVEATS: None

   REVISION HISTORY:

    Rev #     Date          Author                Description