📄 txc_envoy_spi3_real.c
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/*--------------------------------------------------------------------------
******* ****
* ***** ** * * * * * * ***** **** * *
* * * * * ** * * * * * * * * * *
* * * * * * * * **** * * * * * ******
* ***** ****** * * * * * ** * * * * * *
* * * * * * ** * * ** ** * * * * * *
* * * * * * * **** * * * * **** * *
Proprietary and Confidential
This program is made available only to customers and prospective customers
of TranSwitch Corporation under license and may be used only with TranSwitch
semi-conductor products.
Copyright(c) 2004 TranSwitch Inc.
--------------------------------------------------------------------------
******* ** ** ** ** ******** ** **
******* *** ** ** ** ********** ** **
** ** * ** ** ** ** ** ** **
***** ** * ** ** ** ** ** * *
***** ** * ** ** ** ** ** **
** ** * ** ** ** ** ** **
******* ** *** **** ********** **
******* ** ** ** ******** **
--------------------------------------------------------------------------
TranSwitch Envoy-CE2/CE4
Device Driver
--------------------------------------------------------------------------
Workfile: ENVOY_spi3_real.c
Description: The SPI-3 Interface "Real" functions implement the SPI-3 API
functions with the Envoy-CE2/CE4 translation.
--------------------------------------------------------------------------
Revision History
--------------------------------------------------------------------------
Rev # Date Author Description
----- ------- ------------ ----------------------
0.5.0 6/03/04 F. Giannella Initial release (beta)
*--------------------------------------------------------------------------*/
/****************************************************************************
** Include Files **
****************************************************************************/
#include "txc_envoy_api.h"
#include "txc_os_sem.h"
/* this file only applies if not in virtual device mode */
#ifndef TXC_ENVOY_VIRTUAL_DEVICE_MODE
#include "txc_envoy_spi3_support.h"
#include "txc_envoy_database.h"
#include "txc_hw_platform.h"
#include "txc_envoy_mem_map.h"
#include <string.h>
/****************************************************************************
** Static Functions **
****************************************************************************/
static void GetSpi3PortRange(TXC_U16BIT handle, TXC_U16BIT port,
TXC_U16BIT * start, TXC_U16BIT * end, TXC_U16BIT * inc);
/*--------------------------------------------------------------------------*
FUNCTION: GetSpi3Range
DESCRIPTION: This local function determines the range of ports to process
based on device type. For Envoy-CE2, only ports 0 and 8 can
be programmed for GMII. For Envoy-CE4 only ports 0, 8, 16 and
24 can be programmed for GMII. FG - to do : tighten the range.
INPUTS: handle, port
RETURNS: start port, end port and increment.
CAVEATS: None.
REVISION HISTORY:
Rev # Date Author Description
----- ------- ------------ ----------------------
0.5.0 6/03/04 F. Giannella Initial release (beta)
*--------------------------------------------------------------------------*/
static void GetSpi3PortRange(TXC_U16BIT handle, TXC_U16BIT port,
TXC_U16BIT * start, TXC_U16BIT * end, TXC_U16BIT * inc)
{
TXC_U16BIT deviceType;
/* First, get the device type. */
deviceType = ENVOY_DbGetDeviceType (handle);
if ((deviceType != ENVOY_CE2) && (deviceType != ENVOY_CE4) )
return;
/* determine if one MAC port is being accessed */
if (port == ENVOY_SPI3_ALL_PORTS)
{
if (deviceType == ENVOY_CE2)
{
*start = 0;
*end = ENVOY_CE2_MAX_MAC_PORTS;
*inc = 1;
}
else /* that is, deviceType == ENVOY_CE4 */
{
*start = 0;
*end = ENVOY_CE4_MAX_SPI3_PORTS;
*inc = 1;
}
}
else
{
*start = port;
*end = port + 1;
*inc = 1;
}
}
/****************************************************************************
** Static/Global Variables **
****************************************************************************/
/****************************************************************************
** CODE **
****************************************************************************/
/************************************************************************************/
/*||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||*/
/************************************************************************************/
/*--------------------------------------------------------------------------*
FUNCTION: ENVOY_SetSpi3InputIfaceReal
DESCRIPTION: This function actually processess the TXC_IfSPI3_InputIfaceSet
API function.
INPUTS: Same as TXC_IfSPI3_InputIfaceSet, except for the interfaceId
RETURNS: TXC_NO_ERR or an appropriate specific error code listed in
appendix.
CAVEATS: None
REVISION HISTORY:
Rev # Date Author Description
----- ------- ------------ ----------------------
0.5.0 6/03/04 F. Giannella Initial release (beta)
*--------------------------------------------------------------------------*/
TXC_U16BIT ENVOY_SetSpi3InputIfaceReal (TXC_U16BIT handle,
TXC_IfSPI3_INPUT_STRUCT *spi3InputIfaceDataPtr)
{
TXC_U16BIT error = TXC_NO_ERR;
TXC_BATCH_REG_ACCESS_32BIT_STRUCT batchData;
TXC_REG_ACCESS_32BIT_STRUCT regData[2];
TXC_REG_32 * baseAddr;
TXC_REG_32 tmpReg0;
TXC_REG_32 tmpReg1;
TXC_SEM_ID semId;
TXC_U16BIT rtosError;
ENVOY_ISPI_CFG_STRUCT * spi3CfgPtr;
/* First, fill the batch platform header. This function requires 2
registers to be written */
memset (®Data[0], 0, (2 * sizeof(TXC_REG_ACCESS_32BIT_STRUCT) ) );
batchData.regDataPtr = ®Data[0];
batchData.writeVerifyFlag = TXC_WRITE_VERIFY_FLAG;
batchData.semId = TXC_NULL;
batchData.regCount = 2;
/* reg0 = 2000, bit 16: input mode (multi, single or link mode*/
regData[0].mask = ISPI_REG_2000_MASK;
regData[1].mask = ISPI_REG_2018_MASK;
/* Set mode */
switch (spi3InputIfaceDataPtr->inputMode)
{
case TXC_IfSPI3_PHY_LAYER_SINGLE_PHY:
tmpReg0 = ISPI_SPHY_ENB;
break;
case TXC_IfSPI3_PHY_LAYER_MULTI_PHY:
tmpReg0 = 0;
break;
case TXC_IfSPI3_LINK_LAYER_SINGLE_PHY:
tmpReg0 = ISPI_SPHY_ENB;
break;
case TXC_IfSPI3_LINK_LAYER_MULTI_PHY:
tmpReg0 = 0;
break;
default:
return error = TXC_GEN_ERR; /* added so that lint will be happy */
break; /* however, it should never get here */
}
/* Set Input Parit Check Mode */
if (spi3InputIfaceDataPtr->inputParityCheckingMode == TXC_IfSPI3_ODD_PARITY)
{
regData[0].mask |= ISPI_PARITY_MODE_MASK;
tmpReg0 |= (ISPI_PARITY_ENB | ISPI_ODD_PARITY_ENB);
}
if (spi3InputIfaceDataPtr->inputParityCheckingMode == TXC_IfSPI3_EVEN_PARITY)
{
regData[0].mask |= ISPI_PARITY_MODE_MASK;
tmpReg0 |= ISPI_PARITY_ENB;
}
/* Note if(spi3InputIfaceDataPtr->inputParityCheckingMode == TXC_IfSPI3_NO_PARITY)
"0" will be written into enable parity bit 21 and bit 20 will be untouched */
switch (spi3InputIfaceDataPtr->inputDeviceExtension.envoyCe2Ce4InputAttr.inputAggregationMode)
{
case TXC_IfSPI3_INPUT_AGGR_PORT_POS_BYTE0:
regData[0].mask |= ISPI_AGGR_BYTE_POS_MASK;
tmpReg0 |= ISPI_AGGR_BYTE0;
break;
case TXC_IfSPI3_INPUT_AGGR_PORT_POS_BYTE1:
regData[0].mask |= ISPI_AGGR_BYTE_POS_MASK;
tmpReg0 |= ISPI_AGGR_BYTE1;
break;
case TXC_IfSPI3_INPUT_AGGR_PORT_POS_BYTE2:
regData[0].mask |= ISPI_AGGR_BYTE_POS_MASK;
tmpReg0 |= ISPI_AGGR_BYTE2;
break;
case TXC_IfSPI3_INPUT_AGGR_PORT_POS_BYTE3:
regData[0].mask |= ISPI_AGGR_BYTE_POS_MASK;
tmpReg0 |= ISPI_AGGR_BYTE3;
break;
default: /* aggregation disabled, in which case the byte position bits 19:18 won't be touched*/
break;
}
if (spi3InputIfaceDataPtr->inputDeviceExtension.envoyCe2Ce4InputAttr.inputStpaViolationDiscardEnable == TXC_TRUE)
{
tmpReg1 = ISPI_STPA_VIOLATION_ENB;
}
else
{
tmpReg1 = 0;
}
/* determine the base address of the device */
baseAddr = (TXC_REG_32 *) ENVOY_DbGetDeviceAddr (handle);
spi3CfgPtr = (ENVOY_ISPI_CFG_STRUCT *) (baseAddr + ENVOY_ISPI_CFG_OFFSET);
regData[0].data = tmpReg0;
regData[1].data = tmpReg1;
regData[0].addr = (TXC_REG_32 *) &spi3CfgPtr->iSpi3CfgReg;
regData[1].addr = (TXC_REG_32 *) &spi3CfgPtr->iSpi3StpaPoliceEnableReg;
/* Semaphore protect the writing of the device POS phy config and the
writing of the L3 emulation block registers. */
semId = ENVOY_DbGetSemId();
rtosError = TXC_SemWait (semId, TXC_OS_SEM_WAIT_FOREVER);
if (rtosError != TXC_NO_ERR)
{
return TXC_OS_RESOURCE_ERR;
}
error = TXC_BatchReg32BitWrite (&batchData);
/* release the semaphore */
rtosError = TXC_SemPost (semId);
if (rtosError != TXC_NO_ERR)
{
return TXC_OS_RESOURCE_ERR;
}
return error;
}
/************************************************************************************/
/*||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||*/
/************************************************************************************
FUNCTION: ENVOY_GetSpi3InputIfaceReal
DESCRIPTION: This function actually processess the TXC_IfSPI3_InputIfaceGet
API function.
INPUTS: Same as TXC_IfSPI3_InputIfaceGet, except for the interfaceId
RETURNS: TXC_NO_ERR or an appropriate specific error code listed in appendix.
CAVEATS: None.
REVISION HISTORY:
Rev # Date Author Description
----- ------- ------------ ----------------------
0.5.0 6/03/04 F. Giannella Initial release (beta)
*--------------------------------------------------------------------------*/
TXC_U16BIT ENVOY_GetSpi3InputIfaceReal (TXC_U16BIT handle,
TXC_IfSPI3_INPUT_STRUCT *spi3InputIfaceDataPtr)
{
TXC_U16BIT error = TXC_NO_ERR;
TXC_BATCH_REG_ACCESS_32BIT_STRUCT batchData;
TXC_REG_ACCESS_32BIT_STRUCT regData[3];
TXC_REG_32 *baseAddr, tempData;
ENVOY_ISPI_CFG_STRUCT * spi3CfgPtr;
ENVOY_DEV_EXT_PIN_STRUCT pinData;
/* fill the structure with 0 */
memset ((void *) &pinData, 0, sizeof (pinData));
/* First, fill the batch platform header. This function requires 5
registers to be read */
memset (®Data[0], 0, (3 * sizeof(TXC_REG_ACCESS_32BIT_STRUCT) ) );
batchData.regDataPtr = ®Data[0];
batchData.writeVerifyFlag = TXC_WRITE_VERIFY_FLAG;
batchData.semId = ENVOY_DbGetSemId();
batchData.regCount = 2;
/* determine the base address of the device */
baseAddr = (TXC_REG_32 *) ENVOY_DbGetDeviceAddr (handle);
spi3CfgPtr = (ENVOY_ISPI_CFG_STRUCT *) (baseAddr + ENVOY_ISPI_CFG_OFFSET);
/* Setup the addresses and masks to read for SPI-3 interface */
/* reg0 = 2000
reg1 = 2018 */
regData[0].addr = (TXC_REG_32 *) &spi3CfgPtr->iSpi3CfgReg;
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