📄 tm-sparc.h
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/* Target machine sub-parameters for SPARC, for GDB, the GNU debugger. This is included by other tm-*.h files to define SPARC cpu-related info. Copyright 1986, 1987, 1989, 1991, 1992 Free Software Foundation, Inc. Contributed by Michael Tiemann (tiemann@mcc.com)This file is part of GDB.This program is free software; you can redistribute it and/or modifyit under the terms of the GNU General Public License as published bythe Free Software Foundation; either version 2 of the License, or(at your option) any later version.This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY; without even the implied warranty ofMERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See theGNU General Public License for more details.You should have received a copy of the GNU General Public Licensealong with this program; if not, write to the Free SoftwareFoundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */#define TARGET_BYTE_ORDER BIG_ENDIAN/* Floating point is IEEE compatible. */#define IEEE_FLOAT/* When passing a structure to a function, Sun cc passes the address in a register, not the structure itself. It (under SunOS4) creates two symbols, so we get a LOC_ARG saying the address is on the stack (a lie, and a serious one since we don't know which register to use), and a LOC_REGISTER saying that the struct is in a register (sort of a lie, but fixable with REG_STRUCT_HAS_ADDR). Gcc version two (as of 1.92) behaves like sun cc. REG_STRUCT_HAS_ADDR is smart enough to distinguish between Sun cc, gcc version 1 and gcc version 2. This still doesn't work if the argument is not one passed in a register (i.e. it's the 7th or later argument). */#define REG_STRUCT_HAS_ADDR(gcc_p) (gcc_p != 1)#define STRUCT_ARG_SYM_GARBAGE(gcc_p) (gcc_p != 1)/* If Pcc says that a parameter is a short, it's a short. This is because the parameter does get passed in in a register as an int, but pcc puts it onto the stack frame as a short (not nailing whatever else might be there. I'm not sure that I consider this swift. Sigh.) No, don't do this. The problem here is that pcc says that the argument is in the upper half of the word reserved on the stack, but puts it in the lower half. *//* #define BELIEVE_PCC_PROMOTION 1 *//* OK, I've added code to dbxread.c to deal with this case. */#define BELIEVE_PCC_PROMOTION_TYPE/* Offset from address of function to start of its code. Zero on most machines. */#define FUNCTION_START_OFFSET 0/* Advance PC across any function entry prologue instructions to reach some "real" code. SKIP_PROLOGUE_FRAMELESS_P advances the PC past some of the prologue, but stops as soon as it knows that the function has a frame. Its result is equal to its input PC if the function is frameless, unequal otherwise. */#define SKIP_PROLOGUE(pc) \ { pc = skip_prologue (pc, 0); }#define SKIP_PROLOGUE_FRAMELESS_P(pc) \ { pc = skip_prologue (pc, 1); }extern CORE_ADDR skip_prologue ();/* Immediately after a function call, return the saved pc. Can't go through the frames for this because on some machines the new frame is not set up until the new function executes some instructions. *//* On the Sun 4 under SunOS, the compile will leave a fake insn which encodes the structure size being returned. If we detect such a fake insn, step past it. */#define PC_ADJUST(pc) sparc_pc_adjust(pc)extern CORE_ADDR sparc_pc_adjust();#define SAVED_PC_AFTER_CALL(frame) PC_ADJUST (read_register (RP_REGNUM))/* Stack grows downward. */#define INNER_THAN </* Stack has strict alignment. */#define STACK_ALIGN(ADDR) (((ADDR)+7)&-8)/* Sequence of bytes for breakpoint instruction. */#define BREAKPOINT {0x91, 0xd0, 0x20, 0x01}/* Amount PC must be decremented by after a breakpoint. This is often the number of bytes in BREAKPOINT but not always. */#define DECR_PC_AFTER_BREAK 0/* Nonzero if instruction at PC is a return instruction. *//* For SPARC, this is either a "jmpl %o7+8,%g0" or "jmpl %i7+8,%g0". Note: this does not work for functions returning structures under SunOS. */#define ABOUT_TO_RETURN(pc) \ ((read_memory_integer (pc, 4)|0x00040000) == 0x81c7e008)/* Return 1 if P points to an invalid floating point value. */#define INVALID_FLOAT(p, len) 0 /* Just a first guess; not checked *//* Say how long (ordinary) registers are. */#define REGISTER_TYPE long/* Number of machine registers */#define NUM_REGS 72/* Initializer for an array of names of registers. There should be NUM_REGS strings in this initializer. */#define REGISTER_NAMES \{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \ "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \ "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \ "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \ \ "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \ "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \ "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \ "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \ \ "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr" }/* Register numbers of various important registers. Note that some of these values are "real" register numbers, and correspond to the general registers of the machine, and some are "phony" register numbers which are too large to be actual register numbers as far as the user is concerned but do serve to get the desired values when passed to read_register. */#define G0_REGNUM 0 /* %g0 */#define G1_REGNUM 1 /* %g1 */#define O0_REGNUM 8 /* %o0 */#define SP_REGNUM 14 /* Contains address of top of stack, \ which is also the bottom of the frame. */#define RP_REGNUM 15 /* Contains return address value, *before* \ any windows get switched. */#define O7_REGNUM 15 /* Last local reg not saved on stack frame */#define L0_REGNUM 16 /* First local reg that's saved on stack frame rather than in machine registers */#define I0_REGNUM 24 /* %i0 */#define FP_REGNUM 30 /* Contains address of executing stack frame */#define I7_REGNUM 31 /* Last local reg saved on stack frame */#define FP0_REGNUM 32 /* Floating point register 0 */#define Y_REGNUM 64 /* Temp register for multiplication, etc. */#define PS_REGNUM 65 /* Contains processor status */#define WIM_REGNUM 66 /* Window Invalid Mask (not really supported) */#define TBR_REGNUM 67 /* Trap Base Register (not really supported) */#define PC_REGNUM 68 /* Contains program counter */#define NPC_REGNUM 69 /* Contains next PC */#define FPS_REGNUM 70 /* Floating point status register */#define CPS_REGNUM 71 /* Coprocessor status register *//* Total amount of space needed to store our copies of the machine's register state, the array `registers'. */#define REGISTER_BYTES (32*4+32*4+8*4)/* Index within `registers' of the first byte of the space for register N. *//* ?? */#define REGISTER_BYTE(N) ((N)*4)/* The SPARC processor has register windows. */#define HAVE_REGISTER_WINDOWS/* Is this register part of the register window system? A yes answer implies that 1) The name of this register will not be the same in other frames, and 2) This register is automatically "saved" (out registers shifting into ins counts) upon subroutine calls and thus there is no need to search more than one stack frame for it. */#define REGISTER_IN_WINDOW_P(regnum) \ ((regnum) >= 8 && (regnum) < 32)/* Number of bytes of storage in the actual machine representation for register N. *//* On the SPARC, all regs are 4 bytes. */#define REGISTER_RAW_SIZE(N) (4)/* Number of bytes of storage in the program's representation for register N. *//* On the SPARC, all regs are 4 bytes. */#define REGISTER_VIRTUAL_SIZE(N) (4)/* Largest value REGISTER_RAW_SIZE can have. */#define MAX_REGISTER_RAW_SIZE 8/* Largest value REGISTER_VIRTUAL_SIZE can have. */
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