m68k.h

早期freebsd实现

   W  second word (entire), for branch displacements
   L  second and third words (entire), for branch displacements (also overloaded for move16)
   b  second word, low byte
   w  second word (entire) [variable word/long branch offset for dbra]
   l  second and third word (entire)
   g  variable branch offset for bra and similar instructions.
      The place to store depends on the magnitude of offset.
   t  store in both place 7 and place 8; for floating point operations
   c  branch offset for cpBcc operations.
      The place to store is word two if bit six of word one is zero,
      and words two and three if bit six of word one is one.
   i  Increment by two, to skip over coprocessor extended operands.   Only
      works with the 'I' format.
   k  Dynamic K-factor field.   Bits 6-4 of word 2, used as a register number.
      Also used for dynamic fmovem instruction.
   C  floating point coprocessor constant - 7 bits.  Also used for static
      K-factors...
   j  Movec register #, stored in 12 low bits of second word.

 Places to put operand, for general operands:
   d  destination, shifted 6 bits in first word
   b  source, at low bit of first word, and immediate uses one byte
   w  source, at low bit of first word, and immediate uses two bytes
   l  source, at low bit of first word, and immediate uses four bytes
   s  source, at low bit of first word.
      Used sometimes in contexts where immediate is not allowed anyway.
   f  single precision float, low bit of 1st word, immediate uses 4 bytes
   F  double precision float, low bit of 1st word, immediate uses 8 bytes
   x  extended precision float, low bit of 1st word, immediate uses 12 bytes
   p  packed float, low bit of 1st word, immediate uses 12 bytes
*/

#define one(x) ((unsigned int) (x) << 16)
#define two(x, y) (((unsigned int) (x) << 16) + y)

/*
	*** DANGER WILL ROBINSON ***

   The assembler requires that all instances of the same mnemonic must be
   consecutive.  If they aren't, the assembler will bomb at runtime
 */
#ifdef DONT_DEFINE_TABLE
extern struct m68k_opcode m68k_opcodes[];
#else
struct m68k_opcode m68k_opcodes[] =
{
{"abcd",	one(0140400),		one(0170770), "DsDd", m68000up },
{"abcd",	one(0140410),		one(0170770), "-s-d", m68000up },

		/* Add instructions */
{"addal",	one(0150700),		one(0170700), "*lAd", m68000up },
{"addaw",	one(0150300),		one(0170700), "*wAd", m68000up },
{"addib",	one(0003000),		one(0177700), "#b$b", m68000up },

{"addil",	one(0003200),		one(0177700), "#l$l", m68000up },
{"addiw",	one(0003100),		one(0177700), "#w$w", m68000up },
{"addqb",	one(0050000),		one(0170700), "Qd$b", m68000up },
#ifndef MIT_SYNTAX_ONLY
{"addqb",	one(0003000),		one(0177700), "#b$b", m68000up }, /* FIXNIEL: addi instead of addq because to many frags */
#endif
{"addql",	one(0050200),		one(0170700), "Qd%l", m68000up },
#ifndef MIT_SYNTAX_ONLY
{"addql",	one(0003200),		one(0177700), "#l$l", m68000up }, /* FIXNIEL: addi instead of addq because to many frags */
#endif
{"addqw",	one(0050100),		one(0170700), "Qd%w", m68000up },
#ifndef MIT_SYNTAX_ONLY
{"addqw",	one(0003100),		one(0177700), "#w$w", m68000up }, /* FIXNIEL: addi instead of addq because to many frags */
#endif

{"addb",	one(0050000),		one(0170700), "Qd$b", m68000up },	/* addq written as add */
{"addb",	one(0003000),		one(0177700), "#b$b", m68000up },	/* addi written as add */
{"addb",	one(0150000),		one(0170700), ";bDd", m68000up },	/* addb <ea>,	Dd */
{"addb",	one(0150400),		one(0170700), "Dd~b", m68000up },	/* add.b Dd,	<ea> */

{"addw",	one(0150300),		one(0170700), "*wAd", m68000up },	/* adda written as add */
{"addw",	one(0050100),		one(0170700), "Qd%w", m68000up },	/* addq written as add */
{"addw",	one(0003100),		one(0177700), "#w$w", m68000up },	/* addi written as add */
{"addw",	one(0150100),		one(0170700), "*wDd", m68000up },	/* addw <ea>,	Dd */
{"addw",	one(0150500),		one(0170700), "Dd~w", m68000up },	/* addw Dd,	<ea> */

{"addl",	one(0050200),		one(0170700), "Qd%l", m68000up },	/* addq written as add */
{"addl",	one(0003200),		one(0177700), "#l$l", m68000up },	/* addi written as add */
{"addl",	one(0150700),		one(0170700), "*lAd", m68000up },	/* adda written as add */
{"addl",	one(0150200),		one(0170700), "*lDd", m68000up },	/* addl <ea>,	Dd */
{"addl",	one(0150600),		one(0170700), "Dd~l", m68000up },	/* addl Dd,	<ea> */

#ifndef NO_DEFAULT_SIZES
{"addi",	one(0050200),		one(0170700), "Qd%l", m68000up },
{"addi",	one(0003200),		one(0177700), "#l$l", m68000up },	/* addi written as add */
{"addq",	one(0050100),		one(0170700), "Qd%w", m68000up },
#endif

{"addxb",	one(0150400),		one(0170770), "DsDd", m68000up },
{"addxb",	one(0150410),		one(0170770), "-s-d", m68000up },
{"addxl",	one(0150600),		one(0170770), "DsDd", m68000up },
{"addxl",	one(0150610),		one(0170770), "-s-d", m68000up },
{"addxw",	one(0150500),		one(0170770), "DsDd", m68000up },
{"addxw",	one(0150510),		one(0170770), "-s-d", m68000up },

{"andib",	one(0001000),		one(0177700), "#b$b", m68000up },
{"andib",	one(0001074),		one(0177777), "#bCb", m68000up },	/* andi to ccr */
{"andiw",	one(0001100),		one(0177700), "#w$w", m68000up },
{"andiw",	one(0001174),		one(0177777), "#wSw", m68000up },	/* andi to sr */
{"andil",	one(0001200),		one(0177700), "#l$l", m68000up },
{"andb",	one(0001000),		one(0177700), "#b$b", m68000up },	/* andi written as or */
{"andb",	one(0001074),		one(0177777), "#bCb", m68000up },	/* andi to ccr */
{"andb",	one(0140000),		one(0170700), ";bDd", m68000up },	/* memory to register */
{"andb",	one(0140400),		one(0170700), "Dd~b", m68000up },	/* register to memory */
{"andw",	one(0001100),		one(0177700), "#w$w", m68000up },	/* andi written as or */
{"andw",	one(0001174),		one(0177777), "#wSw", m68000up },	/* andi to sr */
{"andw",	one(0140100),		one(0170700), ";wDd", m68000up },	/* memory to register */
{"andw",	one(0140500),		one(0170700), "Dd~w", m68000up },	/* register to memory */
{"andl",	one(0001200),		one(0177700), "#l$l", m68000up },	/* andi written as or */
{"andl",	one(0140200),		one(0170700), ";lDd", m68000up },	/* memory to register */
{"andl",	one(0140600),		one(0170700), "Dd~l", m68000up },	/* register to memory */

#ifndef NO_DEFAULT_SIZES
{"andi",	one(0001200),		one(0177700), "#l$l", m68000up },
{"andi",	one(0001174),		one(0177777), "#wSw", m68000up },	/* andi to sr */
{"andi",	one(0001074),		one(0177777), "#bCb", m68000up },	/* andi to ccr */
#endif

{"aslb",	one(0160400),		one(0170770), "QdDs", m68000up },
{"aslb",	one(0160440),		one(0170770), "DdDs", m68000up },
{"asll",	one(0160600),		one(0170770), "QdDs", m68000up },
{"asll",	one(0160640),		one(0170770), "DdDs", m68000up },
{"aslw",	one(0160500),		one(0170770), "QdDs", m68000up },
{"aslw",	one(0160540),		one(0170770), "DdDs", m68000up },
{"aslw",	one(0160700),		one(0177700), "~s",   m68000up },	/* Shift memory */
{"asrb",	one(0160000),		one(0170770), "QdDs", m68000up },
{"asrb",	one(0160040),		one(0170770), "DdDs", m68000up },
{"asrl",	one(0160200),		one(0170770), "QdDs", m68000up },
{"asrl",	one(0160240),		one(0170770), "DdDs", m68000up },
{"asrw",	one(0160100),		one(0170770), "QdDs", m68000up },
{"asrw",	one(0160140),		one(0170770), "DdDs", m68000up },
{"asrw",	one(0160300),		one(0177700), "~s",   m68000up },	/* Shift memory */

#ifndef FIXED_SIZE_BRANCH
#define BRANCH "Bg"
#define BRANCH_MASK one(0xFF00)
#else
/* Fixed-size branches with 16-bit offsets */
#define BRANCH "BW"
#define BRANCH_MASK one(0xFFFF) /* 8-bit displacement must be 0 */
#endif

{"bhi",		one(0061000),		BRANCH_MASK, BRANCH, m68000up },
{"bls",		one(0061400),		BRANCH_MASK, BRANCH, m68000up },
{"bcc",		one(0062000),		BRANCH_MASK, BRANCH, m68000up },
#ifndef MOTOROLA_SYNTAX_ONLY
{"jfnlt",	one(0062000),		BRANCH_MASK, BRANCH, m68000up }, /* apparently a sun alias */
#endif
{"bcs",		one(0062400),		BRANCH_MASK, BRANCH, m68000up },
{"bne",		one(0063000),		BRANCH_MASK, BRANCH, m68000up },
{"beq",		one(0063400),		BRANCH_MASK, BRANCH, m68000up },
{"bvc",		one(0064000),		BRANCH_MASK, BRANCH, m68000up },
{"bvs",		one(0064400),		BRANCH_MASK, BRANCH, m68000up },
{"bpl",		one(0065000),		BRANCH_MASK, BRANCH, m68000up },
{"bmi",		one(0065400),		BRANCH_MASK, BRANCH, m68000up },
{"bge",		one(0066000),		BRANCH_MASK, BRANCH, m68000up },
{"blt",		one(0066400),		BRANCH_MASK, BRANCH, m68000up },
{"bgt",		one(0067000),		BRANCH_MASK, BRANCH, m68000up },
{"ble",		one(0067400),		BRANCH_MASK, BRANCH, m68000up },
#ifndef MOTOROLA_SYNTAX_ONLY
{"jfngt",	one(0067400),		BRANCH_MASK, BRANCH, m68000up }, /* apparently a sun alias */
#endif

#ifndef FIXED_SIZE_BRANCH
{"bsr",		one(0060400),		one(0177400), "Bg", m68000up },
{"bsr",		one(0047200),		one(0177700),  "!s", m68000up },
{"bra",		one(0060000),		one(0177400),  "Bg", m68000up },
{"bra",		one(0047300),		one(0177700),  "!s", m68000up },
#else
{"bra",		one(0060000),		one(0177777), "BW", m68000up },
{"bsr",		one(0060400),		one(0177777), "BW", m68000up },
#endif

/* Fixed-size branches with short (byte) offsets */

{"bhis",	one(0061000),		one(0177400), "BB", m68000up },
{"blss",	one(0061400),		one(0177400), "BB", m68000up },
{"bccs",	one(0062000),		one(0177400), "BB", m68000up },
{"bcss",	one(0062400),		one(0177400), "BB", m68000up },
{"bnes",	one(0063000),		one(0177400), "BB", m68000up },
{"beqs",	one(0063400),		one(0177400), "BB", m68000up },
{"jfeq",	one(0063400),		one(0177400), "BB", m68000up }, /* apparently a sun alias */
{"bvcs",	one(0064000),		one(0177400), "BB", m68000up },
{"bvss",	one(0064400),		one(0177400), "BB", m68000up },
{"bpls",	one(0065000),		one(0177400), "BB", m68000up },
{"bmis",	one(0065400),		one(0177400), "BB", m68000up },
{"bges",	one(0066000),		one(0177400), "BB", m68000up },
{"blts",	one(0066400),		one(0177400), "BB", m68000up },
{"bgts",	one(0067000),		one(0177400), "BB", m68000up },
{"bles",	one(0067400),		one(0177400), "BB", m68000up },
{"bras",	one(0060000),		one(0177400), "BB", m68000up },
{"bsrs",	one(0060400),		one(0177400), "BB", m68000up },

/* Fixed-size branches with long (32-bit) offsets */

{"bhil",	one(0061377),		one(0177777), "BL", m68020up | cpu32 },
{"blsl",	one(0061777),		one(0177777), "BL", m68020up | cpu32 },
{"bccl",	one(0062377),		one(0177777), "BL", m68020up | cpu32 },
{"bcsl",	one(0062777),		one(0177777), "BL", m68020up | cpu32 },
{"bnel",	one(0063377),		one(0177777), "BL", m68020up | cpu32 },
{"beql",	one(0063777),		one(0177777), "BL", m68020up | cpu32 },
{"bvcl",	one(0064377),		one(0177777), "BL", m68020up | cpu32 },
{"bvsl",	one(0064777),		one(0177777), "BL", m68020up | cpu32 },
{"bpll",	one(0065377),		one(0177777), "BL", m68020up | cpu32 },
{"bmil",	one(0065777),		one(0177777), "BL", m68020up | cpu32 },
{"bgel",	one(0066377),		one(0177777), "BL", m68020up | cpu32 },
{"bltl",	one(0066777),		one(0177777), "BL", m68020up | cpu32 },
{"bgtl",	one(0067377),		one(0177777), "BL", m68020up | cpu32 },
{"blel",	one(0067777),		one(0177777), "BL", m68020up | cpu32 },
{"bral",	one(0060377),		one(0177777), "BL", m68020up | cpu32 },
{"bsrl",	one(0060777),		one(0177777), "BL", m68020up | cpu32 },

/* We now return you to our regularly scheduled instruction set */

{"bchg",	one(0000500),		one(0170700),		"Dd$s", m68000up },
{"bchg",	one(0004100),		one(0177700),		"#b$s", m68000up },
{"bclr",	one(0000600),		one(0170700),		"Dd$s", m68000up },
{"bclr",	one(0004200),		one(0177700),		"#b$s", m68000up },

#ifndef MIT_SYNTAX_ONLY
{"bchgb",	one(0000500),		one(0170700),		"Dd$s", m68000up },
{"bchgb",	one(0004100),		one(0177700),		"#b$s", m68000up },
{"bclrb",	one(0000600),		one(0170700),		"Dd$s", m68000up },
{"bclrb",	one(0004200),		one(0177700),		"#b$s", m68000up },

{"bchgl",	one(0000500),		one(0170700),		"Dd$s", m68000up },
{"bchgl",	one(0004100),		one(0177700),		"#b$s", m68000up },
{"bclrl",	one(0000600),		one(0170700),		"Dd$s", m68000up },
{"bclrl",	one(0004200),		one(0177700),		"#b$s", m68000up },
#endif

{"bfchg",	two(0165300, 0),	two(0177700, 0170000),	"?sO2O3",   m68020up },
{"bfclr",	two(0166300, 0),	two(0177700, 0170000),	"?sO2O3",   m68020up },
{"bfexts",	two(0165700, 0),	two(0177700, 0100000),	"/sO2O3D1", m68020up },
{"bfextu",	two(0164700, 0),	two(0177700, 0100000),	"/sO2O3D1", m68020up },
{"bfffo",	two(0166700, 0),	two(0177700, 0100000),	"/sO2O3D1", m68020up },