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Some pseudo register numbers, those within the range of@code{FIRST_VIRTUAL_REGISTER} to @code{LAST_VIRTUAL_REGISTER} onlyappear during the RTL generation phase and are eliminated before theoptimization phases. These represent locations in the stack frame thatcannot be determined until RTL generation for the function has beencompleted. The following virtual register numbers are defined:@table @code@findex VIRTUAL_INCOMING_ARGS_REGNUM@item VIRTUAL_INCOMING_ARGS_REGNUMThis points to the first word of the incoming arguments passed on thestack. Normally these arguments are placed there by the caller, but thecallee may have pushed some arguments that were previously passed inregisters.@cindex @code{FIRST_PARM_OFFSET} and virtual registers@cindex @code{ARG_POINTER_REGNUM} and virtual registersWhen RTL generation is complete, this virtual register is replacedby the sum of the register given by @code{ARG_POINTER_REGNUM} and thevalue of @code{FIRST_PARM_OFFSET}.@findex VIRTUAL_STACK_VARS_REGNUM@cindex @code{FRAME_GROWS_DOWNWARD} and virtual registers@item VIRTUAL_STACK_VARS_REGNUMIf @code{FRAME_GROWS_DOWNWARDS} is defined, this points to immediatelyabove the first variable on the stack. Otherwise, it points to thefirst variable on the stack.@cindex @code{STARTING_FRAME_OFFSET} and virtual registers@cindex @code{FRAME_POINTER_REGNUM} and virtual registersIt is replaced with the sum of the register given by@code{FRAME_POINTER_REGNUM} and the value @code{STARTING_FRAME_OFFSET}.@findex VIRTUAL_STACK_DYNAMIC_REGNUM@item VIRTUAL_STACK_DYNAMIC_REGNUMThis points to the location of dynamically allocated memory on the stackimmediately after the stack pointer has been adjusted by the amount ofmemory desired.@cindex @code{STACK_DYNAMIC_OFFSET} and virtual registers@cindex @code{STACK_POINTER_REGNUM} and virtual registersIt is replaced by the sum of the register given by@code{STACK_POINTER_REGNUM} and the value @code{STACK_DYNAMIC_OFFSET}.@findex VIRTUAL_OUTGOING_ARGS_REGNUM@item VIRTUAL_OUTGOING_ARGS_REGNUMThis points to the location in the stack at which outgoing argumentsshould be written when the stack is pre-pushed (arguments pushed usingpush insns should always use @code{STACK_POINTER_REGNUM}).@cindex @code{STACK_POINTER_OFFSET} and virtual registersIt is replaced by the sum of the register given by@code{STACK_POINTER_REGNUM} and the value @code{STACK_POINTER_OFFSET}.@end table@findex subreg@item (subreg:@var{m} @var{reg} @var{wordnum})@code{subreg} expressions are used to refer to a register in a machinemode other than its natural one, or to refer to one register ofa multi-word @code{reg} that actually refers to several registers.Each pseudo-register has a natural mode. If it is necessary tooperate on it in a different mode---for example, to perform a fullwordmove instruction on a pseudo-register that contains a singlebyte---the pseudo-register must be enclosed in a @code{subreg}. Insuch a case, @var{wordnum} is zero.Usually @var{m} is at least as narrow as the mode of @var{reg}, in whichcase it is restricting consideration to only the bits of @var{reg} thatare in @var{m}. However, sometimes @var{m} is wider than the mode of@var{reg}. These @code{subreg} expressions are often called@dfn{paradoxical}. They are used in cases where we want to refer to anobject in a wider mode but do not care what value the additional bitshave. The reload pass ensures that paradoxical references are onlymade to hard registers.The other use of @code{subreg} is to extract the individual registers ofa multi-register value. Machine modes such as @code{DImode} and@code{TImode} can indicate values longer than a word, values whichusually require two or more consecutive registers. To access one of theregisters, use a @code{subreg} with mode @code{SImode} and a@var{wordnum} that says which register.@cindex @code{WORDS_BIG_ENDIAN}, effect on @code{subreg}The compilation parameter @code{WORDS_BIG_ENDIAN}, if set to 1, saysthat word number zero is the most significant part; otherwise, it isthe least significant part.@cindex combiner pass@cindex reload pass@cindex @code{subreg}, special reload handlingBetween the combiner pass and the reload pass, it is possible to have aparadoxical @code{subreg} which contains a @code{mem} instead of a@code{reg} as its first operand. After the reload pass, it is alsopossible to have a non-paradoxical @code{subreg} which contains a@code{mem}; this usually occurs when the @code{mem} is a stack slotwhich replaced a pseudo register.Note that it is not valid to access a @code{DFmode} value in @code{SFmode}using a @code{subreg}. On some machines the most significant part of a@code{DFmode} value does not have the same format as a single-precisionfloating value.It is also not valid to access a single word of a multi-word value in ahard register when less registers can hold the value than would beexpected from its size. For example, some 32-bit machines havefloating-point registers that can hold an entire @code{DFmode} value.If register 10 were such a register @code{(subreg:SI (reg:DF 10) 1)}would be invalid because there is no way to convert that reference toa single machine register. The reload pass prevents @code{subreg}expressions such as these from being formed.@findex SUBREG_REG@findex SUBREG_WORDThe first operand of a @code{subreg} expression is customarily accessed with the @code{SUBREG_REG} macro and the second operand is customarilyaccessed with the @code{SUBREG_WORD} macro.@findex scratch@cindex scratch operands@item (scratch:@var{m})This represents a scratch register that will be required for theexecution of a single instruction and not used subsequently. It isconverted into a @code{reg} by either the local register allocator orthe reload pass.@code{scratch} is usually present inside a @code{clobber} operation(@pxref{Side Effects}).@findex cc0@cindex condition code register@item (cc0)This refers to the machine's condition code register. It has nooperands and may not have a machine mode. There are two ways to use it:@itemize @bullet@itemTo stand for a complete set of condition code flags. This is best onmost machines, where each comparison sets the entire series of flags.With this technique, @code{(cc0)} may be validly used in only twocontexts: as the destination of an assignment (in test and compareinstructions) and in comparison operators comparing against zero(@code{const_int} with value zero; that is to say, @code{const0_rtx}).@itemTo stand for a single flag that is the result of a single condition.This is useful on machines that have only a single flag bit, and inwhich comparison instructions must specify the condition to test.With this technique, @code{(cc0)} may be validly used in only twocontexts: as the destination of an assignment (in test and compareinstructions) where the source is a comparison operator, and as thefirst operand of @code{if_then_else} (in a conditional branch).@end itemize@findex cc0_rtxThere is only one expression object of code @code{cc0}; it is thevalue of the variable @code{cc0_rtx}. Any attempt to create anexpression of code @code{cc0} will return @code{cc0_rtx}.Instructions can set the condition code implicitly. On many machines,nearly all instructions set the condition code based on the value thatthey compute or store. It is not necessary to record these actionsexplicitly in the RTL because the machine description includes aprescription for recognizing the instructions that do so (by means ofthe macro @code{NOTICE_UPDATE_CC}). @xref{Condition Code}. Onlyinstructions whose sole purpose is to set the condition code, andinstructions that use the condition code, need mention @code{(cc0)}.On some machines, the condition code register is given a register numberand a @code{reg} is used instead of @code{(cc0)}. This is usually thepreferable approach if only a small subset of instructions modify thecondition code. Other machines store condition codes in generalregisters; in such cases a pseudo register should be used.Some machines, such as the Sparc and RS/6000, have two sets ofarithmetic instructions, one that sets and one that does not set thecondition code. This is best handled by normally generating theinstruction that does not set the condition code, and making a patternthat both performs the arithmetic and sets the condition code register(which would not be @code{(cc0)} in this case). For examples, searchfor @samp{addcc} and @samp{andcc} in @file{sparc.md}.@findex pc@item (pc)@cindex program counterThis represents the machine's program counter. It has no operands andmay not have a machine mode. @code{(pc)} may be validly used only incertain specific contexts in jump instructions.@findex pc_rtxThere is only one expression object of code @code{pc}; it is the valueof the variable @code{pc_rtx}. Any attempt to create an expression ofcode @code{pc} will return @code{pc_rtx}.All instructions that do not jump alter the program counter implicitlyby incrementing it, but there is no need to mention this in the RTL.@findex mem@item (mem:@var{m} @var{addr})This RTX represents a reference to main memory at an addressrepresented by the expression @var{addr}. @var{m} specifies how largea unit of memory is accessed.@end table@node Arithmetic, Comparisons, Regs and Memory, RTL@section RTL Expressions for Arithmetic@cindex arithmetic, in RTL@cindex math, in RTL@cindex RTL expressions for arithmeticUnless otherwise specified, all the operands of arithmetic expressionsmust be valid for mode @var{m}. An operand is valid for mode @var{m}if it has mode @var{m}, or if it is a @code{const_int} or@code{const_double} and @var{m} is a mode of class @code{MODE_INT}.For commutative binary operations, constants should be placed in thesecond operand.@table @code@findex plus@cindex RTL addition@cindex RTL sum@item (plus:@var{m} @var{x} @var{y})Represents the sum of the values represented by @var{x} and @var{y}carried out in machine mode @var{m}. @findex lo_sum@item (lo_sum:@var{m} @var{x} @var{y})Like @code{plus}, except that it represents that sum of @var{x} and thelow-order bits of @var{y}. The number of low order bits ismachine-dependent but is normally the number of bits in a @code{Pmode}item minus the number of bits set by the @code{high} code(@pxref{Constants}).@var{m} should be @code{Pmode}.@findex minus@cindex RTL subtraction@cindex RTL difference@item (minus:@var{m} @var{x} @var{y})Like @code{plus} but represents subtraction.@findex compare@cindex RTL comparison@item (compare:@var{m} @var{x} @var{y})Represents the result of subtracting @var{y} from @var{x} for purposesof comparison. The result is computed without overflow, as if withinfinite precision.Of course, machines can't really subtract with infinite precision.However, they can pretend to do so when only the sign of theresult will be used, which is the case when the result is storedin the condition code. And that is the only way this kind of expressionmay validly be used: as a value to be stored in the condition codes.The mode @var{m} is not related to the modes of @var{x} and @var{y},but instead is the mode of the condition code value. If @code{(cc0)}is used, it is @code{VOIDmode}. Otherwise it is some mode in class@code{MODE_CC}, often @code{CCmode}. @xref{Condition Code}.Normally, @var{x} and @var{y} must have the same mode. Otherwise,@code{compare} is valid only if the mode of @var{x} is in class@code{MODE_INT} and @var{y} is a @code{const_int} or@code{const_double} with mode @code{VOIDmode}. The mode of @var{x}determines what mode the comparison is to be done in; thus it must notbe @code{VOIDmode}.If one of the operands is a constant, it should be placed in thesecond operand and the comparison code adjusted as appropriate. A @code{compare} specifying two @code{VOIDmode} constants is not validsince there is no way to know in what mode the comparison is to beperformed; the comparison must either be folded during the compilationor the first operand must be loaded into a register while its mode isstill known.@findex neg@item (neg:@var{m} @var{x})Represents the negation (subtraction from zero) of the value representedby @var{x}, carried out in mode @var{m}.@findex mult@cindex multiplication@cindex product@item (mult:@var{m} @var{x} @var{y})Represents the signed product of the values represented by @var{x} and@var{y} carried out in machine mode @var{m}.Some machines support a multiplication that generates a product widerthan the operands. Write the pattern for this as@example(mult:@var{m} (sign_extend:@var{m} @var{x}) (sign_extend:@var{m} @var{y}))@end examplewhere @var{m} is wider than the modes of @var{x} and @var{y}, which neednot be the same.Write patterns for unsigned widening multiplication similarly using@code{zero_extend}.@findex div@cindex division@cindex signed division@cindex quotient@item (div:@var{m} @var{x} @var{y})Represents the quotient in signed division of @var{x} by @var{y},carried out in machine mode @var{m}. If @var{m} is a floating pointmode, it represents the exact quotient; otherwise, the integerizedquotient.Some machines have division instructions in which the operands andquotient widths are not all the same; you should represent such instructions using @code{truncate} and @code{sign_extend} as in,@example(truncate:@var{m1} (div:@var{m2} @var{x} (sign_extend:@var{m2} @var{y})))@end example@findex udiv@cindex unsigned division@cindex division@item (udiv:@var{m} @var{x} @var{y})Like @code{div} but represents unsigned division.@findex mod@findex umod@cindex remainder@cindex division@item (mod:@var{m} @var{x} @var{y})
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