📄 md.texi
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@node Simple Constraints, Multi-Alternative, Constraints, Constraints@subsection Simple Constraints@cindex simple constraintsThe simplest kind of constraint is a string full of letters, each ofwhich describes one kind of operand that is permitted. Here arethe letters that are allowed:@table @asis@cindex @samp{m} in constraint@cindex memory references in constraints@item @samp{m}A memory operand is allowed, with any kind of address that the machinesupports in general.@cindex offsettable address@cindex @samp{o} in constraint@item @samp{o}A memory operand is allowed, but only if the address is@dfn{offsettable}. This means that adding a small integer (actually,the width in bytes of the operand, as determined by its machine mode)may be added to the address and the result is also a valid memoryaddress.@cindex autoincrement/decrement addressingFor example, an address which is constant is offsettable; so is anaddress that is the sum of a register and a constant (as long as aslightly larger constant is also within the range of address-offsetssupported by the machine); but an autoincrement or autodecrementaddress is not offsettable. More complicated indirect/indexedaddresses may or may not be offsettable depending on the otheraddressing modes that the machine supports.Note that in an output operand which can be matched by anotheroperand, the constraint letter @samp{o} is valid only when accompaniedby both @samp{<} (if the target machine has predecrement addressing)and @samp{>} (if the target machine has preincrement addressing).@cindex @samp{V} in constraint@item @samp{V}A memory operand that is not offsettable. In other words, anything thatwould fit the @samp{m} constraint but not the @samp{o} constraint.@cindex @samp{<} in constraint@item @samp{<}A memory operand with autodecrement addressing (either predecrement orpostdecrement) is allowed.@cindex @samp{>} in constraint@item @samp{>}A memory operand with autoincrement addressing (either preincrement orpostincrement) is allowed.@cindex @samp{r} in constraint@cindex registers in constraints@item @samp{r}A register operand is allowed provided that it is in a generalregister.@cindex @samp{d} in constraint@item @samp{d}, @samp{a}, @samp{f}, @dots{}Other letters can be defined in machine-dependent fashion to stand forparticular classes of registers. @samp{d}, @samp{a} and @samp{f} aredefined on the 68000/68020 to stand for data, address and floatingpoint registers.@cindex constants in constraints@cindex @samp{i} in constraint@item @samp{i}An immediate integer operand (one with constant value) is allowed.This includes symbolic constants whose values will be known only atassembly time.@cindex @samp{n} in constraint@item @samp{n}An immediate integer operand with a known numeric value is allowed.Many systems cannot support assembly-time constants for operands lessthan a word wide. Constraints for these operands should use @samp{n}rather than @samp{i}.@cindex @samp{I} in constraint@item @samp{I}, @samp{J}, @samp{K}, @dots{} @samp{P}Other letters in the range @samp{I} through @samp{P} may be defined ina machine-dependent fashion to permit immediate integer operands withexplicit integer values in specified ranges. For example, on the68000, @samp{I} is defined to stand for the range of values 1 to 8.This is the range permitted as a shift count in the shiftinstructions.@cindex @samp{E} in constraint@item @samp{E}An immediate floating operand (expression code @code{const_double}) isallowed, but only if the target floating point format is the same asthat of the host machine (on which the compiler is running).@cindex @samp{F} in constraint@item @samp{F}An immediate floating operand (expression code @code{const_double}) isallowed.@cindex @samp{G} in constraint@cindex @samp{H} in constraint@item @samp{G}, @samp{H}@samp{G} and @samp{H} may be defined in a machine-dependent fashion topermit immediate floating operands in particular ranges of values.@cindex @samp{s} in constraint@item @samp{s}An immediate integer operand whose value is not an explicit integer isallowed.This might appear strange; if an insn allows a constant operand with avalue not known at compile time, it certainly must allow any knownvalue. So why use @samp{s} instead of @samp{i}? Sometimes it allowsbetter code to be generated.For example, on the 68000 in a fullword instruction it is possible touse an immediate operand; but if the immediate value is between -128and 127, better code results from loading the value into a register andusing the register. This is because the load into the register can bedone with a @samp{moveq} instruction. We arrange for this to happenby defining the letter @samp{K} to mean ``any integer outside therange -128 to 127'', and then specifying @samp{Ks} in the operandconstraints.@cindex @samp{g} in constraint@item @samp{g}Any register, memory or immediate integer operand is allowed, except forregisters that are not general registers.@cindex @samp{X} in constraint@item @samp{X}Any operand whatsoever is allowed, even if it does not satisfy@code{general_operand}. This is normally used in the constraint ofa @code{match_scratch} when certain alternatives will not actually require a scratch register.@cindex @samp{0} in constraint@cindex digits in constraint@item @samp{0}, @samp{1}, @samp{2}, @dots{} @samp{9}An operand that matches the specified operand number is allowed. If adigit is used together with letters within the same alternative, thedigit should come last.@cindex matching constraint@cindex constraint, matchingThis is called a @dfn{matching constraint} and what it really means isthat the assembler has only a single operand that fills two rolesconsidered separate in the RTL insn. For example, an add insn has twoinput operands and one output operand in the RTL, but on most CISCmachines an add instruction really has only two operands, one of them aninput-output operand:@exampleaddl #35,r12@end exampleMatching constraints are used in these circumstances.More precisely, the two operands that match must include one input-onlyoperand and one output-only operand. Moreover, the digit must be asmaller number than the number of the operand that uses it in theconstraint.For operands to match in a particular case usually means that theyare identical-looking RTL expressions. But in a few special casesspecific kinds of dissimilarity are allowed. For example, @code{*x}as an input operand will match @code{*x++} as an output operand.For proper results in such cases, the output template should alwaysuse the output-operand's number when printing the operand.@cindex load address instruction@cindex push address instruction@cindex address constraints@cindex @samp{p} in constraint@item @samp{p}An operand that is a valid memory address is allowed. This isfor ``load address'' and ``push address'' instructions.@findex address_operand@samp{p} in the constraint must be accompanied by @code{address_operand}as the predicate in the @code{match_operand}. This predicate interpretsthe mode specified in the @code{match_operand} as the mode of the memoryreference for which the address would be valid.@cindex extensible constraints@cindex @samp{Q}, in constraint@item @samp{Q}, @samp{R}, @samp{S}, @dots{} @samp{U}Letters in the range @samp{Q} through @samp{U} may be defined in amachine-dependent fashion to stand for arbitrary operand types.The machine description macro @code{EXTRA_CONSTRAINT} is passed theoperand as its first argument and the constraint letter as itssecond operand.A typical use for this would be to distinguish certain types ofmemory references that affect other insn operands.Do not define these constraint letters to accept register references(@code{reg}); the reload pass does not expect this and would not handleit properly.@end tableIn order to have valid assembler code, each operand must satisfyits constraint. But a failure to do so does not prevent the patternfrom applying to an insn. Instead, it directs the compiler to modifythe code so that the constraint will be satisfied. Usually this isdone by copying an operand into a register.Contrast, therefore, the two instruction patterns that follow:@example(define_insn "" [(set (match_operand:SI 0 "general_operand" "=r") (plus:SI (match_dup 0) (match_operand:SI 1 "general_operand" "r")))] "" "@dots{}")@end example@noindentwhich has two operands, one of which must appear in two places, and@example(define_insn "" [(set (match_operand:SI 0 "general_operand" "=r") (plus:SI (match_operand:SI 1 "general_operand" "0") (match_operand:SI 2 "general_operand" "r")))] "" "@dots{}")@end example@noindentwhich has three operands, two of which are required by a constraint to beidentical. If we are considering an insn of the form@example(insn @var{n} @var{prev} @var{next} (set (reg:SI 3) (plus:SI (reg:SI 6) (reg:SI 109))) @dots{})@end example@noindentthe first pattern would not apply at all, because this insn does notcontain two identical subexpressions in the right place. The pattern wouldsay, ``That does not look like an add instruction; try other patterns.''The second pattern would say, ``Yes, that's an add instruction, but thereis something wrong with it.'' It would direct the reload pass of thecompiler to generate additional insns to make the constraint true. Theresults might look like this:@example(insn @var{n2} @var{prev} @var{n} (set (reg:SI 3) (reg:SI 6)) @dots{})(insn @var{n} @var{n2} @var{next} (set (reg:SI 3) (plus:SI (reg:SI 3) (reg:SI 109))) @dots{})@end exampleIt is up to you to make sure that each operand, in each pattern, hasconstraints that can handle any RTL expression that could be present forthat operand. (When multiple alternatives are in use, each pattern must,for each possible combination of operand expressions, have at least onealternative which can handle that combination of operands.) Theconstraints don't need to @emph{allow} any possible operand---when this isthe case, they do not constrain---but they must at least point the way toreloading any possible operand so that it will fit.@itemize @bullet@itemIf the constraint accepts whatever operands the predicate permits,there is no problem: reloading is never necessary for this operand.For example, an operand whose constraints permit everything exceptregisters is safe provided its predicate rejects registers.An operand whose predicate accepts only constant values is safeprovided its constraints include the letter @samp{i}. If any possibleconstant value is accepted, then nothing less than @samp{i} will do;if the predicate is more selective, then the constraints may also bemore selective.@itemAny operand expression can be reloaded by copying it into a register.So if an operand's constraints allow some kind of register, it iscertain to be safe. It need not permit all classes of registers; thecompiler knows how to copy a register into another register of theproper class in order to make an instruction valid.@cindex nonoffsettable memory reference@cindex memory reference, nonoffsettable@itemA nonoffsettable memory reference can be reloaded by copying theaddress into a register. So if the constraint uses the letter@samp{o}, all memory references are taken care of.@itemA constant operand can be reloaded by allocating space in memory tohold it as preinitialized data. Then the memory reference can be usedin place of the constant. So if the constraint uses the letters
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