📄 i386.h
字号:
This is an array of structures. Each structure initializes one pair of eliminable registers. The "from" register number is given first, followed by "to". Eliminations of the same "from" register are listed in order of preference. We have two registers that can be eliminated on the i386. First, the frame pointer register can often be eliminated in favor of the stack pointer register. Secondly, the argument pointer register can always be eliminated; it is replaced with either the stack or frame pointer. */#define ELIMINABLE_REGS \{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}/* Given FROM and TO register numbers, say whether this elimination is allowed. Frame pointer elimination is automatically handled. For the i386, if frame pointer elimination is being done, we would like to convert ap into sp, not fp. All other eliminations are valid. */#define CAN_ELIMINATE(FROM, TO) \ ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \ ? ! frame_pointer_needed \ : 1)/* Define the offset between two registers, one to be eliminated, and the other its replacement, at the start of a routine. */#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \{ \ if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \ (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \ else \ { \ int regno; \ int offset = 0; \ \ for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \ if ((regs_ever_live[regno] && ! call_used_regs[regno]) \ || (current_function_uses_pic_offset_table \ && regno == PIC_OFFSET_TABLE_REGNUM)) \ offset += 4; \ \ (OFFSET) = offset + get_frame_size (); \ \ if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \ (OFFSET) += 4; /* Skip saved PC */ \ } \}/* Addressing modes, and classification of registers for them. *//* #define HAVE_POST_INCREMENT *//* #define HAVE_POST_DECREMENT *//* #define HAVE_PRE_DECREMENT *//* #define HAVE_PRE_INCREMENT *//* Macros to check register numbers against specific register classes. *//* These assume that REGNO is a hard or pseudo reg number. They give nonzero only if REGNO is a hard reg of the suitable class or a pseudo reg currently allocated to a suitable hard reg. Since they use reg_renumber, they are safe only once reg_renumber has been allocated, which happens in local-alloc.c. */#define REGNO_OK_FOR_INDEX_P(REGNO) \ ((REGNO) < STACK_POINTER_REGNUM \ || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)#define REGNO_OK_FOR_BASE_P(REGNO) \ ((REGNO) <= STACK_POINTER_REGNUM \ || (REGNO) == ARG_POINTER_REGNUM \ || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)#define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)#define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check its validity for a certain class. We have two alternate definitions for each of them. The usual definition accepts all pseudo regs; the other rejects them unless they have been allocated suitable hard regs. The symbol REG_OK_STRICT causes the latter definition to be used. Most source files want to accept pseudo regs in the hope that they will get allocated to the class that the insn wants them to be in. Source files for reload pass need to be strict. After reload, it makes no difference, since pseudo regs have been eliminated by then. */#ifndef REG_OK_STRICT/* Nonzero if X is a hard reg that can be used as an index or if it is a pseudo reg. */#define REG_OK_FOR_INDEX_P(X) \ (REGNO (X) < STACK_POINTER_REGNUM \ || REGNO (X) >= FIRST_PSEUDO_REGISTER)/* Nonzero if X is a hard reg that can be used as a base reg of if it is a pseudo reg. */ /* ?wfs */#define REG_OK_FOR_BASE_P(X) \ (REGNO (X) <= STACK_POINTER_REGNUM \ || REGNO (X) == ARG_POINTER_REGNUM \ || REGNO(X) >= FIRST_PSEUDO_REGISTER)#define REG_OK_FOR_STRREG_P(X) \ (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)#else/* Nonzero if X is a hard reg that can be used as an index. */#define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))/* Nonzero if X is a hard reg that can be used as a base reg. */#define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))#define REG_OK_FOR_STRREG_P(X) \ (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))#endif/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a valid memory address for an instruction. The MODE argument is the machine mode for the MEM expression that wants to use this address. The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, except for CONSTANT_ADDRESS_P which is usually machine-independent. See legitimize_pic_address in i386.c for details as to what constitutes a legitimate address when -fpic is used. */#define MAX_REGS_PER_ADDRESS 2#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)/* Nonzero if the constant value X is a legitimate general operand. It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */#define LEGITIMATE_CONSTANT_P(X) 1#define GO_IF_INDEXABLE_BASE(X, ADDR) \ if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR#define LEGITIMATE_INDEX_REG_P(X) \ (GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X))/* Return 1 if X is an index or an index times a scale. */#define LEGITIMATE_INDEX_P(X) \ (LEGITIMATE_INDEX_REG_P (X) \ || (GET_CODE (X) == MULT \ && LEGITIMATE_INDEX_REG_P (XEXP (X, 0)) \ && GET_CODE (XEXP (X, 1)) == CONST_INT \ && (INTVAL (XEXP (X, 1)) == 2 \ || INTVAL (XEXP (X, 1)) == 4 \ || INTVAL (XEXP (X, 1)) == 8)))/* Go to ADDR if X is an index term, a base reg, or a sum of those. */#define GO_IF_INDEXING(X, ADDR) \{ if (LEGITIMATE_INDEX_P (X)) goto ADDR; \ GO_IF_INDEXABLE_BASE (X, ADDR); \ if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 0))) \ { GO_IF_INDEXABLE_BASE (XEXP (X, 1), ADDR); } \ if (GET_CODE (X) == PLUS && LEGITIMATE_INDEX_P (XEXP (X, 1))) \ { GO_IF_INDEXABLE_BASE (XEXP (X, 0), ADDR); } }/* We used to allow this, but it isn't ever used. || ((GET_CODE (X) == POST_DEC || GET_CODE (X) == POST_INC) \ && REG_P (XEXP (X, 0)) \ && REG_OK_FOR_STRREG_P (XEXP (X, 0))) \*/#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \{ \ if (CONSTANT_ADDRESS_P (X) \ && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (X))) \ goto ADDR; \ GO_IF_INDEXING (X, ADDR); \ if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \ { \ rtx x0 = XEXP (X, 0); \ if (! flag_pic || ! SYMBOLIC_CONST (XEXP (X, 1))) \ { GO_IF_INDEXING (x0, ADDR); } \ else if (x0 == pic_offset_table_rtx) \ goto ADDR; \ else if (GET_CODE (x0) == PLUS) \ { \ if (XEXP (x0, 0) == pic_offset_table_rtx) \ { GO_IF_INDEXABLE_BASE (XEXP (x0, 1), ADDR); } \ if (XEXP (x0, 1) == pic_offset_table_rtx) \ { GO_IF_INDEXABLE_BASE (XEXP (x0, 0), ADDR); } \ } \ } \}/* Try machine-dependent ways of modifying an illegitimate address to be legitimate. If we find one, return the new, valid address. This macro is used in only one place: `memory_address' in explow.c. OLDX is the address as it was before break_out_memory_refs was called. In some cases it is useful to look at this to decide what needs to be done. MODE and WIN are passed so that this macro can use GO_IF_LEGITIMATE_ADDRESS. It is always safe for this macro to do nothing. It exists to recognize opportunities to optimize the output. For the 80386, we handle X+REG by loading X into a register R and using R+REG. R will go in a general reg and indexing will be used. However, if REG is a broken-out memory address or multiplication, nothing needs to be done because REG can certainly go in a general reg. When -fpic is used, special handling is needed for symbolic references. See comments by legitimize_pic_address in i386.c for details. */#define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \{ extern rtx legitimize_pic_address (); \ int ch = (X) != (OLDX); \ if (flag_pic && SYMBOLIC_CONST (X)) \ { \ (X) = legitimize_pic_address (X, 0); \ if (memory_address_p (MODE, X)) \ goto WIN; \ } \ if (GET_CODE (X) == PLUS) \ { if (GET_CODE (XEXP (X, 0)) == MULT) \ ch = 1, XEXP (X, 0) = force_operand (XEXP (X, 0), 0); \ if (GET_CODE (XEXP (X, 1)) == MULT) \ ch = 1, XEXP (X, 1) = force_operand (XEXP (X, 1), 0); \ if (ch && GET_CODE (XEXP (X, 1)) == REG \ && GET_CODE (XEXP (X, 0)) == REG) \ goto WIN; \ if (flag_pic && SYMBOLIC_CONST (XEXP (X, 1))) \ ch = 1, (X) = legitimize_pic_address (X, 0); \ if (ch) { GO_IF_LEGITIMATE_ADDRESS (MODE, X, WIN); } \ if (GET_CODE (XEXP (X, 0)) == REG) \ { register rtx temp = gen_reg_rtx (Pmode); \ register rtx val = force_operand (XEXP (X, 1), temp); \ if (val != temp) emit_move_insn (temp, val); \ XEXP (X, 1) = temp; \ goto WIN; } \ else if (GET_CODE (XEXP (X, 1)) == REG) \ { register rtx temp = gen_reg_rtx (Pmode); \ register rtx val = force_operand (XEXP (X, 0), temp); \ if (val != temp) emit_move_insn (temp, val); \ XEXP (X, 0) = temp; \ goto WIN; }}}/* Nonzero if the constant value X is a legitimate general operand when generating PIC code. It is given that flag_pic is on and that X satisfies CONSTANT_P or is a CONST_DOUBLE. */#define LEGITIMATE_PIC_OPERAND_P(X) \ (! SYMBOLIC_CONST (X) \ || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))#define SYMBOLIC_CONST(X) \(GET_CODE (X) == SYMBOL_REF \ || GET_CODE (X) == LABEL_REF \ || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))/* Go to LABEL if ADDR (a legitimate address expression) has an effect that depends on the machine mode it is used for. On the 80386, only postdecrement and postincrement address depend thus (the amount of decrement or increment being the length of the operand). */#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \ if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL/* Define this macro if references to a symbol must be treated differently depending on something about the variable or function named by the symbol (such as what section it is in). On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol so that we may access it directly in the GOT. */#define ENCODE_SECTION_INFO(DECL) \do \ { \ if (flag_pic) \ { \ rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \ SYMBOL_REF_FLAG (XEXP (rtl, 0)) \ = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \ || ! TREE_PUBLIC (DECL)); \ } \ } \while (0)/* Specify the machine mode that this machine uses for the index in the tablejump instruction. */#define CASE_VECTOR_MODE Pmode/* Define this if the tablejump instruction expects the table to contain offsets from the address of the table. Do not define this if the table should contain absolute addresses. *//* #define CASE_VECTOR_PC_RELATIVE *//* Specify the tree operation to be used to convert reals to integers. This should be changed to take advantage of fist --wfs ?? */#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR/* This is the kind of divide that is easiest to do in the general case. */#define EASY_DIV_EXPR TRUNC_DIV_EXPR/* Define this as 1 if `char' should by default be signed; else as 0. */#define DEFAULT_SIGNED_CHAR 1/* Max number of bytes we can move from memory to memory in one reasonably fast instruction. */#define MOVE_MAX 4/* MOVE_RATIO is the number of move instructions that is better than a block move. Make this large on i386, since the block move is very inefficient with small blocks, and the hard register needs of the block move require much reload work. */#define MOVE_RATIO 5/* Define this if zero-extension is slow (more than one real instruction). *//* #define SLOW_ZERO_EXTEND *//* Nonzero if access to memory by bytes is slow and undesirable. */#define SLOW_BYTE_ACCESS 0/* Define if shifts truncate the shift count which implies one can omit a sign-extension or zero-extension of a shift count. *//* One i386, shifts do truncate the count. But bit opcodes don't. *//* #define SHIFT_COUNT_TRUNCATED *//* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits is done just by pretending it is already truncated. */#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1/* We assume that the store-condition-codes instructions store 0 for false and some other value for true. This is the value stored for true. */#define STORE_FLAG_VALUE 1/* When a prototype says `char' or `short', really pass an `int'. (The 386 can't easily push less than an int.) */#define PROMOTE_PROTOTYPES/* Specify the machine mode that pointers have. After generation of rtl, the compiler makes no further distinction between pointers and any other objects of this machine mode. */#define Pmode SImode/* A function address in a call instruction is a byte address (for indexing purposes) so give the MEM rtx a byte's mode. */#define FUNCTION_MODE QImode/* Define this if addresses of constant functions shouldn't be put through pseudo regs where they can be cse'd. Desirable on the 386 because a CALL with a constant address is not much slower than one with a register address. */#define NO_FUNCTION_CSE/* Provide the costs of a rtl expression. This is in the body of a switch on CODE. */#define RTX_COSTS(X,CODE,OUTER_CODE) \ case MULT: \ return COSTS_N_INSNS (10); \ case DIV: \ case UDIV: \ case MOD: \ case UMOD: \ return COSTS_N_INSNS (40); \ case PLUS: \ if (GET_CODE (XEXP (X, 0)) == REG \ && GET_CODE (XEXP (X, 1)) == CONST_INT) \ return 1; \ break;/* Compute the cost of computing a constant rtl expression RTX whose rtx-code is CODE. The body of this macro is a portion of a switch statement. If the code is computed here,
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -