📄 reload.c
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{ rtx note; int regno; for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) if (REG_NOTE_KIND (note) == REG_DEAD && GET_CODE (XEXP (note, 0)) == REG && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER && reg_mentioned_p (XEXP (note, 0), in) && ! refers_to_regno_for_reload_p (regno, (regno + HARD_REGNO_NREGS (regno, inmode)), PATTERN (this_insn), inloc) && (in != out || (GET_CODE (in) == SUBREG && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD) == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))) /* Make sure the operand fits in the reg that dies. */ && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))) && HARD_REGNO_MODE_OK (regno, inmode) && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))) && HARD_REGNO_MODE_OK (regno, outmode) && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno) && !fixed_regs[regno]) { reload_reg_rtx[i] = gen_rtx (REG, inmode, regno); break; } } if (out) output_reloadnum = i; return i;}/* Record an additional place we must replace a value for which we have already recorded a reload. RELOADNUM is the value returned by push_reload when the reload was recorded. This is used in insn patterns that use match_dup. */static voidpush_replacement (loc, reloadnum, mode) rtx *loc; int reloadnum; enum machine_mode mode;{ if (replace_reloads) { register struct replacement *r = &replacements[n_replacements++]; r->what = reloadnum; r->where = loc; r->subreg_loc = 0; r->mode = mode; }}/* If there is only one output reload, and it is not for an earlyclobber operand, try to combine it with a (logically unrelated) input reload to reduce the number of reload registers needed. This is safe if the input reload does not appear in the value being output-reloaded, because this implies it is not needed any more once the original insn completes. If that doesn't work, see we can use any of the registers that die in this insn as a reload register. We can if it is of the right class and does not appear in the value being output-reloaded. */static voidcombine_reloads (){ int i; int output_reload = -1; rtx note; /* Find the output reload; return unless there is exactly one and that one is mandatory. */ for (i = 0; i < n_reloads; i++) if (reload_out[i] != 0) { if (output_reload >= 0) return; output_reload = i; } if (output_reload < 0 || reload_optional[output_reload]) return; /* An input-output reload isn't combinable. */ if (reload_in[output_reload] != 0) return; /* If this reload is for an earlyclobber operand, we can't do anything. */ for (i = 0; i < n_earlyclobbers; i++) if (reload_out[output_reload] == reload_earlyclobbers[i]) return; /* Check each input reload; can we combine it? */ for (i = 0; i < n_reloads; i++) if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i] /* Life span of this reload must not extend past main insn. */ && reload_when_needed[i] != RELOAD_FOR_OUTPUT_RELOAD_ADDRESS && ! reload_needed_for_multiple[i] && reload_inmode[i] == reload_outmode[output_reload] && reload_inc[i] == 0 && reload_reg_rtx[i] == 0 && reload_strict_low[i] == 0 /* Don't combine two reloads with different secondary reloads. */ && (reload_secondary_reload[i] == reload_secondary_reload[output_reload] || reload_secondary_reload[i] == -1 || reload_secondary_reload[output_reload] == -1) && (reg_class_subset_p (reload_reg_class[i], reload_reg_class[output_reload]) || reg_class_subset_p (reload_reg_class[output_reload], reload_reg_class[i])) && (MATCHES (reload_in[i], reload_out[output_reload]) /* Args reversed because the first arg seems to be the one that we imagine being modified while the second is the one that might be affected. */ || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload], reload_in[i]) /* However, if the input is a register that appears inside the output, then we also can't share. Imagine (set (mem (reg 69)) (plus (reg 69) ...)). If the same reload reg is used for both reg 69 and the result to be stored in memory, then that result will clobber the address of the memory ref. */ && ! (GET_CODE (reload_in[i]) == REG && reg_overlap_mentioned_for_reload_p (reload_in[i], reload_out[output_reload]))))) { int j; /* We have found a reload to combine with! */ reload_out[i] = reload_out[output_reload]; reload_outmode[i] = reload_outmode[output_reload]; /* Mark the old output reload as inoperative. */ reload_out[output_reload] = 0; /* The combined reload is needed for the entire insn. */ reload_needed_for_multiple[i] = 1; reload_when_needed[i] = RELOAD_OTHER; /* If the output reload had a secondary reload, copy it. */ if (reload_secondary_reload[output_reload] != -1) reload_secondary_reload[i] = reload_secondary_reload[output_reload]; /* If required, minimize the register class. */ if (reg_class_subset_p (reload_reg_class[output_reload], reload_reg_class[i])) reload_reg_class[i] = reload_reg_class[output_reload]; /* Transfer all replacements from the old reload to the combined. */ for (j = 0; j < n_replacements; j++) if (replacements[j].what == output_reload) replacements[j].what = i; return; } /* If this insn has only one operand that is modified or written (assumed to be the first), it must be the one corresponding to this reload. It is safe to use anything that dies in this insn for that output provided that it does not occur in the output (we already know it isn't an earlyclobber. If this is an asm insn, give up. */ if (INSN_CODE (this_insn) == -1) return; for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++) if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '=' || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+') return; /* See if some hard register that dies in this insn and is not used in the output is the right class. Only works if the register we pick up can fully hold our output reload. */ for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) if (REG_NOTE_KIND (note) == REG_DEAD && GET_CODE (XEXP (note, 0)) == REG && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0), reload_out[output_reload]) && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload]) && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]], REGNO (XEXP (note, 0))) && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload]) <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0)))) && ! fixed_regs[REGNO (XEXP (note, 0))]) { reload_reg_rtx[output_reload] = gen_rtx (REG, reload_outmode[output_reload], REGNO (XEXP (note, 0))); return; }}/* Try to find a reload register for an in-out reload (expressions IN and OUT). See if one of IN and OUT is a register that may be used; this is desirable since a spill-register won't be needed. If so, return the register rtx that proves acceptable. INLOC and OUTLOC are locations where IN and OUT appear in the insn. CLASS is the register class required for the reload. If FOR_REAL is >= 0, it is the number of the reload, and in some cases when it can be discovered that OUT doesn't need to be computed, clear out reload_out[FOR_REAL]. If FOR_REAL is -1, this should not be done, because this call is just to see if a register can be found, not to find and install it. */static rtxfind_dummy_reload (real_in, real_out, inloc, outloc, class, for_real) rtx real_in, real_out; rtx *inloc, *outloc; enum reg_class class; int for_real;{ rtx in = real_in; rtx out = real_out; int in_offset = 0; int out_offset = 0; rtx value = 0; /* If operands exceed a word, we can't use either of them unless they have the same size. */ if (GET_MODE_SIZE (GET_MODE (real_out)) != GET_MODE_SIZE (GET_MODE (real_in)) && (GET_MODE_SIZE (GET_MODE (real_out)) > UNITS_PER_WORD || GET_MODE_SIZE (GET_MODE (real_in)) > UNITS_PER_WORD)) return 0; /* Find the inside of any subregs. */ while (GET_CODE (out) == SUBREG) { out_offset = SUBREG_WORD (out); out = SUBREG_REG (out); } while (GET_CODE (in) == SUBREG) { in_offset = SUBREG_WORD (in); in = SUBREG_REG (in); } /* Narrow down the reg class, the same way push_reload will; otherwise we might find a dummy now, but push_reload won't. */ class = PREFERRED_RELOAD_CLASS (in, class); /* See if OUT will do. */ if (GET_CODE (out) == REG && REGNO (out) < FIRST_PSEUDO_REGISTER) { register int regno = REGNO (out) + out_offset; int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_out)); rtx saved_rtx; /* When we consider whether the insn uses OUT, ignore references within IN. They don't prevent us from copying IN into OUT, because those refs would move into the insn that reloads IN. However, we only ignore IN in its role as this reload. If the insn uses IN elsewhere and it contains OUT, that counts. We can't be sure it's the "same" operand so it might not go through this reload. */ saved_rtx = *inloc; *inloc = const0_rtx; if (regno < FIRST_PSEUDO_REGISTER /* A fixed reg that can overlap other regs better not be used for reloading in any way. */#ifdef OVERLAPPING_REGNO_P && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno))#endif && ! refers_to_regno_for_reload_p (regno, regno + nwords, PATTERN (this_insn), outloc)) { int i; for (i = 0; i < nwords; i++) if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno + i)) break; if (i == nwords) { if (GET_CODE (real_out) == REG) value = real_out; else value = gen_rtx (REG, GET_MODE (real_out), regno); } } *inloc = saved_rtx; } /* Consider using IN if OUT was not acceptable or if OUT dies in this insn (like the quotient in a divmod insn). We can't use IN unless it is dies in this insn, which means we must know accurately which hard regs are live. Also, the result can't go in IN if IN is used within OUT. */ if (hard_regs_live_known && GET_CODE (in) == REG && REGNO (in) < FIRST_PSEUDO_REGISTER && (value == 0 || find_reg_note (this_insn, REG_UNUSED, real_out)) && find_reg_note (this_insn, REG_DEAD, real_in) && !fixed_regs[REGNO (in)] && HARD_REGNO_MODE_OK (REGNO (in), GET_MODE (out))) { register int regno = REGNO (in) + in_offset; int nwords = HARD_REGNO_NREGS (regno, GET_MODE (real_in)); if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR) && ! hard_reg_set_here_p (regno, regno + nwords, PATTERN (this_insn))) { int i; for (i = 0; i < nwords; i++) if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno + i)) break; if (i == nwords) { /* If we were going to use OUT as the reload reg and changed our mind, it means OUT is a dummy that dies here. So don't bother copying value to it. */ if (for_real >= 0 && value == real_out) reload_out[for_real] = 0; if (GET_CODE (real_in) == REG) value = real_in; else value = gen_rtx (REG, GET_MODE (real_in), regno); } } } return value;}/* This page contains subroutines used mainly for determining whether the IN or an OUT of a reload can serve as the reload register. *//* Return 1 if expression X alters a hard reg in the range from BEG_REGNO (inclusive) to END_REGNO (exclusive), either explicitly or in the guise of a pseudo-reg allocated to REGNO. X should be the body of an instruction. */static inthard_reg_set_here_p (beg_regno, end_regno, x) register int beg_regno, end_regno; rtx x;{ if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) { register rtx op0 = SET_DEST (x); while (GET_CODE (op0) == SUBREG) op0 = SUBREG_REG (op0); if (GET_CODE (op0) == REG) { register int r = REGNO (op0); /* See if this reg overlaps range under consideration. */ if (r < end_regno && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno) return 1; } } else if (GET_CODE (x) == PARALLEL) { register int i = XVECLEN (x, 0) - 1;
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