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@findex OVERLAPPING_REGNO_P 
@item OVERLAPPING_REGNO_P (@var{regno})
If defined, this is a C expression whose value is nonzero if hard
register number @var{regno} is an overlapping register.  This means a
hard register which overlaps a hard register with a different number.
(Such overlap is undesirable, but occasionally it allows a machine to
be supported which otherwise could not be.)  This macro must return
nonzero for @emph{all} the registers which overlap each other.  GNU CC
can use an overlapping register only in certain limited ways.  It can
be used for allocation within a basic block, and may be spilled for
reloading; that is all.

If this macro is not defined, it means that none of the hard registers
overlap each other.  This is the usual situation.

@findex INSN_CLOBBERS_REGNO_P
@item INSN_CLOBBERS_REGNO_P (@var{insn}, @var{regno})
If defined, this is a C expression whose value should be nonzero if
the insn @var{insn} has the effect of mysteriously clobbering the
contents of hard register number @var{regno}.  By ``mysterious'' we
mean that the insn's RTL expression doesn't describe such an effect.

If this macro is not defined, it means that no insn clobbers registers
mysteriously.  This is the usual situation; all else being equal,
it is best for the RTL expression to show all the activity.

@cindex death notes
@findex PRESERVE_DEATH_INFO_REGNO_P
@item PRESERVE_DEATH_INFO_REGNO_P (@var{regno})
If defined, this is a C expression whose value is nonzero if accurate
@code{REG_DEAD} notes are needed for hard register number @var{regno}
at the time of outputting the assembler code.  When this is so, a few
optimizations that take place after register allocation and could
invalidate the death notes are not done when this register is
involved.

You would arrange to preserve death info for a register when some of the
code in the machine description which is executed to write the assembler
code looks at the death notes.  This is necessary only when the actual
hardware feature which GNU CC thinks of as a register is not actually a
register of the usual sort.  (It might, for example, be a hardware
stack.)

If this macro is not defined, it means that no death notes need to be
preserved.  This is the usual situation.
@end table

@node Register Classes
@section Register Classes
@cindex register class definitions
@cindex class definitions, register

On many machines, the numbered registers are not all equivalent.
For example, certain registers may not be allowed for indexed addressing;
certain registers may not be allowed in some instructions.  These machine
restrictions are described to the compiler using @dfn{register classes}.

You define a number of register classes, giving each one a name and saying
which of the registers belong to it.  Then you can specify register classes
that are allowed as operands to particular instruction patterns.

@findex ALL_REGS
@findex NO_REGS
In general, each register will belong to several classes.  In fact, one
class must be named @code{ALL_REGS} and contain all the registers.  Another
class must be named @code{NO_REGS} and contain no registers.  Often the
union of two classes will be another class; however, this is not required.

@findex GENERAL_REGS
One of the classes must be named @code{GENERAL_REGS}.  There is nothing
terribly special about the name, but the operand constraint letters
@samp{r} and @samp{g} specify this class.  If @code{GENERAL_REGS} is
the same as @code{ALL_REGS}, just define it as a macro which expands
to @code{ALL_REGS}.

Order the classes so that if class @var{x} is contained in class @var{y}
then @var{x} has a lower class number than @var{y}.

The way classes other than @code{GENERAL_REGS} are specified in operand
constraints is through machine-dependent operand constraint letters.
You can define such letters to correspond to various classes, then use
them in operand constraints.

You should define a class for the union of two classes whenever some
instruction allows both classes.  For example, if an instruction allows
either a floating point (coprocessor) register or a general register for a
certain operand, you should define a class @code{FLOAT_OR_GENERAL_REGS}
which includes both of them.  Otherwise you will get suboptimal code.

You must also specify certain redundant information about the register
classes: for each class, which classes contain it and which ones are
contained in it; for each pair of classes, the largest class contained
in their union.

When a value occupying several consecutive registers is expected in a
certain class, all the registers used must belong to that class.
Therefore, register classes cannot be used to enforce a requirement for
a register pair to start with an even-numbered register.  The way to
specify this requirement is with @code{HARD_REGNO_MODE_OK}.

Register classes used for input-operands of bitwise-and or shift
instructions have a special requirement: each such class must have, for
each fixed-point machine mode, a subclass whose registers can transfer that
mode to or from memory.  For example, on some machines, the operations for
single-byte values (@code{QImode}) are limited to certain registers.  When
this is so, each register class that is used in a bitwise-and or shift
instruction must have a subclass consisting of registers from which
single-byte values can be loaded or stored.  This is so that
@code{PREFERRED_RELOAD_CLASS} can always have a possible value to return.

@table @code
@findex enum reg_class
@item enum reg_class
An enumeral type that must be defined with all the register class names
as enumeral values.  @code{NO_REGS} must be first.  @code{ALL_REGS}
must be the last register class, followed by one more enumeral value,
@code{LIM_REG_CLASSES}, which is not a register class but rather
tells how many classes there are.

Each register class has a number, which is the value of casting
the class name to type @code{int}.  The number serves as an index
in many of the tables described below.

@findex N_REG_CLASSES
@item N_REG_CLASSES
The number of distinct register classes, defined as follows:

@example
#define N_REG_CLASSES (int) LIM_REG_CLASSES
@end example

@findex REG_CLASS_NAMES
@item REG_CLASS_NAMES
An initializer containing the names of the register classes as C string
constants.  These names are used in writing some of the debugging dumps.

@findex REG_CLASS_CONTENTS
@item REG_CLASS_CONTENTS
An initializer containing the contents of the register classes, as integers
which are bit masks.  The @var{n}th integer specifies the contents of class
@var{n}.  The way the integer @var{mask} is interpreted is that
register @var{r} is in the class if @code{@var{mask} & (1 << @var{r})} is 1.

When the machine has more than 32 registers, an integer does not suffice.
Then the integers are replaced by sub-initializers, braced groupings containing
several integers.  Each sub-initializer must be suitable as an initializer
for the type @code{HARD_REG_SET} which is defined in @file{hard-reg-set.h}.

@findex REGNO_REG_CLASS 
@item REGNO_REG_CLASS (@var{regno})
A C expression whose value is a register class containing hard register
@var{regno}.  In general there is more than one such class; choose a class
which is @dfn{minimal}, meaning that no smaller class also contains the
register.

@findex BASE_REG_CLASS
@item BASE_REG_CLASS
A macro whose definition is the name of the class to which a valid
base register must belong.  A base register is one used in an address
which is the register value plus a displacement.

@findex INDEX_REG_CLASS
@item INDEX_REG_CLASS
A macro whose definition is the name of the class to which a valid
index register must belong.  An index register is one used in an
address where its value is either multiplied by a scale factor or
added to another register (as well as added to a displacement).

@findex REG_CLASS_FROM_LETTER
@item REG_CLASS_FROM_LETTER (@var{char})
A C expression which defines the machine-dependent operand constraint
letters for register classes.  If @var{char} is such a letter, the
value should be the register class corresponding to it.  Otherwise,
the value should be @code{NO_REGS}.  The register letter @samp{r},
corresponding to class @code{GENERAL_REGS}, will not be passed
to this macro; you do not need to handle it.

@findex REGNO_OK_FOR_BASE_P
@item REGNO_OK_FOR_BASE_P (@var{num})
A C expression which is nonzero if register number @var{num} is
suitable for use as a base register in operand addresses.  It may be
either a suitable hard register or a pseudo register that has been
allocated such a hard register.

@findex REGNO_OK_FOR_INDEX_P
@item REGNO_OK_FOR_INDEX_P (@var{num})
A C expression which is nonzero if register number @var{num} is
suitable for use as an index register in operand addresses.  It may be
either a suitable hard register or a pseudo register that has been
allocated such a hard register.

The difference between an index register and a base register is that
the index register may be scaled.  If an address involves the sum of
two registers, neither one of them scaled, then either one may be
labeled the ``base'' and the other the ``index''; but whichever
labeling is used must fit the machine's constraints of which registers
may serve in each capacity.  The compiler will try both labelings,
looking for one that is valid, and will reload one or both registers
only if neither labeling works.

@findex PREFERRED_RELOAD_CLASS
@item PREFERRED_RELOAD_CLASS (@var{x}, @var{class})
A C expression that places additional restrictions on the register class
to use when it is necessary to copy value @var{x} into a register in class
@var{class}.  The value is a register class; perhaps @var{class}, or perhaps
another, smaller class.  On many machines, the definition

@example
#define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
@end example

@noindent
is safe.

Sometimes returning a more restrictive class makes better code.  For
example, on the 68000, when @var{x} is an integer constant that is in range
for a @samp{moveq} instruction, the value of this macro is always
@code{DATA_REGS} as long as @var{class} includes the data registers.
Requiring a data register guarantees that a @samp{moveq} will be used.

If @var{x} is a @code{const_double}, by returning @code{NO_REGS}
you can force @var{x} into a memory constant.  This is useful on
certain machines where immediate floating values cannot be loaded into
certain kinds of registers.

@findex PREFERRED_OUTPUT_RELOAD_CLASS
@item PREFERRED_OUTPUT_RELOAD_CLASS (@var{x}, @var{class})
Like @code{PREFERRED_RELOAD_CLASS}, but for output reloads instead of
input reloads.  If you don't define this macro, the default is to use
@var{class}, unchanged.

@findex LIMIT_RELOAD_CLASS
@item LIMIT_RELOAD_CLASS (@var{mode}, @var{class})
A C expression that places additional restrictions on the register class
to use when it is necessary to be able to hold a value of mode
@var{mode} in a reload register for which class @var{class} would
ordinarily be used.

Unlike @code{PREFERRED_RELOAD_CLASS}, this macro should be used when
there are certain modes that simply can't go in certain reload classes.

The value is a register class; perhaps @var{class}, or perhaps another,
smaller class.

Don't define this macro unless the target machine has limitations which
require the macro to do something nontrivial.

@findex SECONDARY_RELOAD_CLASS
@findex SECONDARY_INPUT_RELOAD_CLASS
@findex SECONDARY_OUTPUT_RELOAD_CLASS
@item SECONDARY_RELOAD_CLASS (@var{class}, @var{mode}, @var{x})
@itemx SECONDARY_INPUT_RELOAD_CLASS (@var{class}, @var{mode}, @var{x})
@itemx SECONDARY_OUTPUT_RELOAD_CLASS (@var{class}, @var{mode}, @var{x})
Many machines have some registers that cannot be copied directly to or
from memory or even from other types of registers.  An example is the
@samp{MQ} register, which on most machines, can only be copied to or
from general registers, but not memory.  Some machines allow copying all
registers to and from memory, but require a scratch register for stores
to some memory locations (e.g., those with symbolic address on the RT,
and those with certain symbolic address on the Sparc when compiling
PIC).  In some cases, both an intermediate and a scratch register are
required.

You should define these macros to indicate to the reload phase that it may
need to allocate at least one register for a reload in addition to the
register to contain the data.  Specifically, if copying @var{x} to a
register @var{class} in @var{mode} requires an intermediate register,
you should define @code{SECONDARY_INPUT_RELOAD_CLASS} to return the
largest register class all of whose registers can be used as
intermediate registers or scratch registers.

If copying a register @var{class} in @var{mode} to @var{x} requires an
intermediate or scratch register, you should define
@code{SECONDARY_OUTPUT_RELOAD_CLASS} to return the largest register
class required.  If the requirements for input and output reloads are
the same, the macro @code{SECONDARY_RELOAD_CLASS} should be used instead
of defining both macros identically.

The values returned by these macros are often @code{GENERAL_REGS}.
Return @code{NO_REGS} if no spare register is needed; i.e., if @var{x}
can be directly copied to or from a register of @var{class} in
@var{mode} without requiring a scratch register.  Do not define this
macro if it would always return @code{NO_REGS}.

If a scratch register is required (either with or without an
intermediate register), you should define patterns for
@samp{reload_in@var{m}} or @samp{reload_out@var{m}}, as required
(@pxref{Standard Names}.  These patterns, which will normally be
implemented with a @code{define_expand}, should be similar to the
@samp{mov@var{m}} patterns, except that operand 2 is the scratch
register. 

Define constraints for the reload register and scratch register that
contain a single register class.  If the original reload register (whose
class is @var{class}) can meet the constraint given in the pattern, the
value returned by these macros is used for the class of the scratch
register.  Otherwise, two additional reload registers are required.
Their classes are obtained from the constraints in the insn pattern.

@var{x} might be a pseudo-register or a @code{subreg} of a
pseudo-register, which could either be in a hard register or in memory.
Use @code{true_regnum} to find out; it will return -1 if the pseudo is
in memory and the hard register number if it is in a register.

These macros should not be used in the case where a particular class of
registers can only be copied to memory and not to another class of
registers.  In that case, secondary reload registers are not needed and
would not be helpful.  Instead, a stack location must be used to perform
the copy and the @code{mov@var{m}} pattern should use memory as a
intermediate storage.  This case often occurs between floating-point and
general registers.

@findex SECONDARY_MEMORY_NEEDED
@item SECONDARY_MEMORY_NEEDED (@var{class1}, @var{class2}, @var{m})
Certain machines have the property that some registers cannot be copied
to some other registers without using memory.  Define this macro on
those machines to be a C expression that is non-zero if objects of mode
@var{m} in registers of @var{class1} can only be copied to registers of
class @var{class2} by storing a register of @var{class1} into memory
and loading that memory location into a register of @var{class2}.

Do not define this macro if its value would always be zero. 

@findex SMALL_REGISTER_CLASSES
@item SMALL_REGISTER_CLASSES
Normally the compile