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An initializer that says which registers are used for fixed purposesall throughout the compiled code and are therefore not available forgeneral allocation.  These would include the stack pointer, the framepointer (except on machines where that can be used as a generalregister when no frame pointer is needed), the program counter onmachines where that is considered one of the addressable registers,and any other numbered register with a standard use.This information is expressed as a sequence of numbers, separated bycommas and surrounded by braces.  The @var{n}th number is 1 ifregister @var{n} is fixed, 0 otherwise.The table initialized from this macro, and the table initialized bythe following one, may be overridden at run time either automatically,by the actions of the macro @code{CONDITIONAL_REGISTER_USAGE}, or bythe user with the command options @samp{-ffixed-@var{reg}},@samp{-fcall-used-@var{reg}} and @samp{-fcall-saved-@var{reg}}.@findex CALL_USED_REGISTERS@item CALL_USED_REGISTERS@cindex call-used register@cindex call-clobbered register@cindex call-saved registerLike @code{FIXED_REGISTERS} but has 1 for each register that isclobbered (in general) by function calls as well as for fixedregisters.  This macro therefore identifies the registers that are notavailable for general allocation of values that must live acrossfunction calls.If a register has 0 in @code{CALL_USED_REGISTERS}, the compilerautomatically saves it on function entry and restores it on functionexit, if the register is used within the function.@findex CONDITIONAL_REGISTER_USAGE@findex fixed_regs@findex call_used_regs@item CONDITIONAL_REGISTER_USAGEZero or more C statements that may conditionally modify two variables@code{fixed_regs} and @code{call_used_regs} (both of type @code{char[]}) after they have been initialized from the two preceding macros.This is necessary in case the fixed or call-clobbered registers dependon target flags.You need not define this macro if it has no work to do.@cindex disabling certain registers@cindex controlling register usage If the usage of an entire class of registers depends on the targetflags, you may indicate this to GCC by using this macro to modify@code{fixed_regs} and @code{call_used_regs} to 1 for each of theregisters in the classes which should not be used by GCC.  Also definethe macro @code{REG_CLASS_FROM_LETTER} to return @code{NO_REGS} if itis called with a letter for a class that shouldn't be used.(However, if this class is not included in @code{GENERAL_REGS} and allof the insn patterns whose constraints permit this class arecontrolled by target switches, then GCC will automatically avoid usingthese registers when the target switches are opposed to them.)@findex NON_SAVING_SETJMP@item NON_SAVING_SETJMPIf this macro is defined and has a nonzero value, it means that@code{setjmp} and related functions fail to save the registers, or that@code{longjmp} fails to restore them.  To compensate, the compileravoids putting variables in registers in functions that use@code{setjmp}.@ignore@findex PC_REGNUM@item PC_REGNUMIf the program counter has a register number, define this as thatregister number.  Otherwise, do not define it.@end ignore@end table@node Allocation Order@subsection Order of Allocation of Registers@cindex order of register allocation@cindex register allocation order@table @code@findex REG_ALLOC_ORDER@item REG_ALLOC_ORDERIf defined, an initializer for a vector of integers, containing thenumbers of hard registers in the order in which GNU CC should preferto use them (from most preferred to least).If this macro is not defined, registers are used lowest numbered first(all else being equal).One use of this macro is on machines where the highest numberedregisters must always be saved and the save-multiple-registersinstruction supports only sequences of consecutive registers.  On suchmachines, define @code{REG_ALLOC_ORDER} to be an initializer that liststhe highest numbered allocatable register first.@findex ORDER_REGS_FOR_LOCAL_ALLOC@item ORDER_REGS_FOR_LOCAL_ALLOCA C statement (sans semicolon) to choose the order in which to allocatehard registers for pseudo-registers local to a basic block.Store the desired order of registers in the array@code{reg_alloc_order}.  Element 0 should be the register to allocatefirst; element 1, the next register; and so on.The macro body should not assume anything about the contents of@code{reg_alloc_order} before execution of the macro.On most machines, it is not necessary to define this macro.@end table@node Values in Registers@subsection How Values Fit in RegistersThis section discusses the macros that describe which kinds of values(specifically, which machine modes) each register can hold, and how manyconsecutive registers are needed for a given mode.@table @code@findex HARD_REGNO_NREGS@item HARD_REGNO_NREGS (@var{regno}, @var{mode})A C expression for the number of consecutive hard registers, startingat register number @var{regno}, required to hold a value of mode@var{mode}.On a machine where all registers are exactly one word, a suitabledefinition of this macro is@example#define HARD_REGNO_NREGS(REGNO, MODE)            \   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1)  \    / UNITS_PER_WORD))@end example@findex HARD_REGNO_MODE_OK@item HARD_REGNO_MODE_OK (@var{regno}, @var{mode})A C expression that is nonzero if it is permissible to store a valueof mode @var{mode} in hard register number @var{regno} (or in severalregisters starting with that one).  For a machine where all registersare equivalent, a suitable definition is@example#define HARD_REGNO_MODE_OK(REGNO, MODE) 1@end exampleIt is not necessary for this macro to check for the numbers of fixedregisters, because the allocation mechanism considers them to be alwaysoccupied.@cindex register pairsOn some machines, double-precision values must be kept in even/oddregister pairs.  The way to implement that is to define this macroto reject odd register numbers for such modes.@ignore@c I think this is not true nowGNU CC assumes that it can always move values between registers and(suitably addressed) memory locations.  If it is impossible to move avalue of a certain mode between memory and certain registers, then@code{HARD_REGNO_MODE_OK} must not allow this mode in those registers.@end ignoreThe minimum requirement for a mode to be OK in a register is that the@samp{mov@var{mode}} instruction pattern support moves between theregister and any other hard register for which the mode is OK; and thatmoving a value into the register and back out not alter it.Since the same instruction used to move @code{SImode} will work for allnarrower integer modes, it is not necessary on any machine for@code{HARD_REGNO_MODE_OK} to distinguish between these modes, providedyou define patterns @samp{movhi}, etc., to take advantage of this.  Thisis useful because of the interaction between @code{HARD_REGNO_MODE_OK}and @code{MODES_TIEABLE_P}; it is very desirable for all integer modesto be tieable.Many machines have special registers for floating point arithmetic.Often people assume that floating point machine modes are allowed onlyin floating point registers.  This is not true.  Any registers thatcan hold integers can safely @emph{hold} a floating point machinemode, whether or not floating arithmetic can be done on it in thoseregisters.  Integer move instructions can be used to move the values.On some machines, though, the converse is true: fixed-point machinemodes may not go in floating registers.  This is true if the floatingregisters normalize any value stored in them, because storing anon-floating value there would garble it.  In this case,@code{HARD_REGNO_MODE_OK} should reject fixed-point machine modes infloating registers.  But if the floating registers do not automaticallynormalize, if you can store any bit pattern in one and retrieve itunchanged without a trap, then any machine mode may go in a floatingregister, so you can define this macro to say so.On some machines, such as the Sparc and the Mips, we get better codeby defining @code{HARD_REGNO_MODE_OK} to forbid integers in floatingregisters, even though the hardware is capable of handling them.  Thisis because transferring values between floating registers and generalregisters is so slow that it is better to keep the integer in memory.The primary significance of special floating registers is rather thatthey are the registers acceptable in floating point arithmeticinstructions.  However, this is of no concern to@code{HARD_REGNO_MODE_OK}.  You handle it by writing the properconstraints for those instructions.On some machines, the floating registers are especially slow to access,so that it is better to store a value in a stack frame than in such aregister if floating point arithmetic is not being done.  As long as thefloating registers are not in class @code{GENERAL_REGS}, they will notbe used unless some pattern's constraint asks for one.@findex MODES_TIEABLE_P@item MODES_TIEABLE_P (@var{mode1}, @var{mode2})A C expression that is nonzero if it is desirable to choose registerallocation so as to avoid move instructions between a value of mode@var{mode1} and a value of mode @var{mode2}.If @code{HARD_REGNO_MODE_OK (@var{r}, @var{mode1})} and@code{HARD_REGNO_MODE_OK (@var{r}, @var{mode2})} are ever differentfor any @var{r}, then @code{MODES_TIEABLE_P (@var{mode1},@var{mode2})} must be zero.@end table@node Leaf Functions@subsection Handling Leaf Functions@cindex leaf functions@cindex functions, leafOn some machines, a leaf function (i.e., one which makes no calls) can runmore efficiently if it does not make its own register window.  Often thismeans it is required to receive its arguments in the registers where theyare passed by the caller, instead of the registers where they wouldnormally arrive.The special treatment for leaf functions generally applies only whenother conditions are met; for example, often they may use only thoseregisters for its own variables and temporaries.  We use the term ``leaffunction'' to mean a function that is suitable for this specialhandling, so that functions with no calls are not necessarily ``leaffunctions''.GNU CC assigns register numbers before it knows whether the function issuitable for leaf function treatment.  So it needs to renumber theregisters in order to output a leaf function.  The following macrosaccomplish this.@table @code@findex LEAF_REGISTERS@item LEAF_REGISTERSA C initializer for a vector, indexed by hard register number, whichcontains 1 for a register that is allowable in a candidate for leaffunction treatment.If leaf function treatment involves renumbering the registers, then theregisters marked here should be the ones before renumbering---those thatGNU CC would ordinarily allocate.  The registers which will actually beused in the assembler code, after renumbering, should not be marked with 1in this vector.Define this macro only if the target machine offers a way to optimizethe treatment of leaf functions.@findex LEAF_REG_REMAP@item LEAF_REG_REMAP (@var{regno})A C expression whose value is the register number to which @var{regno}should be renumbered, when a function is treated as a leaf function.If @var{regno} is a register number which should not appear in a leaffunction before renumbering, then the expression should yield -1, whichwill cause the compiler to abort.Define this macro only if the target machine offers a way to optimize thetreatment of leaf functions, and registers need to be renumbered to dothis.@findex REG_LEAF_ALLOC_ORDER@item REG_LEAF_ALLOC_ORDERIf defined, an initializer for a vector of integers, containing thenumbers of hard registers in the order in which the GNU CC should preferto use them (from most preferred to least) in a leaf function.  If thismacro is not defined, REG_ALLOC_ORDER is used for both non-leaf andleaf-functions.@end table@findex leaf_functionNormally, it is necessary for @code{FUNCTION_PROLOGUE} and@code{FUNCTION_EPILOGUE} to treat leaf functions specially.  It can testthe C variable @code{leaf_function} which is nonzero for leaf functions.(The variable @code{leaf_function} is defined only if@code{LEAF_REGISTERS} is defined.)@node Stack Registers@subsection Registers That Form a StackThere are special features to handle computers where some of the``registers'' form a stack, as in the 80387 coprocessor for the 80386.Stack registers are normally written by pushing onto the stack, and arenumbered relative to the top of the stack.Currently, GNU CC can only handle one group of stack-like registers, andthey must be consecutively numbered.@table @code@findex STACK_REGS@item STACK_REGSDefine this if the machine has any stack-like registers.@findex FIRST_STACK_REG@item FIRST_STACK_REGThe number of the first stack-like register.  This one is the topof the stack.@findex LAST_STACK_REG@item LAST_STACK_REGThe number of the last stack-like register.  This one is the bottom ofthe stack.@end table@node Obsolete Register Macros@subsection Obsolete Macros for Controlling Register UsageThese features do not work very well.  They exist because they used tobe required to generate correct code for the 80387 coprocessor of the80386.  They are no longer used by that machine description and may beremoved in a later version of the compiler.  Don't use them!@table @code

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