vdreg.h

早期freebsd实现

/*
 * Copyright (c) 1988 Regents of the University of California.
 * All rights reserved.
 *
 * This code is derived from software contributed to Berkeley by
 * Computer Consoles Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *	This product includes software developed by the University of
 *	California, Berkeley and its contributors.
 * 4. Neither the name of the University nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 *	@(#)vdreg.h	7.7 (Berkeley) 6/28/90
 */

/*
 * Versabus VDDC/SMDE disk controller definitions.
 */
#define	VDDC_SECSIZE	512	/* sector size for VDDC */
#define	VD_MAXSECSIZE	1024	/* max sector size for SMD/E */

/*
 * Controller communications block.
 */
struct vddevice {
	u_long	vdcdr;		/* controller device register */
	u_long	vdreset;	/* controller reset register */
	u_long	vdcsr;		/* control-status register */
	long	vdrstclr;	/* reset clear register */
	u_short	vdstatus[16];	/* per-drive status register */
	u_short	vdicf_status;	/* status change interupt control format */
	u_short	vdicf_done;	/* interrupt complete control format */
	u_short	vdicf_error;	/* interrupt error control format */
	u_short	vdicf_success;	/* interrupt success control format */
	u_short	vdtcf_mdcb;	/* mdcb transfer control format */
	u_short	vdtcf_dcb;	/* dcb transfer control format */
	u_short	vdtcf_trail;	/* trail transfer control format */
	u_short	vdtcf_data;	/* data transfer control format */
	u_long	vdccf;		/* controller configuration flags */
	u_long	vdsecsize;	/* sector size */
	u_short	vdfill0;
	u_char	vdcylskew;	/* cylinder to cylinder skew factor */
	u_char	vdtrackskew;	/* track to track skew factor */
	u_long	vdfill1;
	u_long	vddfr;		/* diagnostic flag register */
	u_long	vddda;		/* diagnostic dump address */
};

/* controller types */
#define	VDTYPE_VDDC	1	/* old vddc controller (smd only) */
#define	VDTYPE_SMDE	2	/* new smde controller (smd-e) */

/*
 * Controller status definitions.
 */
#define	CS_SCS	0xf		/* status change source (drive number) */
#define	CS_ELC	0x10		/* error on last command */
#define	CS_ICC	0x60		/* interupt cause code */
#define   ICC_NOI  0x00		/* no interupt */
#define   ICC_DUN  0x20		/* no interupt */
#define   ICC_ERR  0x40		/* no interupt */
#define   ICC_SUC  0x60		/* no interupt */
#define	CS_GO	0x80		/* go bit (controller busy) */
#define	CS_BE	0x100		/* buss error */
#define	CS_BOK	0x4000		/* board ok */
#define	CS_SFL	0x8000		/* system fail */
#define	CS_LEC	0xff000000	/* last error code */

/*
 * Drive status definitions.
 */
#define	STA_UR	0x1		/* unit ready */
#define	STA_OC	0x2		/* on cylinder */
#define	STA_SE	0x4		/* seek error */
#define	STA_DF	0x8		/* drive fault */
#define	STA_WP	0x10		/* write protected */
#define	STA_US	0x20		/* unit selected */
#define	STA_TYPE	0x300	/* drive type: */
#define	STA_SMD		0x000		/* SMD */
#define	STA_ESDI	0x100		/* ESDI */

/*
 * Interupt Control Field definitions.
 */
#define	ICF_IPL	0x7		/* interupt priority level */
#define	ICF_IEN	0x8		/* interupt enable */
#define	ICF_IV	0xff00		/* interupt vector */

/*
 * Transfer Control Format definitions.
 */
#define	TCF_AM	0xff		/* Address Modifier */
#define	  AM_SNPDA   0x01	/* Standard Non-Privileged Data Access */
#define	  AM_SASA    0x81	/* Standard Ascending Sequential Access */
#define	  AM_ENPDA   0xf1	/* Extended Non-Privileged Data Access */
#define	  AM_EASA    0xe1	/* Extended Ascending Sequential Access */
#define	TCF_BTE	0x800		/* Block Transfer Enable */

/*
 * Controller Configuration Flags.
 */
#define	CCF_STS	0x1		/* sectors per track selectable */
#define	CCF_EAV	0x2		/* enable auto vector */
#define	CCF_ERR	0x4		/* enable reset register */
#define CCF_RFE 0x8		/* recovery flag enable */
#define	CCF_XMD	0x60		/* xmd transfer mode (bus size) */
#define	  XMD_8BIT  0x20	/*   do only 8 bit transfers */
#define	  XMD_16BIT 0x40	/*   do only 16 bit transfers */
#define	  XMD_32BIT 0x60	/*   do only 32 bit transfers */
#define	CCF_DIU	0x80		/* disable initial update of DCB @cmd start */
#define	CCF_BSZ	0x300		/* burst size */
#define	  BSZ_16WRD 0x000	/*   16 word transfer burst */
#define	  BSZ_12WRD 0x100	/*   12 word transfer burst */
#define	  BSZ_8WRD  0x200	/*   8 word transfer burst */
#define	  BSZ_4WRD  0x300	/*   4 word transfer burst */
#define CCF_SEN	0x400		/* cylinder/track skew enable (for format) */
#define	CCF_ENP	0x1000		/* enable parity */
#define	CCF_EPE	0x2000		/* enable parity errors */
#define	CCF_EDE	0x10000		/* error detection enable */
#define	CCF_ECE	0x20000		/* error correction enable */

/*
 * Diagnostic register definitions.
 */
#define	DIA_DC	0x7f		/* dump count mask */
#define	DIA_DWR	0x80		/* dump write/read flag */
#define	DIA_ARE	0x100		/* auto rebuild enable */
#define	DIA_CEN	0x200		/* call enable flag */
#define	DIA_KEY	0xAA550000	/* reset enable key */

/*
 * Hardware interface flags, in dcb.devselect and d_devflags
 */
#define VD_ESDI	0x10		/* drive is on ESDI interface */
#define	d_devflags	d_drivedata[0]		/* in disk label */

/*
 * Error recovery flags.
 */
#define	VDRF_RTZ	0x0001	/* return to zero */
#define	VDRF_OCF	0x0002	/* on cylinder false */
#define	VDRF_OSP	0x0004	/* offset plus */
#define	VDRF_OSM	0x0008	/* offset minus */
#define	VDRF_DSE	0x0080	/* data strobe early */
#define	VDRF_DSL	0x0100	/* data strobe late */

#define	VDRF_NONE	0
#define	VDRF_NORMAL	(VDRF_RTZ|VDRF_OCF|VDRF_OSP|VDRF_OSM|VDRF_DSE|VDRF_DSL)

/*
 * Perform a reset on the controller.
 */
#define	VDRESET(a,t) { \
	if ((t) == VDTYPE_SMDE) { \
		((struct vddevice *)(a))->vddfr = DIA_KEY|DIA_CEN; \
		((struct vddevice *)(a))->vdcdr = (u_long)0xffffffff; \
		DELAY(5000000); \
	} else { \
		((struct vddevice *)(a))->vdreset = 0; \
		DELAY(1500000); \
	} \
}

/*
 * Abort a controller operation.
 */
#define	VDABORT(a,t) { \
	if ((t) == VDTYPE_VDDC) { \
		movow((a), (VDOP_ABORT&0xffff0000)>>16) ; \
		movow((int)(a)+2, VDOP_ABORT&0xffff); \
	} else \
		((struct vddevice *)(a))->vdcdr = (u_long)VDOP_ABORT; \
	DELAY(1000000); \
}

/*
 * Start a command.
 */
#define VDGO(a,mdcb,t) {\
	if ((t) == VDTYPE_VDDC) { \
		movow((a), ((int)(mdcb)&0xffff0000)>>16) ; \
		movow((int)((a))+2, (int)(mdcb)&0xffff); \
	} else \
		((struct vddevice *)(a))->vdcdr = (mdcb); \
}

/*
 * MDCB layout.
 */
struct mdcb {
	struct	dcb *mdcb_head;		/* first dcb in list */
	struct	dcb *mdcb_busy;		/* dcb being processed */
	struct	dcb *mdcb_intr;		/* dcb causing interrupt */
	long	mdcb_status;		/* status of dcb in mdcb_busy */
};

/*
 * DCB definitions.
 */

/*
 * A disk address.
 */
typedef struct {
	u_char	track;			/* all 8 bits */
	u_char	sector;			/* all 8  bits */
	u_short	cylinder;		/* low order 12 bits */