📄 io870.h
字号:
/****************************************************************
* TLCS-870 C Compiler Header File *
*--------------------------------------------------------------*
* [For] {TMP87C447/847/H47/847L/H47L} *
* [File name] {IO870.H} *
* *
* Copyright 2003 Freeway electronics Limited, *
****************************************************************/
#ifdef IO_MEM
#define EXTERN
#else
#define EXTERN extern
#endif
/*** I/O type ***/
typedef struct byte_format {
unsigned char bit7:1;
unsigned char bit6:1;
unsigned char bit5:1;
unsigned char bit4:1;
unsigned char bit3:1;
unsigned char bit2:1;
unsigned char bit1:1;
unsigned char bit0:1;
} byte_field;
typedef union io_format {
unsigned char io_byte;
byte_field io_bit;
} io_field;
typedef union word_io {
unsigned int io_w;
unsigned char io_b[2];
} word_io;
/* [Subject] {Special Function Registers} */
/***[0x00]***/
EXTERN io_field __io(0x00) IOP0; /* Port0 8 bit */
#define P0 IOP0.io_byte
#define P00 IOP0.io_bit.bit0
#define P01 IOP0.io_bit.bit1
#define P02 IOP0.io_bit.bit2
#define P03 IOP0.io_bit.bit3
#define P04 IOP0.io_bit.bit4
#define P05 IOP0.io_bit.bit5
#define P06 IOP0.io_bit.bit6
#define P07 IOP0.io_bit.bit7
EXTERN io_field __io(0x01) IOP1; /* Port1 8 bit */
#define P1 IOP1.io_byte
#define P10 IOP1.io_bit.bit0
#define P11 IOP1.io_bit.bit1
#define P12 IOP1.io_bit.bit2
#define P13 IOP1.io_bit.bit3
#define P14 IOP1.io_bit.bit4
#define P15 IOP1.io_bit.bit5
#define P16 IOP1.io_bit.bit6
#define P17 IOP1.io_bit.bit7
EXTERN io_field __io(0x02) IOP2; /* Port2 3 bit */
#define P2 IOP2.io_byte
#define P20 IOP2.io_bit.bit0
#define P21 IOP2.io_bit.bit1
#define P22 IOP2.io_bit.bit2
EXTERN io_field __io(0x05) IOP5; /* Port5 2 bit */
#define P5 IOP5.io_byte
#define P50 IOP5.io_bit.bit0
#define P51 IOP5.io_bit.bit1
EXTERN io_field __io(0x06) IOP6; /* Port6 8 bit */
#define P6 IOP6.io_byte
#define P60 IOP6.io_bit.bit0
#define P61 IOP6.io_bit.bit1
#define P62 IOP6.io_bit.bit2
#define P63 IOP6.io_bit.bit3
#define P64 IOP6.io_bit.bit4
#define P65 IOP6.io_bit.bit5
#define P66 IOP6.io_bit.bit6
#define P67 IOP6.io_bit.bit7
EXTERN io_field __io(0x07) IOP7; /* Port7 8 bit */
#define P7 IOP7.io_byte
#define P70 IOP7.io_bit.bit0
#define P71 IOP7.io_bit.bit1
#define P72 IOP7.io_bit.bit2
#define P73 IOP7.io_bit.bit3
#define P74 IOP7.io_bit.bit4
#define P75 IOP7.io_bit.bit5
#define P76 IOP7.io_bit.bit6
#define P77 IOP7.io_bit.bit7
EXTERN unsigned char __io(0x0a) P0CR; /* Port0 control register */
EXTERN unsigned char __io(0x0b) P1CR; /* Port1 control register */
EXTERN unsigned char __io(0x0c) P6CR; /* Port6 control register */
EXTERN unsigned char __io(0x0d) P7CR1; /* Port7 control register */
EXTERN unsigned char __io(0x0e) ADCCR; /* A/D control register */
EXTERN unsigned char __io(0x0f) ADCDR; /* A/D result register */
/***[0x10]***/
EXTERN word_io __io(0x10) _treg1a_; /* 16bit timer register 1A */
#define TREG1A _treg1a_.io_w /* timer register 1 */
#define TREG1AL _treg1a_.io_b[0] /* 0x10: timer register 1A[low] */
#define TREG1AH _treg1a_.io_b[1] /* 0x11: timer register 1A[high] */
EXTERN word_io __io(0x12) _treg1b_; /* 16bit timer register 1B */
#define TREG1B _treg1b_.io_w
#define TREG1BL _treg1b_.io_b[0] /* 0x12: timer register 1B[low] */
#define TREG1BH _treg1b_.io_b[1] /* 0x13: timer register 1B[high] */
EXTERN unsigned char __io(0x14) TC1CR; /* TC1 control register */
EXTERN unsigned char __io(0x15) TC2CR; /* TC2 control register */
EXTERN word_io __io(0x16) _treg2_; /* 16bit timer register 2 */
#define TREG2 _treg2_.io_w /* 0x16: timer register 2 */
#define TREG2L _treg2_.io_b[0] /* 0x16: timer register 2[low] */
#define TREG2H _treg2_.io_b[1] /* 0x17: timer register 2[high] */
EXTERN unsigned char __io(0x18) TREG3A; /* 8bit timer register 3A */
EXTERN unsigned char __io(0x19) TREG3B; /* 8bit timer register 3B */
EXTERN unsigned char __io(0x1a) TC3CR; /* TC3 control register */
/*---reserved------(0x0b)---*/
/*---reserved------(0x0c)---*/
EXTERN unsigned char __io(0x1d) TREG5; /* 8bit timer register 4 */
EXTERN unsigned char __io(0x1e) TC5CR; /* TC5 control register */
/*---reserved------(0x0f)---*/
/***[0x20]***/
EXTERN unsigned char __io(0x20) SIOCR1; /* SIO1 control register */
#define SIOSR SIOCR1 /* 0x20: SIO1 status register */
EXTERN unsigned char __io(0x21) SIOCR2; /* SIO2 control register */
/*---reserved------(0x22)---*/
/*---reserved------(0x23)---*/
EXTERN unsigned char __io(0x24) HSOCR; /* HSO control register */
#define HSOSR HSOCR /* 0x24: HSO status register */
EXTERN unsigned char __io(0x27) P7CR2; /* HSO control register */
/***[0x30]***/
EXTERN unsigned char __io(0x34) WDTCR1; /* WDT control register 1 */
EXTERN unsigned char __io(0x35) WDTCR2; /* WDT control register 2 */
EXTERN unsigned char __io(0x36) TBTCR;
EXTERN unsigned char __io(0x37) EINTCR; /* EXTERNal interrupt control register */
EXTERN unsigned char __io(0x38) SYSCR1; /* system control register 1 */
EXTERN unsigned char __io(0x39) SYSCR2; /* system control register 2 */
EXTERN word_io __io(0x3a) _eir_; /* interrupt enable register */
#define EIR _eir_.io_w /* 0x3a: interrupt enable register */
#define EIRL _eir_.io_b[0] /* 0x3a: interrupt enable register[low] */
#define EIRH _eir_.io_b[1] /* 0x3b: interrupt enable register[high] */
EXTERN word_io __io(0x3c) _il_; /* interrupt latch */
#define IL _il_.io_w /* 0x3c: interrupt latch */
#define ILL _il_.io_b[0] /* 0x3c: interrupt latch[low] */
#define ILH _il_.io_b[1] /* 0x3d: interrupt latch[high] */
/*---reserved------(0x3e)---*/
EXTERN unsigned char __io(0x3f) GPSW; /* program status word */
#define GRBS GPSW /* 0x3f: register bank selector */
/***************************** * I/O port mask pattern * *****************************//************************ * P0 (Port-0) * * P1 (Port-1) * * P2 (Port-2) * * P3 (Port-3) * * P4 (Port-4) * * P5 (Port-5) * * P6 (Port-6) * * P7 (Port-7) * ************************/#define PORTBIT7 0x80 /* Port Bit7 */#define PORTBIT6 0x40 /* Port Bit6 */#define PORTBIT5 0x20 /* Port Bit5 */#define PORTBIT4 0x10 /* Port Bit4 */#define PORTBIT3 0x08 /* Port Bit3 */#define PORTBIT2 0x04 /* Port Bit2 */#define PORTBIT1 0x02 /* Port Bit1 */#define PORTBIT0 0x01 /* Port Bit0 *//***************************************** * I/O Control Register mask pattern * *****************************************//**************************** * P0CR (Port0 control) P1CR (Port1 control) P6CR (Port6 control) P7CR1,p (Port7 control) *
* P2: initial "*****111", input mode or secondary function,
* P5: only output ****************************/#define WONLY7 0x80 /* Write only. Port Bit7 control; 0:IN 1:OUT */#define WONLY6 0x40 /* Write only. Port Bit6 control; 0:IN 1:OUT */#define WONLY5 0x20 /* Write only. Port Bit5 control; 0:IN 1:OUT */#define WONLY4 0x10 /* Write only. Port Bit4 control; 0:IN 1:OUT */#define WONLY3 0x08 /* Write only. Port Bit3 control; 0:IN 1:OUT */#define WONLY2 0x04 /* Write only. Port Bit2 control; 0:IN 1:OUT */#define WONLY1 0x02 /* Write only. Port Bit1 control; 0:IN 1:OUT */#define WONLY0 0x01 /* Write only. Port Bit0 control; 0:IN 1:OUT */
/************************************************
* ADCCR (A/D converter control register) *
************************************************/
/* end of A/D conversion flag */
#define EOCF 0x80 /* EOCF=0: under conversion or
before conversion */
/* EOCF=1: end of conversion */
/* A/D conversion start */
#define ADS 0x40 /* ADS=0: ----- */
/* ADS=1: A/D conversion start */
/* conversion time control */
#define ACK 0x20 /* ACK=0: 23us */
/* ACK=1: 92us */
/* analog input control */
#define AINDS 0x10 /* AINDS=0: enable */
/* AINDS=1: disable */
/* analog input selection */
#define SAIN 0x0f
#define SAIN0 0x00 /* SAIN=0000: AIN0 */
#define SAIN1 0x01 /* SAIN=0001: AIN1 */
#define SAIN2 0x02 /* SAIN=0010: AIN2 */
#define SAIN3 0x03 /* SAIN=0011: AIN3 */
#define SAIN4 0x04 /* SAIN=0100: AIN4 */
#define SAIN5 0x05 /* SAIN=0101: AIN5 */
#define SAIN6 0x06 /* SAIN=0110: AIN6 */
#define SAIN7 0x07 /* SAIN=0111: AIN7 */
#define SAIN8 0x08 /* SAIN=1000: reserved */
/********************************************************
* TC1CR (timer/counter 1 control register) *
********************************************************/
/* TC1 mode select */
#define TC1M 0x03
#define TC1M00 0x00 /* TC1M=00: timer/EXTERNal trigger timer/event counter
mode */
#define TC1M01 0x01 /* TC1M=01: window mode */
#define TC1M10 0x02 /* TC1M=10: pulse width measurement mode */
#define TC1M11 0x03 /* TC1M=11: PPG output mode */
/* TC1 source clock select */
#define TC1CK 0x0c
#define TC1CK00 0x00 /* TC1CK=00: internal clock fc/2^11 or fc/2^2 */
#define TC1CK01 0x04 /* TC1CK=01: internal clock fc/2^7 */
#define TC1CK10 0x08 /* TC1CK=10: internal clock fc/2^3 */
#define TC1CK11 0x0c /* TC1CK=11: EXTERNal clock (TC1 pin input) */
/* TC1 start control */
#define TC1S 0x30
#define TC1S00 0x00 /* TC1S=00: stop & counter clear */
#define TC1S01 0x10 /* TC1S=01: command start */
#define TC1S10 0x20 /* TC1S=10: reserved */
#define TC1S11 0x30 /* TC1S=11: EXTERNal trigger start */
/* software capture control */
#define SCAP1 0x40 /* SCAP1=0: ----- */
/* SCAP1=1: software capture trigger */
/* pulse width measurement control */
#define MCAP1 0x40 /* MCAP1=0: double edge capture */
/* MCAP1=1: single edge capture */
/* EXTERNal trigger timer control */
#define METT1 0x40 /* METT1=0: trigger start */
/* METT1=1: trigger start & stop */
/* PPG output control */
#define MPPG1 0x40 /* MPPG1=0: continuous pulse */
/* MPPG1=1: single pulse */
/* timer F/F1 control for PPG output mode */
#define TFF1 0x80 /* TFF1=0: clear */
/* TFF1=1: set */
/********************************************************
* TC2CR (timer/counter 2 control register) *
********************************************************/
/* TC2 operating mode select */
#define TC2M 0x01 /* TC2M=0: timer/event counter mode */
/* TC2M=1: window mode */
/* TC2 source clock select */
#define TC2CK 0x1c
#define TC2CK000 0x00 /* TC2CK=000: internal clock fc/2^23 or
fc/2^15 */
#define TC2CK001 0x04 /* TC2CK=001: internal clock fc/2^13 or
fc/2^5 */
#define TC2CK010 0x08 /* TC2CK=010: internal clock fc/2^8 */
#define TC2CK011 0x0c /* TC2CK=011: internal clock fc/2^3 */
#define TC2CK100 0x10 /* TC2CK=100: internal clock fc */
#define TC2CK101 0x14 /* TC2CK=101: internal clock fs */
#define TC2CK110 0x18 /* TC2CK=110: reseved */
#define TC2CK111 0x1c /* TC2CK=111: EXTERNal clock
(TC2 pin input) */
/* TC2 start control */
#define TC2S 0x20 /* TC2S=0: stop & counter clear */
/* T2CS=1: start */
/********************************************************
* TC3CR (timer/counter 3 control register) *
********************************************************/
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -