ad.c

TIOMAP_L138的AD采样程序

#include<linux/init.h>
#include<linux/module.h>
#include<linux/kernel.h>
#include<linux/delay.h>
#include<linux/proc_fs.h>
#include<hardware.h>
#include<linux/cdev.h>
#include<linux/mm.h>
#include<linux/sched.h>
#include<linux/types.h>
#include<linux/fs.h>
#include<linux/errno.h>
#include<asm/io.h>
#include<asm/system.h>
#include<asm/uaccess.h>
#include<Ad_c.h>
#include<AD_H.h>

#define ad_major 149
static int ad_major=149;

struct ad_dev {
    struct cdev cdev;
    static int16_t AD_BUF;
};

void TEST_ad(void)
{
   uint8_t AD_BUSY;

   printk("--------------------------\r\n");
   printk("omap_l138 AD TEST\r\n\r\n");

   EMIFA_init();
   AD_init();

   printk("\r\nReset AD\r\n");
   printk("------------------\r\n\r\n");

   AD_RESET;                            //复位是干什么//
   USTIMER_delay(DELAY_HALF_SEC);

   DMAconfig();
   
   printk("\r\nRelease AD\r\n\r\n");
   printk("----------------------\r\n\r\n");
   
   AD_RELEASE;
   USTIMER_delay(DELAY_HALF_SEC);

   printk("\r\nExecute Test\r\n");
   printk("-----------------\r\n\r\n");

   }

uint32_t EMIFA_init()
{ 
    // enable the psc and configure pinmux for nor.
   EVMOMAPL138_lpscTransition(PSC0, DOMAIN0, LPSC_EMIFA, PSC_ENABLE);
   EVMOMAPL138_pinmuxConfig(PINMUX_EMIFA_NOR_REG_0, PINMUX_EMIFA_NOR_MASK_0, PINMUX_EMIFA_NOR_VAL_0);
   EVMOMAPL138_pinmuxConfig(PINMUX_EMIFA_NOR_REG_1, PINMUX_EMIFA_NOR_MASK_1, PINMUX_EMIFA_NOR_VAL_1);
   EVMOMAPL138_pinmuxConfig(PINMUX_EMIFA_NOR_REG_2, PINMUX_EMIFA_NOR_MASK_2, PINMUX_EMIFA_NOR_VAL_2);
   EVMOMAPL138_pinmuxConfig(PINMUX_EMIFA_NOR_REG_3, PINMUX_EMIFA_NOR_MASK_3, PINMUX_EMIFA_NOR_VAL_3);
   EVMOMAPL138_pinmuxConfig(PINMUX_EMIFA_NOR_REG_4, PINMUX_EMIFA_NOR_MASK_4, PINMUX_EMIFA_NOR_VAL_4);
   EVMOMAPL138_pinmuxConfig(PINMUX_EMIFA_NOR_REG_5, PINMUX_EMIFA_NOR_MASK_5, PINMUX_EMIFA_NOR_VAL_5);
   EVMOMAPL138_pinmuxConfig(PINMUX_EMIFA_NOR_REG_6, PINMUX_EMIFA_NOR_MASK_6, PINMUX_EMIFA_NOR_VAL_6);
   EVMOMAPL138_pinmuxConfig(PINMUX_EMIFA_NOR_REG_7, PINMUX_EMIFA_NOR_MASK_7, PINMUX_EMIFA_NOR_VAL_7);
   
   // config for 16-bit data bus.
	EMIFA->CE4CFG = (2 << 26) | (4 << 20) | (2 << 17) | (2 << 13) | (2 << 7) | (2 << 4) | 1;
	return ERR_NO_ERROR;
}
 
void AD_init()
{
	EVMOMAPL138_pinmuxConfig(PINMUX_AD_INT_EN_REG, PINMUX_AD_INT_EN_MASK, PINMUX_AD_INT_EN_VAL);
	GPIO_setDir(GPIO_BANK2, GPIO_PIN0, GPIO_INPUT);
	BINTEN &= ~(1 << GPIO_BANK2);	//Disable GP2 Bank Interrupt
	CLR_RIS_TRIG23 |= 1;	//Disable GP2[0] Rising Edge Interrupt
	SET_FAL_TRIG23 |= 1;	//Set GP2[0] Falling Edge Interrupt
	INTSTAT23 |= 1;			//Clear GP2[0] Interrupt State
}

void DMAconfig()
{
	struct EDMA3CC_PaRAM	*pEDMA3CC_PaRAM;

	BINTEN &= ~(1 << GPIO_BANK2);	//Disable GP2 Bank Interrupt
	INTSTAT23 |= 1;			//Clear GP2[0] Interrupt State
	EDMA3_0_EECR = 0xffffffff;
	EDMA3_0_IECR = 0xffffffff;
	EDMA3_0_ICR = 0xffffffff;
	EDMA3_0_SECR = 0xffffffff;
	EDMA3_0_EMCR = 0xffffffff;
	EDMA3_0_ECR = 0xffffffff;

	pEDMA3CC_PaRAM = EDMA3_GPIO2;
	pEDMA3CC_PaRAM -> OPT =0x00100108;  // (1 << 20) | (22 << 12) | (1 << 8) | (1 << 2);
	pEDMA3CC_PaRAM -> SRC = AD_DATA;
	pEDMA3CC_PaRAM -> A_B_CNT = (1<<16) | 1;//(6 << 16) | 2;
	pEDMA3CC_PaRAM -> DST = AD_BUF;
	pEDMA3CC_PaRAM -> SRC_DST_BIDX = 0; //(2 << 16);
	pEDMA3CC_PaRAM -> LINK_BCNTRLD = 0xFFFF;//(6 << 16) | 0xFFFF;
	pEDMA3CC_PaRAM -> SRC_DST_CIDX = 0;
	pEDMA3CC_PaRAM -> CCNT = 1;
	
#if 0
	pEDMA3CC_PaRAM = EDMA3_GPIO2;
	pEDMA3CC_PaRAM -> OPT = (1 << 20) | (22 << 12) | (1 << 8) | (1 << 2);
	pEDMA3CC_PaRAM -> SRC = AD_DATA;
	pEDMA3CC_PaRAM -> A_B_CNT = (6 << 16) | 2;
	pEDMA3CC_PaRAM -> DST = AD_BUF;
	pEDMA3CC_PaRAM -> SRC_DST_BIDX = (2 << 16);
	pEDMA3CC_PaRAM -> LINK_BCNTRLD = (6 << 16) | 0xFFFF;
	pEDMA3CC_PaRAM -> SRC_DST_CIDX = 0;
	pEDMA3CC_PaRAM -> CCNT = 1;

	pEDMA3CC_PaRAM = EDMA3CC_PaRAM127;
	pEDMA3CC_PaRAM -> OPT = (1 << 20) | (2 << 12) | (1 << 8) | (1 << 2);
	pEDMA3CC_PaRAM -> SRC = AD_DATA;
	pEDMA3CC_PaRAM -> A_B_CNT = (6 << 16) | 2;
	pEDMA3CC_PaRAM -> DST = AD_BUF;
	pEDMA3CC_PaRAM -> SRC_DST_BIDX = (2 << 16);
	pEDMA3CC_PaRAM -> LINK_BCNTRLD = (6 << 16) | 0xFFFF;
	pEDMA3CC_PaRAM -> SRC_DST_CIDX = 0;
	pEDMA3CC_PaRAM -> CCNT = 1;
#endif
	
	EDMA3_0_IESR |= (1 << 22);//GP2 Interrput Enable EDMA
	EDMA3_0_EESR |= (1 << 22);
//	CSR	|=	0x1;	//enable intertuput
}
//-----------------------------------------------------------------------------
// Private Function Definitions
//-----------------------------------------------------------------------------


struct ad_dev *ad_devp;

int ad_open(struct inode *inode,struct file *filp)
{
    filp->private_data=ad_devp;
	float CH1_BUF[AD_LENGTH];
	uint16_t i=0;
	while(1)
		{
		  LED=LED+1;

		  AD_EDMA_START;
		  while((EDMA3_0_IPR & (1<<22))==0);
		  DMAconfig();
		  CH1_BUF[i]=(float)ad_devp->AD_BUF * 10.0 / 32767.0;

		  printk("ad_devp->AD_BUF is %f\n",CH1_BUF[i]);

		   if(++i == AD_LENGTH)
		   	i=0;

		   USTIMER_delay(DELAY_10TH_SEC);
		   
		
	return 0;
}

int ad_release(struct inode *inode,struct file *filp)
{
   return 0;
}

static int ad_ioctl(struct inode *inode,struct file *filp,unsigned int cmd,unsigned long arg)
{
   return 0;
}

static ssize_t ad_read(struct file *filp,char __user *buf,size_t size,loff_t *ppos)
{
   unsigned long p=*ppos;
   unsigned int count=size;
   int ret=0;
   return ret;
}

static ssize_t ad_write(struct file*filp,const char __user *buf,size_t size,loff_t *ppos)
{
   unsigned long p=*ppos;
   unsigned int count=size;
   int ret=0;
   struct ad_dev *dev=filp->private_data;
   return ret;
}

static lofft_t ad_LLSEEK(struct file *filp,loff_t offset;int orig)
{
   lofft_t ret=0;
   return 0;
}

static const struct file_operations ad_fops={
	.owner=THIS_MODULE,
	.open=ad_open,
	.read=ad_read,
	.write=ad_write,
	.ioctl=ad_ioctl,
	.open=ad_open,
	.release=ad_release,
};

static void ad_setup_cdev(struct ad_dev *dev,int index)
{
    int err,devno=MKDEV(ad_major,index);

	cdev_init(&dev->cdev,&ad_fops);
	dev->cdev.owner=THIS_MODULE;
	err=cdev_add(&dev->cdev,devno,1);
	if(err)
		printk(KERN_NOTICE"Error %d adding ad %d",err,index);
}

int ad_init(void)
{
  int result;
  dev_t devno=MKDEV(ad_major,0);

  if(ad_major)
  	result=register_chrdev_region(devno,1,"ad");
  else{
  	result=alloc_chrdev_region(&devno,0,1,"ad");
    ad_major=MAJOR(devno);
  	}

  ad_devp=kmalloc(sizeof(struct ad_dev),GFP_KERNEL);
  if(!ad_devp){
  	result=-ENOMEM;
	goto fail_malloc;
  	}

  memset(ad_devp,0,sizeof(struct ad_dev));

  ad_setup_cdev(ad_devp,0);
  return 0;

  fail_malloc:
  	unregister_chrdev_region(devno,1);
	return result;
	TEST_ad(void);
}

void ad_exit(void)
{
  cdev_del(&ad_devp->cdev);
  kfree(ad_devp);
  unregiter_chrdev_region(MKDEV(ad_major,0),1);
}

MODULE_AUTHOR("TANHE");
MODEULE_LICENSE("Dual BSD/GPL");

module_param(ad_major,int,S_IRUGO);

module_init(ad_init);
module_exit(ad_exit);