📄 fet410_ta_40k.s43
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#include "msp430x41x.h"
;******************************************************************************
; MSP-FET430P410 Demo - Timer_A Output 40khz square wave, UpMode SMCLK DCO
;
; Description; Generate ~ 40.3khz square wave on P1.2 using Timer_A. Timer_A
; is configured to operate in the up-mode. CCR0 defines the period, CCR1 the
; duty cycle which is 50%. CCR1 is output on P1.2. The 40khz square wave is
; generated in hardware and does not require any CPU resources.
; ACLK = LFXT1 = 32768, MCLK = SMCLK = TACLK = DCO = 32xACLK = 1.048576MHz
; //*An external watch crystal is required on XIN/XOUT for ACLK*//
;
;
; MSP430F413
; -----------------
; /|\| XIN|-
; | | | 32kHz
; --|RST XOUT|-
; | |
; | P1.2|--> ~ 40.3khz
;
; M.Buccini
; Texas Instruments, Inc
; January 2002
;******************************************************************************
;------------------------------------------------------------------------------
ORG 0E000h ; Program Start
;------------------------------------------------------------------------------
RESET mov.w #300h,SP ; Initialize stackpointer
SetupWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop WDT
SetupFLL bis.b #XCAP14PF,&FLL_CTL0 ; Configure load caps
SetupTA mov.w #TASSEL1+TACLR,&TACTL ; SMCLK, Clear TAR
SetupC0 mov.w #26-1,&CCR0 ; PWM Period
SetupC1 mov.w #OUTMOD2+OUTMOD1+OUTMOD0,&CCTL1 ; CCR1 Reset\Set
mov.w #13,&CCR1 ; CCR1 PWM Duty Cycle
SetupP1 bis.b #004h,&P1DIR ; P1.2 output
bis.b #004h,&P1SEL ; P1.2/TA1 port function
bis.w #MC0,&TACTL ; Start TA up Mode
;
Mainloop bis.w #CPUOFF,SR ; CPU not required
nop ; Required only for C-spy
;
;------------------------------------------------------------------------------
; Interrupt Vectors Used MSP430F413
;------------------------------------------------------------------------------
ORG 0FFFEh ; MSP430 RESET Vector
DW RESET ;
END
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