📄 main.asm
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sacl count2
lacc count2
lar ar1,count2
bcnd yjax,neq
b loop
yjax ;
ldp #06h
mar *,AR1
cmpr 00
bcnd loop,ntc
sar ar0,count
splk #01h,yjax_flag ;set yiax flag
ret
;pjsf
; ldp #0e1h
; lacc PBDATDIR
; cmpl
; and #0ffh
; ret
PHANTOM
KICK_DOG
SST #ST0,ST0_save ; save status register ST0
SST #ST1,ST1_save ; save status register ST1
LDP #0 ; set DP
SACH ACCH ;
SACL ACCL
LDP #0
ZALH ACCH ;
ADDS ACCL
LST #ST1,ST1_save ; restore status register ST1
LST #ST0,ST0_save ; restore status register ST0
CLRC INTM ;
RET ; return
;===================================================================
;===================================================================
; Interrupt driven inner loop for PWM
;-------------------------------------------------------------------
gpt1uf
LDP #0H
SST #ST0,ST0_save ; save status register ST0
SST #ST1,ST1_save ; save status register ST1
LDP #0H ; set DP
MAR *,AR0 ; set ARP
SACH ACCH ;
SACL ACCL ; save ACC
Sph P_hi ;
spl P_lo ; save P register
mpy #1 ; P<=T
spl T_save ; save T register
sar AR0,AR0_save ; save AR0
CALL t1uf_isr
rest_cntxt
LDP #0E8H
LACC EVIFRA
SACL EVIFRA
LDP #0H ; set DP
lar AR0, AR0_save ; restore AR0
lt P_lo ; T<=P_lo
mpy #1 ; P (low byte) <=1*P_lo
lph P_hi ; P high byte <=P_hi
lt T_save ; restore T
ZALH ACCH ;
ADDS ACCL ; restore ACC
LDP #0 ; point to B2
LST #ST1,ST1_save ; restore status register ST1
LST #ST0,ST0_save ; restore status register ST0
CLRC INTM
RET ; return
;===================================================================
; SV PWM routine
; The routine refers to the following variables:
; omega - set angular frequency with scale of D10 in unit of rad
; t_sample - sampling period with scale of D-9 in unit of second
; t1_period_ - T1 period, the maximum compare value
;-------------------------------------------------------------------
t1uf_isr
;-------------------------------------------------------------------
; Generate revolving voltage vector Uout=trans(Ud Uq)
;-------------------------------------------------------------------
ldp #omega ; Integrate speed to get phase
LT omega ; set W -> T: D10
MPY t_sample ; D10*D-9=D(1+1)
PAC ; product -> ACC: D2
SFR ; -> D3
ADDH theta_h ; D3+D3=D3 (32 bit)
ADDS theta_l ;
SACH theta_h ; save
SACL theta_l ;
chk_lolim
bcnd chk_uplim,GEQ ; check upper limit if positive
ADDH theta_360 ; D3+D3=D3, rollover if not
SACH theta_h ; save
B rnd_theta ;
chk_uplim
SUBH theta_360 ; D3-D3=D3 compare with 2*pi
bcnd rest_theta,LEQ ; resume theta_h if within limit
SACH theta_h ; rollover if not
B rnd_theta ;
rest_theta
ADDH theta_360 ; resume theta high
rnd_theta
ADD #1,15 ; round up to upper 16 bits
SACH theta_r ;
;-------------------------------------------------------------------
; Quadrant mapping
;-------------------------------------------------------------------
LACC #1 ; assume theta (theta_h) is in quadrant 1
SACL SS ; 1=>SS, sign of SIN(theta)
SACL SC ; 1=>SC, sign of COS(theta)
LACC theta_r ;
SACL theta_m ; theta=>theta_m
SUB theta_90 ;
BLEZ E_Q ; jump to end if 90>=theta
; assume theta (theta_h) is in quadrant 2
splk #-1,SC ; -1=>SC
LACC theta_180 ;
SUB theta_r ; 180-theta
SACL theta_m ; =>theta_m
BGEZ E_Q ; jump to end if 180>=theta
; assume theta (theta_h) is in quadrant 3
splk #-1,SS ; -1=>SS
LACC theta_r ;
SUB theta_180 ; theta-180
SACL theta_m ; =>theta_m
LACC theta_270 ;
SUB theta_r ;
BGEZ E_Q ; jump to end if 270>=theta
; theta (theta_h) is in quadrant 4
splk #1,SC ; 1=>SC
LACC theta_360 ;
SUB theta_r ;
SACL theta_m ; 360-theta_h=>theta_m
E_Q
;-------------------------------------------------------------------
; sin(theta), cos(theta)
;-------------------------------------------------------------------
lt theta_m ; D3. Find index
mpy theta_i ; D3*D6=D(9+1)
pac ; D10
sach sin_indx ; D10
lacc sin_indx,11 ; r/s 5 by l/s 11 -> integer (D15)
sach sin_indx ; right shift 5 bits => D15
lacc sin_entry ; Look up sin
add sin_indx ;
tblr sin_theta ;
lacc sin_end ;
sub sin_indx ;
tblr cos_theta ;
LT SS ; Look up cos
MPY sin_theta ; modify sign: D15*D1=D(16+1)
PAC ;
SACL sin_theta ; left shift 16 bits and save: D1
LT SC ;
MPY cos_theta ; modify sin: D15*D1=D(16+1)
PAC ;
SACL cos_theta ; left shift 16 bits and save: D1
;-------------------------------------------------------------------
; Calcualte Ud & Uq
;-------------------------------------------------------------------
LT set_v ; set v -> T: D1
MPY cos_theta ; set v*cos(theta): D1*D1=D(2+1)
PAC ; product -> ACC: D3
SACH Ud,1 ; d component of ref Uout: D2
MPY sin_theta ; set v*sin(theta): D1*D1=D(2+1)
PAC ; product -> ACC: D3
SACH Uq,1 ; q component of ref Uout: D2
;-------------------------------------------------------------------
; Determine sector
;-------------------------------------------------------------------
lt theta_r ; D3
mpy theta_s ; D3*D0=D4
pac
sach sector ;
lacc sector,5 ; r/s 11 by l/s 5 -> integer (D15)
sach sector ; right shift 11 bits
;-------------------------------------------------------------------
; Calculate T1&T2 based on: Tpwn Uout=V1*T1+V2*T2
;
; i.e. [T1 T2]=Tpwn*inverse[V1 V2]*Uout
; i.e. [0.5*T1 0.5*T2]=Tp*inverse[V1 V2]*Uout
; i.e. [0.5*C1 0.5*C2]=inverse[V1 V2]*Uout=M(sector)*Uout
;
; where C1=T1/Tp, C2=T2/Tp, are normalized wrt Tp
; M(sector)=inverse of [V1 V2] = decomposition matrix
; obtained through table lookup
; Uout=Transpose of [Ud Uq]
; Tp=Timer 1 period = 0.5*Tpwm
; Tpwm=PWM period Tpwm
;-------------------------------------------------------------------
LACC #dec_ms
ADD sector,2 ;
SACL temp ; get the pointer
LAR AR0,temp ; point to parameter table
; Calculate 0.5*C1 based on 0.5*C1=Ud*M(1,1)+Uq*M(1,2)
LT Ud ; D2
MPY *+ ; M(1,1) Ud: D2*D1=D(3+1)
PAC ; D4
LT Uq ; D4
MPY *+ ; M(1,2) Uq: D2*D1=D(3+1)
APAC ; 0.5*C1: D4+D4=D4
BGEZ cmp1_big0 ; continue if bigger than zero
ZAC ; set to 0 if less than 0
cmp1_big0
SACH temp ; 0.5*C1: D4
LT temp ; D4
MPY t1_periods ; D4*D10 = D(14+1)
PAC ; D15
SACH cmp_1 ; 0.5*C1*Tp: D15
; Calculate 0.5*C2 based on 0.5*C2=Ud*M(2,1)+Uq*M(2,2)
LT Ud ; D2
MPY *+ ; M(2,1) Ud: D2*D1=D(3+1)
PAC ; D4
LT Uq ; D2
MPY *+ ; M(2,2) Uq: D2*D1=D(3+1)
APAC ; 0.5*C2: D4+D4=D4
BGEZ cmp2_big0 ; continue if bigger than zero
ZAC ; zero it if less than zero
cmp2_big0
SACH temp ; 0.5*C2: D4
LT temp ; D4
MPY t1_periods ; D4*D10 = D(14+1)
PAC ; D15
SACH cmp_2 ; 0.5*C2*Tp: D15
; Calculate 0.5*C0 based on 0.5*C3*Tp=Tp*(1-0.5*C1-0.5*C2)
LACC #t1_period_ ;
SUB cmp_1 ;
SUB cmp_2 ; D15
BGEZ cmp0_big0 ; continue if bigger than zero
ZAC ; zero it if less than zero
cmp0_big0
SACL cmp_0 ;
LACC cmp_0,15 ; right shift 1b (by l/s 15b)
SACH cmp_0 ; 0.25*C0*Tp
;-------------------------------------------------------------------
; Determine channel toggling sequence and load compare registers
;-------------------------------------------------------------------
LACC #first_ ;
ADD sector ; point to entry in look up table
TBLR first_tog ; get 1st-to-toggle channel
LAR AR0,first_tog ; point to the channel
LACC cmp_0 ;
SACL * ; cmp_0 => the channel
LACC #second_ ;
ADD sector ; point to entry in look up table
TBLR sec_tog ; get 2nd-to-toggle channel
LAR AR0,sec_tog ; point to the channel
LACC cmp_0 ;
ADD cmp_1 ; cmp_0+cmp_1
SACL * ; => the channel
LACC #CMPR3 ;
SUB first_tog ;
ADD #CMPR2 ;
SUB sec_tog ;
ADD #CMPR1 ;
SACL temp ; get 3rd-to-toggle channel
LAR AR0,temp ; point to the channel
LACC cmp_0 ;
ADD cmp_1 ;
ADD cmp_2 ; cmp_0+cmp_1+cmp_2
SACL * ; =>the channel
ldp #PCDATDIR>>7 ; set DP
lacc PCDATDIR ;
or #00008h ; IOPC[3] to 1
sacl PCDATDIR ;
KICK_DOG
RET ; return
.data
;-------------------------------------------------------------------
; Frequently used angles
;-------------------------------------------------------------------
********************************************************************
** The order between these angles and the decomposition **
** matrices in the following must not be changed. **
********************************************************************
angles_
.word 01922h ; pi/2: D3
.word 03244h ; pi: D3
.word 04b66h ; 3*pi/2: D3
.word 06488h ; 2*pi: D3
;-------------------------------------------------------------------
; Decomposition matrices indexed by the sector Uout is in for s/w
; implemented SV PWM scheme
;-------------------------------------------------------------------
.word 20066 ; D1
.word -11585
.word 0
.word 23170
.word -20066
.word 11585
.word 20066
.word 11585
.word 0
.word 23170
.word -20066
.word -11585
.word 0
.word -23170
.word -20066
.word 11585
.word -20066
.word -11585
.word 20066
.word -11585
.word 20066
.word 11585
.word 0
.word -23170
;-------------------------------------------------------------------
; Addresses of compare registers of the 1st-to-toggle channels
; indexed by the sector, ref v is in
;-------------------------------------------------------------------
first_
.word CMPR1 ;
.word CMPR2 ;
.word CMPR2 ;
.word CMPR3 ;
.word CMPR3 ;
.word CMPR1 ;
;-------------------------------------------------------------------
; Addresses of compare registers of the 2nd-to-toggle channels
; indexed by the sector, ref v is in
;-------------------------------------------------------------------
second_
.word CMPR2 ;
.word CMPR1 ;
.word CMPR3 ;
.word CMPR2 ;
.word CMPR1 ;
.word CMPR3 ;
;-----------------------------------------------------------
; sine table for theta from 0 to 90 per every 1 degree
;-----------------------------------------------------------
sin_entry_ ; sin table
.word 0 ; D1
.word 286
.word 572
.word 857
.word 1143
.word 1428
.word 1713
.word 1997
.word 2280
.word 2563
.word 2845
.word 3126
.word 3406
.word 3686
.word 3964
.word 4240
.word 4516
.word 4790
.word 5063
.word 5334
.word 5604
.word 5872
.word 6138
.word 6402
.word 6664
.word 6924
.word 7182
.word 7438
.word 7692
.word 7943
.word 8192
.word 8438
.word 8682
.word 8923
.word 9162
.word 9397
.word 9630
.word 9860
.word 10087
.word 10311
.word 10531
.word 10749
.word 10963
.word 11174
.word 11381
.word 11585
.word 11786
.word 11982
.word 12176
.word 12365
.word 12551
.word 12733
.word 12911
.word 13085
.word 13255
.word 13421
.word 13583
.word 13741
.word 13894
.word 14044
.word 14189
.word 14330
.word 14466
.word 14598
.word 14726
.word 14849
.word 14968
.word 15082
.word 15191
.word 15296
.word 15396
.word 15491
.word 15582
.word 15668
.word 15749
.word 15826
.word 15897
.word 15964
.word 16026
.word 16083
.word 16135
.word 16182
.word 16225
.word 16262
.word 16294
.word 16322
.word 16344
.word 16362
.word 16374
.word 16382
.word 16384
.data
led_table:
.word 00c0h ;"0"
.word 00cfh ;"1"
.word 00a4h ;"2"
.word 00b0h ;"3"
.word 0099h ;"4"
.word 0092h ;"5"
.word 0082h ;"6"
.word 00f8h ;"7"
.word 0080h ;"8"
.word 0090h ;"9"
.word 0088h ;"A"
.word 0083h ;"B"
.word 00c6h ;"C"
.word 00a1h ;"D"
.word 0086h ;"E"
.word 008eh ;"F"
delay_time:
CLRC SXM
LACC #0200H
delay:
KICK_DOG
SUB #01
RPT #80h
nop
BCND delay,NEQ
NOP
NOP
RET
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