📄 main.asm
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;***********************************************************************
; File Name: TMS320x240 SCI Idle–line Mode Example Code
; File Name: TMS320x240 Example Code
; Originator:jzming
; Tianhuang technology dsp development group.
; Description: This program uses the SCI module to implement a simple
; asynchronous communications routine. The SCI is
; initialized to operate in idle–line mode with 8 character
; bits, 1 stop bit, and odd parity. The SCI Baud Rate
; Registers (BRR) are set to transmit and receive data at
; 9600 baud. The SCI generates an interrupt every time a
; character is loaded into the receive buffer (SCIRXBUF).
; reads the receive buffer and determines if the carriage return button, <esc>,
; has been pressed.
;
;***********************************************************************
.include "x24x.h"
;
.bss GPR0,1 ;General purpose register.
;====================================================================================
.global _c_int0
.ref sys_int
;====================================================================================
; C O D E - starts here
;====================================================================================
.text
_c_int0:
;
LDP #00E0h
SPLK #006Fh, WDCR ;disable watchdog w/max. overflow
KICK_DOG ;Reset watchdog counter
;
CALL sys_int ;
;====================================================================================
SPLK #0c0c0h,GPR0
;
CALL SCI_INIT
;
loop:
; read and send back characters untill 'ESC' code
CALL _ci
CALL _co
SUB #1bh ; test if 'ESC' code
BCND loop,NEQ
; received ESC character, dead_loop
;================================================================================= ;beginning and continue.
dead_loop:
OUT GPR0,PORT0
B dead_loop ;dead loop
*******************************************************************************
;==============================================================================
; INITIALIZATION OF INTERRUPT DRIVEN SCI ROUTINE
;==============================================================================
SCI_INIT: ; init SCI
LDP #DP_PF1 ; SCI Registers Data Page
SPLK #0017h, SCICCR ; SCI Comunication Control Register
; SCI Comunication Control Register configuration
; 1 stop bits, no parity, compatible RS-232
; idle-line mode protocol, 8 bits character length
SPLK #0013h, SCICTL1 ; SCI Control Register 1
; SCI Control Register 1 configuration
; disable receive error interrupt,sleep mode and
; transmitter wakeup feature
; enable transmitter, receiver, and internal SCICLK
; SCI software reset
SPLK #0022h, SCIPC2 ; SCI Port Control Register 2
; SCI Port Control Register 2 configuration
; sets shared I/O pins as SCITXD and SCIRXD pins
SPLK #0000h, SCICTL2 ; SCI Control Register 2
; SCI Control Register 2 configuration
; disables interrupts on transmit or receive
;
SPLK #0000h, SCIHBAUD ; SCI Baud Register, high bits
;
SPLK #0081H, SCILBAUD ; SCI Baud Register, low bits
; wake-up SCI from reset
LDP #0E0H
LACL SCICTL1
OR #0020H
SACL SCICTL1
RET
;====================================================================================
; Console Input Routine
_ci:
LDP #0E0H
BIT SCIRXST, 9 ; test RXRDY bit
BCND _ci, NTC ; if RXRDY NEQ 1, loop back on input
LACL SCIRXBUF ; else, load ACCL with character received
AND #00FFh ; mask unsignificant bits in ACC
RET
;------------------------------------------------------------------------------
; Console Output Routine
_co:
LDP #0E0H
BIT SCICTL2, 8 ; test TXRDY bit
BCND _co, NTC ; if TXRDY NEQ 1, loop back on output
SACL SCITXBUF ; else put character to send in SCI transmit buffer
RET
;===========================================================================
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