📄 ad6620.h
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/*! \file ad6620.h \brief Analog Devices AD6620 Digital Receiver Driver. */
//*****************************************************************************
//
// File Name : 'ad6620.h'
// Title : Analog Devices AD6620 Digital Receiver Driver
// Author : Pascal Stang - Copyright (C) 2004
// Created : 2004.07.08
// Revised : 2004.07.12
// Version : 0.1
// Target MCU : ARM processors
// Editor Tabs : 4
//
// NOTE: This code is currently below version 1.0, and therefore is considered
// to be lacking in some functionality or documentation, or may not be fully
// tested. Nonetheless, you can expect most functions to work.
//
// This code is distributed under the GNU Public License
// which can be found at http://www.gnu.org/licenses/gpl.txt
//
//*****************************************************************************
#ifndef AD6620_H
#define AD6620_H
#include "global.h"
// defines
// hardware
/*
#define AD6620_REFCLK_FREQ 24000000l
#define AD6620_IO_UPDATE P04
#define AD6620_RESET P05
*/
// base address
#define AD6620_REG_BASE 0x8800
// external interface registers
#define AD6620_REG_DR0 0x00
#define AD6620_REG_DR1 0x01
#define AD6620_REG_DR2 0x02
#define AD6620_REG_DR3 0x03
#define AD6620_REG_DR4 0x04
#define AD6620_REG_LAR 0x06
#define AD6620_REG_AMR 0x07
// internal registers and RAM
#define AD6620_REG_RCF_COEFF 0x000
#define AD6620_REG_RCF_DATA 0x100
#define AD6620_REG_MODE_CTRL 0x300
#define AD6620_REG_NCO_CTRL 0x301
#define AD6620_REG_NCO_SYNC 0x302
#define AD6620_REG_NCO_FREQ 0x303
#define AD6620_REG_NCO_PHASE 0x304
#define AD6620_REG_CIC2_SCALE 0x305
#define AD6620_REG_CIC2_DECIM 0x306
#define AD6620_REG_CIC5_SCALE 0x307
#define AD6620_REG_CIC5_DECIM 0x306
#define AD6620_REG_RCF_CTRL 0x309
#define AD6620_REG_RCF_DECIM 0x30A
#define AD6620_REG_RCFADDR_OFS 0x30B
#define AD6620_REG_RCF_TAPS 0x30C
#define AD6620_REG_RESERVED 0x30D
/*
// mode defines
#define AD9854_MODE_SINGLE 0x00
#define AD9854_MODE_FSK 0x01
#define AD9854_MODE_RAMPFSK 0x02
#define AD9854_MODE_CHIRP 0x03
#define AD9854_MODE_BPSK 0x04
// control register
#define AD9854_INVSINC_BYPASS BIT(6)
#define AD9854_INT_IO_UPDATE BIT(8)
#define AD9854_MODE_MASK 0x00000E00
#define AD9854_MODE0 BIT(9)
#define AD9854_MODE1 BIT(10)
#define AD9854_MODE2 BIT(11)
#define AD9854_TRIANGLE BIT(13)
#define AD9854_CLR_ACC2 BIT(14)
#define AD9854_CLR_ACC1 BIT(15)
#define AD9854_PLL_MULT_MASK 0x001F0000
#define AD9854_PLL_MULT0 BIT(16)
#define AD9854_PLL_MULT1 BIT(17)
#define AD9854_PLL_MULT2 BIT(18)
#define AD9854_PLL_MULT3 BIT(19)
#define AD9854_PLL_MULT4 BIT(20)
#define AD9854_PLL_BYPASS BIT(21)
#define AD9854_PLL_RANGE BIT(22)
#define AD9854_PD_DIG BIT(24)
#define AD9854_PD_DAC BIT(25)
#define AD9854_PD_QDAC BIT(26)
#define AD9854_PD_COMP BIT(28)
*/
void ad6620Init(void);
u32 ad6620ReadReg(u16 reg);
void ad6620WriteReg(u16 reg, u32 data);
void ad6620ShowRegisters(void);
#endif
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