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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"><html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1"><title>Procyon ARMlib-LPC2100: processor.h Source File</title><link href="dox.css" rel="stylesheet" type="text/css"></head><body><!-- Generated by Doxygen 1.3.6 --><div class="qindex"><a class="qindex" href="main.html">Main Page</a> | <a class="qindex" href="files.html">File List</a> | <a class="qindex" href="globals.html">Globals</a></div><h1>processor.h</h1><a href="processor_8h.html">Go to the documentation of this file.</a><div class="fragment"><pre>00001 <span class="comment">/*! \file processor.h \brief LPC2100 Processor Initialization and Support. */</span>00002 <span class="comment">//*****************************************************************************</span>00003 <span class="comment">//</span>00004 <span class="comment">// File Name : 'processor.h'</span>00005 <span class="comment">// Title : LPC2100 Processor Initialization and Support</span>00006 <span class="comment">// Author : Pascal Stang - Copyright (C) 2004</span>00007 <span class="comment">// Created : 2004.05.05</span>00008 <span class="comment">// Revised : 2004.07.12</span>00009 <span class="comment">// Version : 0.1</span>00010 <span class="comment">// Target MCU : ARM processors</span>00011 <span class="comment">// Editor Tabs : 4</span>00012 <span class="comment">//</span>00013 <span class="comment">// NOTE: This code is currently below version 1.0, and therefore is considered</span>00014 <span class="comment">// to be lacking in some functionality or documentation, or may not be fully</span>00015 <span class="comment">// tested. Nonetheless, you can expect most functions to work.</span>00016 <span class="comment">//</span>00017 <span class="comment">// This code is distributed under the GNU Public License</span>00018 <span class="comment">// which can be found at http://www.gnu.org/licenses/gpl.txt</span>00019 <span class="comment">//</span>00020 <span class="comment">//*****************************************************************************</span>00021 00022 <span class="preprocessor">#ifndef PROCESSOR_H</span>00023 <span class="preprocessor"></span><span class="preprocessor">#define PROCESSOR_H</span>00024 <span class="preprocessor"></span>00025 <span class="preprocessor">#include "<a class="code" href="global_8h.html">global.h</a>"</span>00026 00027 <span class="keywordtype">void</span> processorInit(<span class="keywordtype">void</span>);00028 00029 00030 <span class="comment">/******************************************************************************</span>00031 <span class="comment"> *</span>00032 <span class="comment"> * MACRO Name: ISR_ENTRY()</span>00033 <span class="comment"> *</span>00034 <span class="comment"> * Description:</span>00035 <span class="comment"> * This MACRO is used upon entry to an ISR. The current version of</span>00036 <span class="comment"> * the gcc compiler for ARM does not produce correct code for</span>00037 <span class="comment"> * interrupt routines to operate properly with THUMB code. The MACRO</span>00038 <span class="comment"> * performs the following steps:</span>00039 <span class="comment"> *</span>00040 <span class="comment"> * 1 - Adjust address at which execution should resume after servicing</span>00041 <span class="comment"> * ISR to compensate for IRQ entry</span>00042 <span class="comment"> * 2 - Save the non-banked registers r0-r12 and lr onto the IRQ stack.</span>00043 <span class="comment"> * 3 - Get the status of the interrupted program is in SPSR.</span>00044 <span class="comment"> * 4 - Push it onto the IRQ stack as well.</span>00045 <span class="comment"> *</span>00046 <span class="comment"> *****************************************************************************/</span>00047 <span class="preprocessor">#define ISR_ENTRY() asm volatile(" sub lr, lr,#4\n" \</span>00048 <span class="preprocessor"> " stmfd sp!,{r0-r12,lr}\n" \</span>00049 <span class="preprocessor"> " mrs r1, spsr\n" \</span>00050 <span class="preprocessor"> " stmfd sp!,{r1}")</span>00051 <span class="preprocessor"></span>00052 <span class="comment">/******************************************************************************</span>00053 <span class="comment"> *</span>00054 <span class="comment"> * MACRO Name: ISR_EXIT()</span>00055 <span class="comment"> *</span>00056 <span class="comment"> * Description:</span>00057 <span class="comment"> * This MACRO is used to exit an ISR. The current version of the gcc</span>00058 <span class="comment"> * compiler for ARM does not produce correct code for interrupt</span>00059 <span class="comment"> * routines to operate properly with THUMB code. The MACRO performs</span>00060 <span class="comment"> * the following steps:</span>00061 <span class="comment"> *</span>00062 <span class="comment"> * 1 - Recover SPSR value from stack </span>00063 <span class="comment"> * 2 - and restore its value </span>00064 <span class="comment"> * 3 - Pop the return address & the saved general registers from</span>00065 <span class="comment"> * the IRQ stack & return</span>00066 <span class="comment"> *</span>00067 <span class="comment"> *****************************************************************************/</span>00068 <span class="preprocessor">#define ISR_EXIT() asm volatile(" ldmfd sp!,{r1}\n" \</span>00069 <span class="preprocessor"> " msr spsr_c,r1\n" \</span>00070 <span class="preprocessor"> " ldmfd sp!,{r0-r12,pc}^")</span>00071 <span class="preprocessor"></span>00072 <span class="comment">/******************************************************************************</span>00073 <span class="comment"> *</span>00074 <span class="comment"> * Function Name: disableIRQ()</span>00075 <span class="comment"> *</span>00076 <span class="comment"> * Description:</span>00077 <span class="comment"> * This function sets the IRQ disable bit in the status register</span>00078 <span class="comment"> *</span>00079 <span class="comment"> * Calling Sequence: </span>00080 <span class="comment"> * void</span>00081 <span class="comment"> *</span>00082 <span class="comment"> * Returns:</span>00083 <span class="comment"> * previous value of CPSR</span>00084 <span class="comment"> *</span>00085 <span class="comment"> *****************************************************************************/</span>00086 <span class="keywordtype">unsigned</span> disableIRQ(<span class="keywordtype">void</span>);00087 00088 <span class="comment">/******************************************************************************</span>00089 <span class="comment"> *</span>00090 <span class="comment"> * Function Name: enableIRQ()</span>00091 <span class="comment"> *</span>00092 <span class="comment"> * Description:</span>00093 <span class="comment"> * This function clears the IRQ disable bit in the status register</span>00094 <span class="comment"> *</span>00095 <span class="comment"> * Calling Sequence: </span>00096 <span class="comment"> * void</span>00097 <span class="comment"> *</span>00098 <span class="comment"> * Returns:</span>00099 <span class="comment"> * previous value of CPSR</span>00100 <span class="comment"> *</span>00101 <span class="comment"> *****************************************************************************/</span>00102 <span class="keywordtype">unsigned</span> enableIRQ(<span class="keywordtype">void</span>);00103 00104 <span class="comment">/******************************************************************************</span>00105 <span class="comment"> *</span>00106 <span class="comment"> * Function Name: restoreIRQ()</span>00107 <span class="comment"> *</span>00108 <span class="comment"> * Description:</span>00109 <span class="comment"> * This function restores the IRQ disable bit in the status register</span>00110 <span class="comment"> * to the value contained within passed oldCPSR</span>00111 <span class="comment"> *</span>00112 <span class="comment"> * Calling Sequence: </span>00113 <span class="comment"> * void</span>00114 <span class="comment"> *</span>00115 <span class="comment"> * Returns:</span>00116 <span class="comment"> * previous value of CPSR</span>00117 <span class="comment"> *</span>00118 <span class="comment"> *****************************************************************************/</span>00119 <span class="keywordtype">unsigned</span> restoreIRQ(<span class="keywordtype">unsigned</span> oldCPSR);00120 00121 <span class="comment">/******************************************************************************</span>00122 <span class="comment"> *</span>00123 <span class="comment"> * Function Name: disableFIQ()</span>00124 <span class="comment"> *</span>00125 <span class="comment"> * Description:</span>00126 <span class="comment"> * This function sets the FIQ disable bit in the status register</span>00127 <span class="comment"> *</span>00128 <span class="comment"> * Calling Sequence: </span>00129 <span class="comment"> * void</span>00130 <span class="comment"> *</span>00131 <span class="comment"> * Returns:</span>00132 <span class="comment"> * previous value of CPSR</span>00133 <span class="comment"> *</span>00134 <span class="comment"> *****************************************************************************/</span>00135 <span class="keywordtype">unsigned</span> disableFIQ(<span class="keywordtype">void</span>);00136 00137 <span class="comment">/******************************************************************************</span>00138 <span class="comment"> *</span>00139 <span class="comment"> * Function Name: enableFIQ()</span>00140 <span class="comment"> *</span>00141 <span class="comment"> * Description:</span>00142 <span class="comment"> * This function clears the FIQ disable bit in the status register</span>00143 <span class="comment"> *</span>00144 <span class="comment"> * Calling Sequence: </span>00145 <span class="comment"> * void</span>00146 <span class="comment"> *</span>00147 <span class="comment"> * Returns:</span>00148 <span class="comment"> * previous value of CPSR</span>00149 <span class="comment"> *</span>00150 <span class="comment"> *****************************************************************************/</span>00151 <span class="keywordtype">unsigned</span> enableFIQ(<span class="keywordtype">void</span>);00152 00153 <span class="comment">/******************************************************************************</span>00154 <span class="comment"> *</span>00155 <span class="comment"> * Function Name: restoreIRQ()</span>00156 <span class="comment"> *</span>00157 <span class="comment"> * Description:</span>00158 <span class="comment"> * This function restores the FIQ disable bit in the status register</span>00159 <span class="comment"> * to the value contained within passed oldCPSR</span>00160 <span class="comment"> *</span>00161 <span class="comment"> * Calling Sequence: </span>00162 <span class="comment"> * void</span>00163 <span class="comment"> *</span>00164 <span class="comment"> * Returns:</span>00165 <span class="comment"> * previous value of CPSR</span>00166 <span class="comment"> *</span>00167 <span class="comment"> *****************************************************************************/</span>00168 <span class="keywordtype">unsigned</span> restoreFIQ(<span class="keywordtype">unsigned</span> oldCPSR);00169 00170 <span class="preprocessor">#endif</span></pre></div><hr size="1"><address style="align: right;"><small>Generated on Tue Jul 13 03:38:12 2004 for Procyon ARMlib-LPC2100 by<a href="http://www.doxygen.org/index.html"><img src="doxygen.png" alt="doxygen" align="middle" border=0 > </a>1.3.6 </small></address></body></html>⌨️ 快捷键说明
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