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<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"><html><head><meta http-equiv="Content-Type" content="text/html;charset=iso-8859-1"><title>Procyon ARMlib-LPC2100: aic23b.h Source File</title><link href="dox.css" rel="stylesheet" type="text/css"></head><body><!-- Generated by Doxygen 1.3.6 --><div class="qindex"><a class="qindex" href="main.html">Main Page</a> | <a class="qindex" href="files.html">File List</a> | <a class="qindex" href="globals.html">Globals</a></div><h1>aic23b.h</h1><a href="aic23b_8h.html">Go to the documentation of this file.</a><div class="fragment"><pre>00001 <span class="comment">/*! \file aic23b.h \brief TI TLV320AIC23B Audio Codec Driver. */</span>00002 <span class="comment">//*****************************************************************************</span>00003 <span class="comment">//</span>00004 <span class="comment">// File Name : 'aic23b.h'</span>00005 <span class="comment">// Title : TI TLV320AIC23B Audio Codec Driver</span>00006 <span class="comment">// Author : Pascal Stang - Copyright (C) 2004</span>00007 <span class="comment">// Created : 2004.05.05</span>00008 <span class="comment">// Revised : 2004.07.12</span>00009 <span class="comment">// Version : 0.1</span>00010 <span class="comment">// Target MCU : ARM processors</span>00011 <span class="comment">// Editor Tabs : 4</span>00012 <span class="comment">//</span>00013 <span class="comment">// NOTE: This code is currently below version 1.0, and therefore is considered</span>00014 <span class="comment">// to be lacking in some functionality or documentation, or may not be fully</span>00015 <span class="comment">// tested. Nonetheless, you can expect most functions to work.</span>00016 <span class="comment">//</span>00017 <span class="comment">// This code is distributed under the GNU Public License</span>00018 <span class="comment">// which can be found at http://www.gnu.org/licenses/gpl.txt</span>00019 <span class="comment">//</span>00020 <span class="comment">//*****************************************************************************</span>00021 00022 00023 <span class="preprocessor">#ifndef AIC23B_H</span>00024 <span class="preprocessor"></span><span class="preprocessor">#define AIC23B_H</span>00025 <span class="preprocessor"></span>00026 <span class="preprocessor">#define AIC_I2C_ADDR 0x34</span>00027 <span class="preprocessor"></span>00028 <span class="preprocessor">#define AIC_REG_VOL_LINEIN_LEFT 0x0000</span>00029 <span class="preprocessor"></span><span class="preprocessor">#define AIC_REG_VOL_LINEIN_RIGHT 0x0200</span>00030 <span class="preprocessor"></span><span class="preprocessor">#define AIC_REG_VOL_HP_LEFT 0x0400</span>00031 <span class="preprocessor"></span><span class="preprocessor">#define AIC_REG_VOL_HP_RIGHT 0x0600</span>00032 <span class="preprocessor"></span><span class="preprocessor">#define AIC_REG_ANALOG_PATH 0x0800</span>00033 <span class="preprocessor"></span><span class="preprocessor">#define AIC_REG_DIGITAL_PATH 0x0A00</span>00034 <span class="preprocessor"></span><span class="preprocessor">#define AIC_REG_POWERDOWN 0x0C00</span>00035 <span class="preprocessor"></span><span class="preprocessor">#define AIC_REG_INTERFACE_FORMAT 0x0E00</span>00036 <span class="preprocessor"></span><span class="preprocessor">#define AIC_REG_SAMPLE_RATE 0x1000</span>00037 <span class="preprocessor"></span><span class="preprocessor">#define AIC_REG_DIGITAL_IF_ACT 0x1200</span>00038 <span class="preprocessor"></span><span class="preprocessor">#define AIC_REG_RESET 0x1E00</span>00039 <span class="preprocessor"></span>00040 <span class="comment">// AIC_REG_VOL_LINEIN_LEFT bits</span>00041 <span class="preprocessor">#define AIC_VLIL_LRS 8 // 0=disabled 1=left/right simultaneous update</span>00042 <span class="preprocessor"></span><span class="preprocessor">#define AIC_VLIL_LIM 7 // 0=Normal 1=Muted</span>00043 <span class="preprocessor"></span><span class="preprocessor">#define AIC_VLIL_LIV4 4</span>00044 <span class="preprocessor"></span><span class="preprocessor">#define AIC_VLIL_LIV3 3</span>00045 <span class="preprocessor"></span><span class="preprocessor">#define AIC_VLIL_LIV2 2</span>00046 <span class="preprocessor"></span><span class="preprocessor">#define AIC_VLIL_LIV1 1</span>00047 <span class="preprocessor"></span><span class="preprocessor">#define AIC_VLIL_LIV0 0</span>00048 <span class="preprocessor"></span>00049 <span class="comment">// AIC_REG_VOL_LINEIN_RIGHT bits</span>00050 <span class="preprocessor">#define AIC_VLIR_RLS 8 // 0=disabled 1=left/right simultaneous update</span>00051 <span class="preprocessor"></span><span class="preprocessor">#define AIC_VLIR_RIM 7 // Mute: 0=Normal 1=Muted</span>00052 <span class="preprocessor"></span><span class="preprocessor">#define AIC_VLIR_RIV4 4</span>00053 <span class="preprocessor"></span><span class="preprocessor">#define AIC_VLIR_RIV3 3</span>00054 <span class="preprocessor"></span><span class="preprocessor">#define AIC_VLIR_RIV2 2</span>00055 <span class="preprocessor"></span><span class="preprocessor">#define AIC_VLIR_RIV1 1</span>00056 <span class="preprocessor"></span><span class="preprocessor">#define AIC_VLIR_RIV0 0</span>00057 <span class="preprocessor"></span>00058 <span class="comment">// AIC_REG_VOL_HP_LEFT bits</span>00059 <span class="preprocessor">#define AIC_VHPL_LRS 8 // 0=disabled 1=left/right simultaneous update</span>00060 <span class="preprocessor"></span><span class="preprocessor">#define AIC_VHPL_LZC 7</span>00061 <span class="preprocessor"></span>00062 <span class="comment">// AIC_REG_VOL_HP_RIGHT bits</span>00063 <span class="preprocessor">#define AIC_VHPR_RLS 8 // 0=disabled 1=left/right simultaneous update</span>00064 <span class="preprocessor"></span><span class="preprocessor">#define AIC_VHPR_RZC 7</span>00065 <span class="preprocessor"></span>00066 <span class="comment">// AIC_REG_ANALOG_PATH bits</span>00067 <span class="preprocessor">#define AIC_AP_STA2 8 // sidetone attenuation</span>00068 <span class="preprocessor"></span><span class="preprocessor">#define AIC_AP_STA1 7</span>00069 <span class="preprocessor"></span><span class="preprocessor">#define AIC_AP_STA0 6</span>00070 <span class="preprocessor"></span><span class="preprocessor">#define AIC_AP_STE 5 // sidetone enable</span>00071 <span class="preprocessor"></span><span class="preprocessor">#define AIC_AP_DAC 4 // DAC enable: 0=off 1=on</span>00072 <span class="preprocessor"></span><span class="preprocessor">#define AIC_AP_BYP 3 // analog bypass linein->lineout: 0=disabled</span>00073 <span class="preprocessor"></span><span class="preprocessor">#define AIC_AP_INSEL 2 // ADC input select: 0=line 1=mic</span>00074 <span class="preprocessor"></span><span class="preprocessor">#define AIC_AP_MICM 1 // MIC mute: 0=normal 1=mute</span>00075 <span class="preprocessor"></span><span class="preprocessor">#define AIC_AP_MICB 0 // MIC boost: 0=0dB 1=+20dB</span>00076 <span class="preprocessor"></span>00077 <span class="comment">// AIC_REG_DIGITAL_PATH bits</span>00078 <span class="preprocessor">#define AIC_DP_DACM 3 // DAC mute: 0=disabled</span>00079 <span class="preprocessor"></span><span class="preprocessor">#define AIC_DP_DEEMP1 2 // De-emphasis: 00=off 01=32KHz 10=44.1KHz 11=48KHz</span>00080 <span class="preprocessor"></span><span class="preprocessor">#define AIC_DP_DEEMP0 1 </span>00081 <span class="preprocessor"></span><span class="preprocessor">#define AIC_DP_ADCHP 0 // ADC high-pass: 0=disabled</span>00082 <span class="preprocessor"></span>00083 <span class="comment">// AIC_REG_POWERDOWN bits</span>00084 <span class="preprocessor">#define AIC_PD_OFF 7 // 0=power on 1=power off</span>00085 <span class="preprocessor"></span><span class="preprocessor">#define AIC_PD_CLK 6</span>00086 <span class="preprocessor"></span><span class="preprocessor">#define AIC_PD_OSC 5</span>00087 <span class="preprocessor"></span><span class="preprocessor">#define AIC_PD_OUT 4</span>00088 <span class="preprocessor"></span><span class="preprocessor">#define AIC_PD_DAC 3</span>00089 <span class="preprocessor"></span><span class="preprocessor">#define AIC_PD_ADC 2</span>00090 <span class="preprocessor"></span><span class="preprocessor">#define AIC_PD_MIC 1</span>00091 <span class="preprocessor"></span><span class="preprocessor">#define AIC_PD_LINE 0</span>00092 <span class="preprocessor"></span>00093 <span class="comment">// AIC_REG_INTERFACE_FORMAT bits</span>00094 <span class="preprocessor">#define AIC_IF_MS 6 // Master/Slave: 0=slave 1=master</span>00095 <span class="preprocessor"></span><span class="preprocessor">#define AIC_IF_LRSWAP 5 // DAC LR swap: 0=disabled</span>00096 <span class="preprocessor"></span><span class="preprocessor">#define AIC_IF_LRP 4 // left/right phase</span>00097 <span class="preprocessor"></span><span class="preprocessor">#define AIC_IF_IWL1 3 // Input Length:</span>00098 <span class="preprocessor"></span><span class="preprocessor">#define AIC_IF_IWL0 2 // 00=16bit 01=20bit 10=24bit 11=32bit</span>00099 <span class="preprocessor"></span><span class="preprocessor">#define AIC_IF_FOR1 1 // Data Format:</span>00100 <span class="preprocessor"></span><span class="preprocessor">#define AIC_IF_FOR0 0 // 11=DSP 10=I2S MSB 1st left 01=MSB 1st left 00=MSB 1st right</span>00101 <span class="preprocessor"></span>00102 <span class="preprocessor">#define AIC_IF_16BIT 0x00</span>00103 <span class="preprocessor"></span><span class="preprocessor">#define AIC_IF_20BIT 0x04</span>00104 <span class="preprocessor"></span><span class="preprocessor">#define AIC_IF_24BIT 0x08</span>00105 <span class="preprocessor"></span><span class="preprocessor">#define AIC_IF_32BIT 0x0C</span>00106 <span class="preprocessor"></span>00107 <span class="preprocessor">#define AIC_IF_DSP 0x03</span>00108 <span class="preprocessor"></span><span class="preprocessor">#define AIC_IF_I2S 0x02</span>00109 <span class="preprocessor"></span><span class="preprocessor">#define AIC_IF_MSBL 0x01</span>00110 <span class="preprocessor"></span><span class="preprocessor">#define AIC_IF_MSBR 0x00</span>00111 <span class="preprocessor"></span>00112 <span class="comment">// AIC_REG_SAMPLE_RATE bits</span>00113 <span class="preprocessor">#define AIC_SR_CLKOUT 7 // Clock output divider: 0=MCLK 1=MCLK/2</span>00114 <span class="preprocessor"></span><span class="preprocessor">#define AIC_SR_CLKIN 6 // Clock input divider: 0=MCLK 1=MCLK/2</span>00115 <span class="preprocessor"></span><span class="preprocessor">#define AIC_SR_SR3 5 // Sample Rate Control:</span>00116 <span class="preprocessor"></span><span class="preprocessor">#define AIC_SR_SR2 4</span>00117 <span class="preprocessor"></span><span class="preprocessor">#define AIC_SR_SR1 3</span>00118 <span class="preprocessor"></span><span class="preprocessor">#define AIC_SR_SR0 2</span>00119 <span class="preprocessor"></span><span class="preprocessor">#define AIC_SR_BOSR 1 // Base Oversampl. Rate: Nor:0=256fs 1=384fs USB: 0=250fs 1=272fs </span>00120 <span class="preprocessor"></span><span class="preprocessor">#define AIC_SR_USB 0 // Clock mode select: 0=Normal 1=USB (12MHz)</span>00121 <span class="preprocessor"></span>00122 <span class="preprocessor">#define AIC_SR_USB_96KHZ (BIT(AIC_SR_USB) | BIT(AIC_SR_SR0) | BIT(AIC_SR_SR1) | BIT(AIC_SR_SR2))</span>00123 <span class="preprocessor"></span><span class="preprocessor">#define AIC_SR_USB_48KHZ (BIT(AIC_SR_USB))</span>00124 <span class="preprocessor"></span><span class="preprocessor">#define AIC_SR_USB_44KHZ (BIT(AIC_SR_USB) | BIT(AIC_SR_BOSR) | BIT(AIC_SR_SR3))</span>00125 <span class="preprocessor"></span><span class="preprocessor">#define AIC_SR_USB_32KHZ (BIT(AIC_SR_USB) | BIT(AIC_SR_SR1) | BIT(AIC_SR_SR2))</span>00126 <span class="preprocessor"></span><span class="preprocessor">#define AIC_SR_USB_8KHZ (BIT(AIC_SR_USB) | BIT(AIC_SR_SR0) | BIT(AIC_SR_SR1))</span>00127 <span class="preprocessor"></span>00128 <span class="preprocessor">#define AIC_SR_18432_96KHZ (BIT(AIC_SR_BOSR) | BIT(AIC_SR_SR0) | BIT(AIC_SR_SR1) | BIT(AIC_SR_SR2))</span>00129 <span class="preprocessor"></span><span class="preprocessor">#define AIC_SR_18432_48KHZ (BIT(AIC_SR_BOSR))</span>00130 <span class="preprocessor"></span><span class="preprocessor">#define AIC_SR_18432_32KHZ (BIT(AIC_SR_BOSR) | BIT(AIC_SR_SR1) | BIT(AIC_SR_SR2))</span>00131 <span class="preprocessor"></span><span class="preprocessor">#define AIC_SR_18432_8KHZ (BIT(AIC_SR_BOSR) | BIT(AIC_SR_SR0) | BIT(AIC_SR_SR1))</span>00132 <span class="preprocessor"></span>00133 00134 <span class="comment">// AIC_REG_DIGITAL_IF_ACT bits</span>00135 00136 <span class="keywordtype">void</span> aicInit(<span class="keywordtype">void</span>);00137 <span class="keywordtype">int</span> aicWriteReg(u16 regdata);00138 00139 <span class="keywordtype">void</span> aicSetVolumeHp(u08 volume);00140 <span class="keywordtype">void</span> aicSetVolumeLineIn(u08 volume);00141 <span class="keywordtype">void</span> aicSetVolumeLineOut(u08 volume);00142 00143 <span class="keywordtype">void</span> aicDigitalEnable(<span class="keywordtype">void</span>);00144 00145 <span class="keywordtype">void</span> aicSpiInit(<span class="keywordtype">void</span>);00146 u32 aicGetSampleCount(<span class="keywordtype">void</span>);00147 <span class="keywordtype">void</span> aicClearSampleCount(<span class="keywordtype">void</span>);00148 00149 <span class="keywordtype">void</span> aicSpiService(<span class="keywordtype">void</span>) __attribute__((naked));00150 <span class="keywordtype">void</span> aicLRCService(<span class="keywordtype">void</span>) __attribute__((naked));00151 <span class="keywordtype">void</span> fast_interrupt_exception(<span class="keywordtype">void</span>) __attribute__((naked));00152 00153 00154 00155 <span class="preprocessor">#endif</span></pre></div><hr size="1"><address style="align: right;"><small>Generated on Tue Jul 13 03:38:11 2004 for Procyon ARMlib-LPC2100 by<a href="http://www.doxygen.org/index.html"><img src="doxygen.png" alt="doxygen" align="middle" border=0 > </a>1.3.6 </small></address></body></html>⌨️ 快捷键说明
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