c5416dma_ads8345cfg_c.c

ADS8345 to TMS320C5416 DSP

/*   Do *not* directly modify this file.  It was    */
/*   generated by the Configuration Tool; any  */
/*   changes risk being overwritten.                */

/* INPUT c5416DMA_ads8345.cdb */

/*  Include Header File  */
#include "c5416DMA_ads8345cfg.h"

extern Uint16 CfgByte, CfgByte;

extern Uint16 buffer, buffer;

/*  Config Structures */
DMA_Config dmaCfg4 = {
    0x0001,        /*  Channel Priority (0x0000 or 0x0001)  */
    0x0001,        /*  Global Reload Register Usage in Autoinit Mode (AUTOIX : 0x0000 or 0x0001)  */
    0x1141,        /*  Transfer Mode Control Register (DMMCR)  */
    0x6000,        /*  Sync Event and Frame Count Register (DMSFC)  */
    (DMA_AdrPtr)&CfgByte,        /*  Source Address Register (DMSRC) - Symbolic  */
    (DMA_AdrPtr)0x0043,        /*  Destination Address Register (DMDST) - Numeric  */
    0x0008,        /*  Element Count Register (DMCTR)  */
    (DMA_AdrPtr)&CfgByte,        /*  Global Source Address Reload Register (DMGSA) - Symbolic  */
    (DMA_AdrPtr)0x0043,        /*  Global Destination Address Reload Register (DMGDA) - Numeric  */
    0x0006,        /*  Global Element Count Reload Register (DMGCR)  */
    0x0000         /*  Global Frame Count Reload Register (DMGFR)  */
};

DMA_Config dmaCfg5 = {
    0x0000,        /*  Channel Priority (0x0000 or 0x0001)  */
    0x0001,        /*  Global Reload Register Usage in Autoinit Mode (AUTOIX : 0x0000 or 0x0001)  */
    0x5045,        /*  Transfer Mode Control Register (DMMCR)  */
    0x5000,        /*  Sync Event and Frame Count Register (DMSFC)  */
    (DMA_AdrPtr)0x0041,        /*  Source Address Register (DMSRC) - Numeric  */
    (DMA_AdrPtr)&buffer,        /*  Destination Address Register (DMDST) - Symbolic  */
    0x0800,        /*  Element Count Register (DMCTR)  */
    (DMA_AdrPtr)0x0041,        /*  Global Source Address Reload Register (DMGSA) - Numeric  */
    (DMA_AdrPtr)&buffer,        /*  Global Destination Address Reload Register (DMGDA) - Symbolic  */
    0x07ff,        /*  Global Element Count Reload Register (DMGCR)  */
    0x0000         /*  Global Frame Count Reload Register (DMGFR)  */
};

DMA_GblConfig gDMAConfig0 = {
    0x1,        /*  Breakpoint Emulation Behavior (FREE)  */
    0x0001,        /*  Global Reload Register Usage in Autoinit Mode (AUTOIX : 0x0000 or 0x0001)  */
    NULL,        /*  Source Program Page Address Register (DMSRCP) - Symbolic  */
    0x00,        /*  Destination Program Page Address Register (DMDSTP) - Numeric  */
    0x0001,        /*  Element Address Index Register 0 (DMIDX0)  */
    0x0000,        /*  Frame Address Index Register 0 (DMFRI0)  */
    0x0001,        /*  Element Address Index Register 1 (DMIDX1)  */
    0x0000,        /*  Frame Address Index Register 1 (DMFRI1)  */
    (Uint16)&CfgByte,        /*  Extended Source Data Page Register (DMSRCDP) - Symbolic  */
    0x00         /*  Extended Destination Data Page Register (DMDSTDP) - Numeric  */
};

DMA_GblConfig gDMAConfig1 = {
    0x1,        /*  Breakpoint Emulation Behavior (FREE)  */
    0x0001,        /*  Global Reload Register Usage in Autoinit Mode (AUTOIX : 0x0000 or 0x0001)  */
    0x00,        /*  Source Program Page Address Register (DMSRCP) - Numeric  */
    NULL,        /*  Destination Program Page Address Register (DMDSTP) - Symbolic  */
    0x0000,        /*  Element Address Index Register 0 (DMIDX0)  */
    0x0000,        /*  Frame Address Index Register 0 (DMFRI0)  */
    0x0000,        /*  Element Address Index Register 1 (DMIDX1)  */
    0x0000,        /*  Frame Address Index Register 1 (DMFRI1)  */
    0x00,        /*  Extended Source Data Page Register (DMSRCDP) - Numeric  */
    (Uint16)&buffer         /*  Extended Destination Data Page Register (DMDSTDP) - Symbolic  */
};

MCBSP_Config mcbspCfg1 = {
    0x0000,        /*  Serial Port Control Register 1   */
    0x0200,        /*  Serial Port Control Register 2   */
    0x0040,        /*  Receive Control Register 1   */
    0x0001,        /*  Receive Control Register 2   */
    0x0040,        /*  Transmit Control Register 1   */
    0x0001,        /*  Transmit Control Register 2   */
    0x003f,        /*  Sample Rate Generator Register 1   */
    0x3017,        /*  Sample Rate Generator Register 2   */
    0x0000,        /*  Multichannel Control Register 1   */
    0x0000,        /*  Multichannel Control Register 2   */
    0x0b03,        /*  Pin Control Register   */
    0x0000,        /*  Receive Channel Enable Register Partition A   */
    0x0000,        /*  Receive Channel Enable Register Partition B   */
    0x0000,        /*  Receive Channel Enable Register Partition C   */
    0x0000,        /*  Receive Channel Enable Register Partition D   */
    0x0000,        /*  Receive Channel Enable Register Partition E   */
    0x0000,        /*  Receive Channel Enable Register Partition F   */
    0x0000,        /*  Receive Channel Enable Register Partition G   */
    0x0000,        /*  Receive Channel Enable Register Partition H   */
    0x0000,        /*  Transmit Channel Enable Register Partition A   */
    0x0000,        /*  Transmit Channel Enable Register Partition B   */
    0x0000,        /*  Transmit Channel Enable Register Partition C   */
    0x0000,        /*  Transmit Channel Enable Register Partition D   */
    0x0000,        /*  Transmit Channel Enable Register Partition E   */
    0x0000,        /*  Transmit Channel Enable Register Partition F   */
    0x0000,        /*  Transmit Channel Enable Register Partition G   */
    0x0000         /*  Transmit Channel Enable Register Partition H   */
};

/*  Handles  */
DMA_Handle hDma4;
DMA_Handle hDma5;
MCBSP_Handle hMcbsp1;

/*
 *  ======== CSL_cfgInit() ========  
 */
void CSL_cfgInit()
{
    dmaCfg4.dmsrc = (DMA_AdrPtr)((Uint32)(&CfgByte) & 0xFFFF);
    gDMAConfig0.gbldmsrcdp = (Uint16)((Uint32)(&CfgByte) >> 16);
    dmaCfg4.dmgsa = (DMA_AdrPtr)((Uint32)(&CfgByte) & 0xFFFF);
    dmaCfg5.dmdst = (DMA_AdrPtr)((Uint32)(&buffer) & 0xFFFF);
    gDMAConfig1.gbldmdstdp = (Uint16)((Uint32)(&buffer) >> 16);
    hDma4 = DMA_open(DMA_CHA4, DMA_OPEN_RESET);
    hDma5 = DMA_open(DMA_CHA5, DMA_OPEN_RESET);
    hMcbsp1 = MCBSP_open(MCBSP_PORT1, MCBSP_OPEN_RESET);
    DMA_config(hDma4, &dmaCfg4);
    DMA_globalConfig(0x0FFFF, &gDMAConfig0);
    DMA_config(hDma5, &dmaCfg5);
    DMA_globalConfig(0x0FFFF, &gDMAConfig1);
    MCBSP_config(hMcbsp1, &mcbspCfg1);




}