mr10.asm
来自「"DIGITAL SIGNAL PROCESSING WITH C AND TH」· 汇编 代码 · 共 836 行 · 第 1/4 页
ASM
836 行
I9_DATA .usect "I_DATA",16
.bss F1_COEFF,41 ;START OF FILTER'S ADJUSTED COEFFS
.bss F2_COEFF,41
.bss F3_COEFF,41
.bss F4_COEFF,41
.bss F5_COEFF,41
.bss F6_COEFF,41
.bss F7_COEFF,41
.bss F8_COEFF,41
.bss F9_COEFF,41
.bss F0_COEFF,41
.bss IC_IRAM,I_LENGTH+I_LENGTH
.data
PNTR_F1 .word 0 ;INIT EACH FLTR'S INPUT BUFFER POINTER
PNTR_F2 .word 0
PNTR_F3 .word 0
PNTR_F4 .word 0
PNTR_F5 .word 0
PNTR_F6 .word 0
PNTR_F7 .word 0
PNTR_F8 .word 0
PNTR_F9 .word 0
PNTR_F0 .word 0
PNTR_I1 .word 0 ;INIT EACH INTRPR'S INPUT BUFFER POINTER
PNTR_I2 .word 0
PNTR_I3 .word 0
PNTR_I4 .word 0
PNTR_I5 .word 0
PNTR_I6 .word 0
PNTR_I7 .word 0
PNTR_I8 .word 0
PNTR_I9 .word 0
BUFFER_1 .float 0.0 ;START OF BUFFER #1
.space 511 ;RESERVE SPACE IN BUFFER
BUFFER_2 .float 0.0 ;START OF BUFFER #2
.space 511 ;RESERVE SPACE IN BUFFER
BUFFER_3 .float 0.0 ;START OF BUFFER #3
.space 255 ;RESERVE SPACE IN BUFFER
I_LENGTH .set INTR_21-INTR_01+1 ;# OF INTRPLTR COEFFS
F_LENGTH .set UFILT_0-UFILT_40+1 ;# OF FILTER COEFFS
STACKS .word 809F00H ;INIT STACK POINTER DATA
SRAM_CNTL .word 808064H ;PRIMARY BUS CONTROL REGISTER
PERIOD .word 7AH ;INTER RATE=8MHz/(2*PERIOD)=32786 Hz
IE_REG .word 100H ;ENABLE (TINT0) TIMER 0 INTERRUPT
TCNTL .word 3C3H ;CONTROL REGISTER VALUE
ST_REG .word 2000H ;SET STATUS REG
PLUS .word 000001000H ;POSITIVE "NOISE" LEVEL
MINUS .word 0FFFFF000H ;NEGATIVE "NOISE" LEVEL
SEED .word 7E521603H ;INITIAL SEED VALUE
PER_ADDR .word 808028H ;(TINT0) TIMER 0 PERIOD REG LOCATION
IO_ADDR .word 804002H ;AIB I/O ADDRESS
SC_ADDR .word SCALE_1L ;1ST ADDR OF SCALE VALUES
LF_ADDR .word LFILT_40 ;1ST ADDR OF LOWER 1/3 FILTER COEFF 40
MF_ADDR .word MFILT_40 ;1ST ADDR OF MID 1/3 FILTER COEFF 40
UF_ADDR .word UFILT_40 ;1ST ADDR OF UPPER 1/3 FILTER COEFF 40
F1C_ADDR .word F1_COEFF ;FILTER 1 COEFF ADDRESS
F2C_ADDR .word F2_COEFF ;FILTER 2 COEFF ADDRESS
F3C_ADDR .word F3_COEFF ;FILTER 3 COEFF ADDRESS
F4C_ADDR .word F4_COEFF ;FILTER 4 COEFF ADDRESS
F5C_ADDR .word F5_COEFF ;FILTER 5 COEFF ADDRESS
F6C_ADDR .word F6_COEFF ;FILTER 6 COEFF ADDRESS
F7C_ADDR .word F7_COEFF ;FILTER 7 COEFF ADDRESS
F8C_ADDR .word F8_COEFF ;FILTER 8 COEFF ADDRESS
F9C_ADDR .word F9_COEFF ;FILTER 9 COEFF ADDRESS
F0C_ADDR .word F0_COEFF ;FILTER 10 COEFF ADDRESS
IC_ADDR .word IC_IRAM ;FIRST INTRPLTR COEFF ADDR,INTERNAL RAM
IC_SRAM .word INTR_01 ;FIRST INTRPLTR COEFF ADDR,SRAM
F1D_ADDR .word FLT1_IN ;1ST FILTER INPUT DATA ADDRESS
F2D_ADDR .word FLT2_IN ;2ND FILTER INPUT DATA ADDRESS
F3D_ADDR .word FLT3_IN ;3RD FILTER INPUT DATA ADDRESS
F4D_ADDR .word FLT4_IN ;4TH FILTER INPUT DATA ADDRESS
F5D_ADDR .word FLT5_IN ;5TH FILTER INPUT DATA ADDRESS
F6D_ADDR .word FLT6_IN ;6TH FILTER INPUT DATA ADDRESS
F7D_ADDR .word FLT7_IN ;7TH FILTER INPUT DATA ADDRESS
F8D_ADDR .word FLT8_IN ;8TH FILTER INPUT DATA ADDRESS
F9D_ADDR .word FLT9_IN ;9TH FILTER INPUT DATA ADDRESS
F0D_ADDR .word FLT0_IN ;10TH FILTER INPUT DATA ADDRESS
I1D_ADDR .word I1_DATA ;1ST INTRPLTR DATA ADDRESS
I2D_ADDR .word I2_DATA ;2ND INTRPLTR DATA ADDRESS
I3D_ADDR .word I3_DATA ;3RD INTRPLTR DATA ADDRESS
I4D_ADDR .word I4_DATA ;4TH INTRPLTR DATA ADDRESS
I5D_ADDR .word I5_DATA ;5TH INTRPLTR DATA ADDRESS
I6D_ADDR .word I6_DATA ;6TH INTRPLTR DATA ADDRESS
I7D_ADDR .word I7_DATA ;7TH INTRPLTR DATA ADDRESS
I8D_ADDR .word I8_DATA ;8TH INTRPLTR DATA ADDRESS
I9D_ADDR .word I9_DATA ;9TH INTRPLTR DATA ADDRESS
F1P_ADDR .word PNTR_F1 ;FILTER 1 INPUT BUFFER POINTER ADDRESS
F2P_ADDR .word PNTR_F2 ;FILTER 2 INPUT BUFFER POINTER ADDRESS
F3P_ADDR .word PNTR_F3 ;FILTER 3 INPUT BUFFER POINTER ADDRESS
F4P_ADDR .word PNTR_F4 ;FILTER 4 INPUT BUFFER POINTER ADDRESS
F5P_ADDR .word PNTR_F5 ;FILTER 5 INPUT BUFFER POINTER ADDRESS
F6P_ADDR .word PNTR_F6 ;FILTER 6 INPUT BUFFER POINTER ADDRESS
F7P_ADDR .word PNTR_F7 ;FILTER 7 INPUT BUFFER POINTER ADDRESS
F8P_ADDR .word PNTR_F8 ;FILTER 8 INPUT BUFFER POINTER ADDRESS
F9P_ADDR .word PNTR_F9 ;FILTER 9 INPUT BUFFER POINTER ADDRESS
F0P_ADDR .word PNTR_F0 ;FILTER 10 INPUT BUFFER POINTER ADDRESS
I1P_ADDR .word PNTR_I1 ;INTRPLTR 1 INPUT BUFFER POINTER ADDRESS
I2P_ADDR .word PNTR_I2 ;INTRPLTR 2 INPUT BUFFER POINTER ADDRESS
I3P_ADDR .word PNTR_I3 ;INTRPLTR 3 INPUT BUFFER POINTER ADDRESS
I4P_ADDR .word PNTR_I4 ;INTRPLTR 4 INPUT BUFFER POINTER ADDRESS
I5P_ADDR .word PNTR_I5 ;INTRPLTR 5 INPUT BUFFER POINTER ADDRESS
I6P_ADDR .word PNTR_I6 ;INTRPLTR 6 INPUT BUFFER POINTER ADDRESS
I7P_ADDR .word PNTR_I7 ;INTRPLTR 7 INPUT BUFFER POINTER ADDRESS
I8P_ADDR .word PNTR_I8 ;INTRPLTR 8 INPUT BUFFER POINTER ADDRESS
I9P_ADDR .word PNTR_I9 ;INTRPLTR 9 INPUT BUFFER POINTER ADDRESS
B1_ADDR .word BUFFER_1 ;BUFFER #1 ADDRESS
B2_ADDR .word BUFFER_2 ;BUFFER #2 ADDRESS
B3_ADDR .word BUFFER_3 ;BUFFER #3 ADDRESS
;*****************************************************************************
;* INITIALIZATION *
;*****************************************************************************
.text ;ASSEMBLE INTO TEXT SECTION
BEGIN LDP STACKS ;INIT DATA PAGE
LDI @STACKS, SP ;SP-> 809F00H
;FOR 0 WAIT STATE **********************
LDI -225,R0 ;0 WAIT STATE DATA
LDI @SRAM_CNTL,AR0 ;PRIMARY BUS CNTL REG => AR0
AND *AR0,R0 ;SET DESIRED BITS
STI R0,*AR0 ;REPLACE CONTENTS PRIMARY BUS CNTL REG
;*****************************************************************************
;* CREATE ADJUSTED COEFFS *
;* AR0 = SCALE VALUES ADDRESS AR3 = UPR 1/3 FLTR COEFF ADDR *
;* AR1 = LOW 1/3 FLTR COEFF ADDR AR4 = ADJUSTED COEFF ADDR (10 SETS) *
;* AR2 = MID 1/3 FLTR COEFF ADDR R7 = LOOP COUNTER 1 TO 10(10 FILTERS)*
;* REGISTERS USED FOR CALCULATIONS: R0, R1, R2, R3, R4, R5, R6 *
;*****************************************************************************
LDI @SC_ADDR, AR0 ;SCALE VALUE ADDR -> AR0
LDI @F1C_ADDR, AR4 ;ADJUSTED FLTR COEFFS ADDR -> AR4
LDI 10, R7 ;SET LOOP COUNTER TO 10 (# OF FLTRS)
LOOP LDI @LF_ADDR, AR1 ;LOW 1/3 FLTR COEFFS ADDR -> AR1
LDI @MF_ADDR, AR2 ;MID 1/3 FLTR COEFFS ADDR -> AR2
LDI @UF_ADDR, AR3 ;UPR 1/3 FLTR COEFFS ADDR -> AR3
LDF *AR0++(1), R0 ;LOW 1/3 SCALE VALUE -> R0
LDF *AR0++(1), R1 ;MID 1/3 SCALE VALUE -> R1
LDF *AR0++(1), R2 ;UPR 1/3 SCALE VALUE -> R2
LDI F_LENGTH-1, RC ;LENGTH-1 -> RC
RPTB RPTB1_E ;REPEAT BLOCK ("LENGTH" TIMES)
LDF 0.0, R6 ;CLEAR R6
LDF *AR1++(1), R3 ;LOW 1/3 FLTR COEFF -> R3
MPYF R0, R3 ;COEFF * SCALE VALUE -> R3
LDF *AR2++(1), R4 ;MID 1/3 FLTR COEFF -> R4
MPYF R1, R4 ;COEFF * SCALE VALUE -> R4
LDF *AR3++(1), R5 ;UPR 1/3 FLTR COEFF -> R5
MPYF R2, R5 ;COEFF * SCALE VALUE -> R5
ADDF3 R3, R4, R6 ;ADD R3 + R4 -> R6
ADDF R5, R6 ;ADD R5 + R6 -> R6
RPTB1_E STF R6, *AR4++(1) ;STORE RESULTS
SUBI 1, R7 ;DECREMENT LOOP COUNTER (R7-1)
BNZ LOOP ;BRANCH ON NOT ZERO TO LOOP
;*********** MOVE INTRPLTR COEFF FROM SRAM TO INTERNAL RAM *****************
LDI @IC_SRAM,AR0 ;AR0=ADDR INTR COEFF IN SRAM
LDI @IC_ADDR,AR1 ;AR1=ADDR INTR COEFF IN RAM
LDF *AR0,R0
RPTS I_LENGTH+I_LENGTH-2
LDF *++AR0,R0
|| STF R0,*AR1++
STF R0,*AR1
;*****************************************************************************
;* CLEAR INPUT BUFFER FOR ALL FILTERS AND INTRPLTRS *
;* AR0 = INPUT BUFFER ADDRESS R0 = 0 *
;* NOTE: CLEAR ALL INPUT DATA LOCATIONS FOR EACH FILTER/INTRPLTR *
;* 10 FLTRS x 64 LOCATIONS + 9 INTPLTRS x 16 LOCATIONS *
;*****************************************************************************
LDF 0.0, R0 ;CLEAR R0
LDI @F1D_ADDR, AR0 ;FLTR 1 DATA ADDR -> AR0
RPTS 10*64+9*16 ;REPEAT CNTR = SIZE OF ALL INPUT BUFFERS
STF R0, *AR0++(1) ;STORE R0 INTO CURRENT ADDRESS
;clear all registers
LDF 0.0, R0 ;CLEAR REG
LDF 0.0, R1 ;CLEAR REG
LDF 0.0, R2 ;CLEAR REG
LDF 0.0, R3 ;CLEAR REG
LDF 0.0, R4 ;CLEAR REG
LDF 0.0, R5 ;CLEAR REG
LDF 0.0, R6 ;CLEAR REG
LDF 0.0, R7 ;CLEAR REG
;*****************************************************************************
;* STORE EACH FLTR/INTPLTR STARTING INPUT DATA ADDRESS INTO POINTER ADDRESS *
;* AR0 = FLTR/INTPLR PNTR ADDR AR1 = FLTR/INTPLR INPUT DATA ADDR *
;* NOTE: STORE STARTING DATA ADDR INTO POINTER ADDR FOR ALL FLTRS/INTPLTRS *
;*****************************************************************************
LDI @F1P_ADDR, AR0 ;FILTER 1 POINTER ADDRESS -> AR0
LDI @F1D_ADDR, AR1 ;FILTER 1 DATA ADDRESS -> AR1
STI AR1, *AR0++ ;STORE AR1 -> AR0++
LDI @F2D_ADDR, AR1 ;FILTER 2 DATA ADDRESS -> AR1
STI AR1, *AR0++ ;STORE AR1 -> AR0++
LDI @F3D_ADDR, AR1 ;FILTER 3 DATA ADDRESS -> AR1
STI AR1, *AR0++ ;STORE AR1 -> AR0++
LDI @F4D_ADDR, AR1 ;FILTER 4 DATA ADDRESS -> AR1
STI AR1, *AR0++ ;STORE AR1 -> AR0++
LDI @F5D_ADDR, AR1 ;FILTER 5 DATA ADDRESS -> AR1
STI AR1, *AR0++ ;STORE AR1 -> AR0++
LDI @F6D_ADDR, AR1 ;FILTER 6 DATA ADDRESS -> AR1
STI AR1, *AR0++ ;STORE AR1 -> AR0++
LDI @F7D_ADDR, AR1 ;FILTER 7 DATA ADDRESS -> AR1
STI AR1, *AR0++ ;STORE AR1 -> AR0++
LDI @F8D_ADDR, AR1 ;FILTER 8 DATA ADDRESS -> AR1
STI AR1, *AR0++ ;STORE AR1 -> AR0++
LDI @F9D_ADDR, AR1 ;FILTER 9 DATA ADDRESS -> AR1
STI AR1, *AR0++ ;STORE AR1 -> AR0++
LDI @F0D_ADDR, AR1 ;FILTER 10 DATA ADDRESS -> AR1
STI AR1, *AR0++ ;STORE AR1 -> AR0++
LDI @I1D_ADDR, AR1 ;INTRPLTR 1 DATA ADDRESS -> AR1
STI AR1, *AR0++ ;STORE AR1 -> AR0++
LDI @I2D_ADDR, AR1 ;INTRPLTR 2 DATA ADDRESS -> AR1
STI AR1, *AR0++ ;STORE AR1 -> AR0++
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