📄 ns8390x.h
字号:
/* @(#) pSOSystem x86/V2.5.0: bsps/devices/lan/ns8390x.h 4.1 98/11/13 16:25:02 */
/***********************************************************************/
/* */
/* MODULE: bsps/devices/lan/ns8390x.h */
/* DATE: 98/11/13 */
/* PURPOSE: This module contains header definitions for the NS8390x */
/* Ethernet LAN Controller chip. */
/* */
/*---------------------------------------------------------------------*/
/* */
/* Copyright 1991-1995, Integrated Systems, Inc. */
/* ALL RIGHTS RESERVED */
/* */
/* Permission is hereby granted to licensees of Integrated Systems, */
/* Inc. products to use or abstract this computer program for the */
/* sole purpose of implementing a product based on Integrated */
/* Systems, Inc. products. No other rights to reproduce, use, */
/* or disseminate this computer program, whether in part or in */
/* whole, are granted. */
/* */
/* Integrated Systems, Inc. makes no representation or warranties */
/* with respect to the performance of this computer program, and */
/* specifically disclaims any responsibility for any damages, */
/* special or consequential, connected with the use of this program. */
/* */
/***********************************************************************/
/* */
/* */
/* */
/***********************************************************************/
#if __cplusplus
extern "C" {
#endif
#ifndef _NS8390X_H
#define _NS8390X_H
/*---------------------------------------------------------------------*/
/* General Definitions */
/*---------------------------------------------------------------------*/
#define REG8(addr) *((volatile UCHAR *) addr)
#define REG16(addr) *((volatile USHORT *) addr)
#define REG32(addr) *((volatile ULONG *) addr)
#define NE_RESET 0x1F
/*---------------------------------------------------------------------*/
/* Primary register base addresses */
/*---------------------------------------------------------------------*/
#define LAN_NIC_BASE (lan_intfs[dev_num].lan_cfg->io_base)
#define LAN_STNIC_PORT 0x10
#define LAN_STNIC_DMA 0x20
#define LAN_STNIC_ACC 0x30
#define LAN_PAGE0 0x00
#define LAN_PAGE1 0x40
#define LAN_PAGE2 0x80
#define LAN_PBMASK 0xC0
#define LAN_ACC_MASK 0x01
/*---------------------------------------------------------------------*/
/* Page 0 - Register Definitions */
/*---------------------------------------------------------------------*/
/* Read/Write Registers */
#define LAN_PG0_CR (LAN_NIC_BASE + 0x00) /* Command register */
#define LAN_PG0_BNRY (LAN_NIC_BASE + 0x03) /* Boundary register */
#define LAN_PG0_ISR (LAN_NIC_BASE + 0x07) /* Interrupt status */
/* Read Only Registers */
#define LAN_PG0_CLDA0 (LAN_NIC_BASE + 0x01) /* Current local DMA reg 0*/
#define LAN_PG0_CLDA1 (LAN_NIC_BASE + 0x02) /* Current local DMA reg 1*/
#define LAN_PG0_TSR (LAN_NIC_BASE + 0x04) /* Transmit status reg */
#define LAN_PG0_NCR (LAN_NIC_BASE + 0x05) /* Number of collisions */
#define LAN_PG0_FIFO (LAN_NIC_BASE + 0x06) /* FIFO register */
#define LAN_PG0_CRDA0 (LAN_NIC_BASE + 0x08) /* Remote DMA addr reg 0 */
#define LAN_PG0_CRDA1 (LAN_NIC_BASE + 0x09) /* Remote DMA addr reg 1 */
#define LAN_PG0_RSR (LAN_NIC_BASE + 0x0C) /* Receive status reg */
#define LAN_PG0_CNTR0 (LAN_NIC_BASE + 0x0D) /* Frame align err cnt */
#define LAN_PG0_CNTR1 (LAN_NIC_BASE + 0x0E) /* CRC errors */
#define LAN_PG0_CNTR2 (LAN_NIC_BASE + 0x0F) /* Missed packets */
/* Write Only Registers */
#define LAN_PG0_PSTRT (LAN_NIC_BASE + 0x01) /* Receive page start */
#define LAN_PG0_PSTOP (LAN_NIC_BASE + 0x02) /* Receive page stop */
#define LAN_PG0_TPSR (LAN_NIC_BASE + 0x04) /* XMIT page start */
#define LAN_PG0_TBCR0 (LAN_NIC_BASE + 0x05) /* Low order byte count */
#define LAN_PG0_TBCR1 (LAN_NIC_BASE + 0x06) /* Hi order byte cnt */
#define LAN_PG0_RSAR0 (LAN_NIC_BASE + 0x08) /* Remote start address 0 */
#define LAN_PG0_RSAR1 (LAN_NIC_BASE + 0x09) /* Remote start address 1 */
#define LAN_PG0_RBCR0 (LAN_NIC_BASE + 0x0A) /* Remote byte count reg 0*/
#define LAN_PG0_RBCR1 (LAN_NIC_BASE + 0x0B) /* Remote byte count reg 1*/
#define LAN_PG0_RCR (LAN_NIC_BASE + 0x0C) /* Receive config reg */
#define LAN_PG0_TCR (LAN_NIC_BASE + 0x0D) /* Transmit config reg */
#define LAN_PG0_DCR (LAN_NIC_BASE + 0x0E) /* Data config reg */
#define LAN_PG0_IMR (LAN_NIC_BASE + 0x0F) /* Interrupt mask */
/*---------------------------------------------------------------------*/
/* Page 0 Command Register - Bit Definitions */
/*---------------------------------------------------------------------*/
#define LAN_PG0_CR_PS1 0x80 /* Page select bit 1 */
#define LAN_PG0_CR_PS0 0x40 /* Page select bit 0 */
#define LAN_PG0_CR_RD2 0x20 /* Remote DMA Cmd bit 2 */
#define LAN_PG0_CR_RD1 0x10 /* Remote DMA Cmd bit 1 */
#define LAN_PG0_CR_RD0 0x08 /* Remote DMA Cmd bit 0 */
#define LAN_PG0_CR_TXP 0x04 /* Transmit Packet */
#define LAN_PG0_CR_STA 0x02 /* Start NIC core */
#define LAN_PG0_CR_STP 0x01 /* Stop NIC core */
/*---------------------------------------------------------------------*/
/* Page 0 Interrupt Status Register - Bit Definitions */
/*---------------------------------------------------------------------*/
#define LAN_PG0_ISR_RST 0x80 /* Reset status */
#define LAN_PG0_ISR_RDC 0x40 /* Remote DMA complete */
#define LAN_PG0_ISR_CNT 0x20 /* Counter overflow */
#define LAN_PG0_ISR_OVW 0x10 /* Overwrite warning */
#define LAN_PG0_ISR_TXE 0x08 /* Transmit error */
#define LAN_PG0_ISR_RXE 0x04 /* Receive error */
#define LAN_PG0_ISR_PTX 0x02 /* Packet transmitted */
#define LAN_PG0_ISR_PRX 0x01 /* Packet received */
#define LAN_PG0_ISR_STAT (LAN_PG0_ISR_PRX | LAN_PG0_ISR_PTX | \
LAN_PG0_ISR_RXE | LAN_PG0_ISR_TXE | \
LAN_PG0_ISR_OVW)
/*---------------------------------------------------------------------*/
/* Page 0 Interrupt Mask Register - Bit Definitions */
/* Page 0 Data Configuration Register - Bits Definitions */
/*---------------------------------------------------------------------*/
#define LAN_PG0_IMR_RDCE 0x40 /* Remote DMA complete enb*/
#define LAN_PG0_IMR_CNTE 0x20 /* Counter overflow enable*/
#define LAN_PG0_IMR_OVWE 0x10 /* Overwrite warning enabl*/
#define LAN_PG0_IMR_TXEE 0x08 /* Transmit error enable */
#define LAN_PG0_IMR_RXEE 0x04 /* Recevie error enable */
#define LAN_PG0_IMR_PTXE 0x02 /* Packet Xmit enable */
#define LAN_PG0_IMR_PRXE 0x01 /* Packet received enable */
/*---------------------------------------------------------------------*/
/* Page 0 Data Configuration Register - Bits Definitions */
/*---------------------------------------------------------------------*/
#define LAN_PG0_DCR_FT1 0x40 /* Fifo threshold sel bit1*/
#define LAN_PG0_DCR_FT0 0x20 /* Fifo threshold sel bit0*/
#define LAN_PG0_DCR_FT2B 0x00 /* 2 bytes */
#define LAN_PG0_DCR_FT4B 0x20 /* 4 bytes */
#define LAN_PG0_DCR_FT8B 0x40 /* 8 bytes */
#define LAN_PG0_DCR_FT12B 0x60 /* 12 bytes */
#define LAN_PG0_DCR_ARM 0x10 /* Auto initialize remote */
#define LAN_PG0_DCR_LS 0x08 /* 0:Loopback sel 1:Normal*/
#define LAN_PG0_DCR_LAS 0x04 /* Long Address select */
#define LAN_PG0_DCR_BOS 0x02 /* Byte order select */
#define LAN_PG0_DCR_WTS 0x01 /* Word DMA transfers */
/*---------------------------------------------------------------------*/
/* Page 0 Transmit Configuration Register - Bit Definitions */
/*---------------------------------------------------------------------*/
#define LAN_PG0_TCR_OFST 0x10 /* Collision offset enable*/
#define LAN_PG0_TCR_ATD 0x08 /* Auto transmit disable */
#define LAN_PG0_TCR_LB1 0x04 /* Loopback control 1 */
#define LAN_PG0_TCR_LB0 0x02 /* Loopback control 0 */
#define LAN_PG0_TCR_LBM0 0x00 /* Normal mode */
#define LAN_PG0_TCR_LBM1 0x02 /* Internal NIC loopback */
#define LAN_PG0_TCR_LBM2 0x04 /* Internal ENDEC loopback*/
#define LAN_PG0_TCR_LBM3 0x06 /* Extrenal loopback */
#define LAN_PG0_TCR_CRC 0x01 /* CRC inhibited */
/*---------------------------------------------------------------------*/
/* Page 0 Transmit Status Register - Bit Definitions */
/*---------------------------------------------------------------------*/
#define LAN_PG0_TSR_OWC 0x80 /* Out of window collision*/
#define LAN_PG0_TSR_CDH 0x40 /* Collisn detect heartbet*/
#define LAN_PG0_TSR_FU 0x20 /* FIFO underrun */
#define LAN_PG0_TSR_CRS 0x10 /* Carrier Sense lost */
#define LAN_PG0_TSR_ABT 0x08 /* Transmit ended */
#define LAN_PG0_TSR_COL 0x04 /* Transmit collided */
#define LAN_PG0_TSR_PTXS 0x01 /* Transmit without error */
/*---------------------------------------------------------------------*/
/* Page 0 Receive Configuration Register - Bit Definitions */
/*---------------------------------------------------------------------*/
#define LAN_PG0_RCR_MMO 0x20 /* Monitor mode */
#define LAN_PG0_RCR_PRO 0x10 /* Promiscuous addressing */
#define LAN_PG0_RCR_AM 0x08 /* Accept multicast */
#define LAN_PG0_RCR_AB 0x04 /* Accept broadcast */
#define LAN_PG0_RCR_AR 0x02 /* Accept runt packets */
#define LAN_PG0_RCR_SEP 0x01 /* Save errored packets */
/*---------------------------------------------------------------------*/
/* Page 0 Receive Status Register - Bit Definitions */
/*---------------------------------------------------------------------*/
#define LAN_PG0_RSR_DFR 0x80 /* Collision */
#define LAN_PG0_RSR_DIS 0x40 /* Receiver disabled */
#define LAN_PG0_RSR_PHY 0x20 /* Physical Address match */
#define LAN_PG0_RSR_MPA 0x10 /* Missed packet */
#define LAN_PG0_RSR_FO 0x08 /* FIFO Overrun */
#define LAN_PG0_RSR_FAE 0x04 /* Frame alignment error */
#define LAN_PG0_RSR_CRCE 0x02 /* CRC error */
#define LAN_PG0_RSR_PRXS 0x01 /* Packet received intact */
/*---------------------------------------------------------------------*/
/* Page 1 Register Offsets */
/*---------------------------------------------------------------------*/
#define LAN_PG1_PAR0 (LAN_NIC_BASE + 0x01) /* Physical address regs */
#define LAN_PG1_PAR1 (LAN_NIC_BASE + 0x02)
#define LAN_PG1_PAR2 (LAN_NIC_BASE + 0x03)
#define LAN_PG1_PAR3 (LAN_NIC_BASE + 0x04)
#define LAN_PG1_PAR4 (LAN_NIC_BASE + 0x05)
#define LAN_PG1_PAR5 (LAN_NIC_BASE + 0x06)
#define LAN_PG1_CURR (LAN_NIC_BASE + 0x07) /* Current page register */
#define LAN_PG1_MAR0 (LAN_NIC_BASE + 0x08) /* Multicast address regs */
#define LAN_PG1_MAR1 (LAN_NIC_BASE + 0x09)
#define LAN_PG1_MAR2 (LAN_NIC_BASE + 0x0A)
#define LAN_PG1_MAR3 (LAN_NIC_BASE + 0x0B)
#define LAN_PG1_MAR4 (LAN_NIC_BASE + 0x0C)
#define LAN_PG1_MAR5 (LAN_NIC_BASE + 0x0D)
#define LAN_PG1_MAR6 (LAN_NIC_BASE + 0x0E)
#define LAN_PG1_MAR7 (LAN_NIC_BASE + 0x0F)
/*---------------------------------------------------------------------*/
/* Lan interface description used by MIB II. A mandatory definition. */
/*---------------------------------------------------------------------*/
#define IFDESCR "NE2000 Compatible LAN controller"
#endif /* _NS8390X_H */
#if __cplusplus
}
#endif
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -