📄 sy12.lst
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* M16C FAMILY ASSEMBLER * SOURCE LIST Tue Mar 29 13:42:07 2005 PAGE 001
SEQ. LOC. OBJ. 0XMSDA ....*....SOURCE STATEMENT....7....*....8....*....9....*....0....*....1....*....2....*....3....*....4
1 ;****************************************************************
2 ;* *
3 ;* SAMPLE PROGRAM : 1 SEC COUNTER *
4 ;* FILE NAME : SAMP0.A30 *
5 ;* FUNCTION : SW1 => COUNTER START *
6 ;* SW2 => COUNTER STOP *
7 ;* SW3 => COUNTER CLEAR *
8 ;* *
9 ;****************************************************************
10
11 ;---------- INCLUDE OF SFR FILE ----------
12 ;
13 .list off ; don't draw up a prpgram list
14 .list on ; draw up a program list
15 ;
16 ;---------- DEFINE OF SYMBOLS ----------
17 ;
18 00000400h VramTOP .equ 000400H ; top address of internal RAM
19 00002BFFh VramEND .equ 002BFFH ; end address of internal RAM
20 00002C00h VIstack .equ 002C00H ; stack pointer
21 000F0000h VprogTOP .equ 0F0000H ; top address of program area
22 000FA000h Vintbase .equ 0FA000H ; top address of variable vector table
23 000FFFDCh Vvector .equ 0FFFDCH ; top address of fixed vector table
24 00000380h SB_base .equ 000380H ; base address of SB recative
25 ;
26 ;---------- KEEP OF RAM AREA ----------
27 ;
28 .section memory,data
29 00400 .org VramTOP
30 ;
31 00400(000002H) LED: .blkb 2 ; LED display data
32 00402(000001H) Tsec: .blkb 1 ; sec buffer
33 00403(000001H) Fdig: .blkb 1
34 00404(000001H) sw_in: .blkb 1 ; start-stop buffer
35 00405(000001H) cnt_clr: .blkb 1 ; count clear buffer
36 ;
37 .section prog,code
38 F0000 .org VprogTOP
39 .sb SB_base ; assings aprovisional SB register value
40 .sbsym LED ; place data in SB addressing mode
41 .sbsym Tsec ; place data in SB addressing mode
42 .sbsym Fdig ; place data in SB addressing mode
43 ;
44 ;---------- CLEAR OF RAM ----------
45 ;
46 F0000 reset:
47 F0000 EB40002C ldc #VIstack,ISP ; set Interrupt Stack Pointer
48 F0004 EB608003 ldc #SB_base,SB ; set SB register
49 ; ldintb #Vintbase ; set Interrupt TaBle register
50 ;
51 F0008 D900 Q mov.w #0,r0 ; 0 clear
52 F000A 75C30014 mov.w #(VramEND+1-VramTOP)/2,r3 ; number of times
53 F000E AA0004 S mov.w #VramTOP,a1 ; start address
54 F0011 7DEA sstr.w
55 ;
56 ;---------- INITIALLIZE ----------
57 ;
58 F0013 EB200F00 LDINTB #USER_vector_table
EB1000A0
59
60 F001B D9FA62 Q* mov.w #0FFFFH,pd0 ; P0,P1 output set
61 ;
* M16C FAMILY ASSEMBLER * SOURCE LIST Tue Mar 29 13:42:07 2005 PAGE 002
SEQ. LOC. OBJ. 0XMSDA ....*....SOURCE STATEMENT....7....*....8....*....9....*....0....*....1....*....2....*....3....*....4
62 F001E C7064E00 S mov.b #00000110B,adic ; A-D Interrupt control reg set
63
64 F0022 C7065D00 S mov.b #00000110B,int0ic ; INT0 Interrupt control reg set
65
66 F0026 C7065E00 S mov.b #00000110B,int1ic ; INT1 Interrupt control reg set
67
68 F002A B75500 Z mov.b #00000000B,ta0ic ; TIMER A0 Interrupt control reg set
69 F002D C58016 S* mov.b #80H,ta0mr ; f1*32 = 2 usec
70 F0030 75CA06E803 * mov.w #1000,ta0 ; make 2 msec
71 F0035 4800 S* bset ta0s ; TIMER A0 start
72 F0037 EB64 fset i
73
74 ;---------- A-D CONVERTER ----------
75 F0039 C50154 S* mov.b #01H,adcon2 ; A-D register 2
76 F003C C5A056 S* mov.b #0A0H,adcon0 ; A-D register 0
77 F003F C52057 S* mov.b #20H,adcon1 ; A-D register 1
78 F0042 4E56 S* bset adst ; A-D conversion start
79 ;
80 ;---------- MAIN PROGRAM ----------
81 ;
82 F0044 main:
83 F0044 75C0F401 mov.w #500,r0 ; 500 => r0
84 F0048 check:
85 F0048 7E0FAB02 btstc 3,ta0ic ; 2 msec?
86 F004C 6CFB jnc check ; return
87 F004E F56300 W jsr display ; subroutine display
88 F0051 F9F0F5 sbjnz.w #1,r0,check ; 1sec?
89 F0054 F52A00 W jsr timer ; subroutine timer
90 F0057 FEEC B jmp main
91
92 F0059 delay:
93 F0059 75C13200 mov.w #50,r1
94 F005D F9F1FE loop: sbjnz.w #1,r1,loop
95 F0060 F3 rts
96 ;
97 ;---------- SWITCH CHECK ----------
98 ;
99 F0061 sw_int1:
100 ;========== start ==========
101 F0061 EB64 fset i
102 F0063 F5F5FF W jsr delay
103 F0066 5B70 S* btst 3,p8
104 F0068 680A jc sw1
105 F006A E50184 S* cmp.b #1,sw_in
106 F006D DD008401 * stzx #0,#1,sw_in ; sw_in flag 1 set(start)
107 F0071 B585 Z* mov.b #0,cnt_clr ; sw_in flag clear
108 F0073 FB sw1: reit
109
110 F0074 sw_int0:
111 ;========== stop ==========
112 F0074 EB64 fset i
113 F0076 B584 Z* mov.b #0,sw_in ; sw_in flag clear(stop)
114 F0078 FB reit
115
116 F0079 sw_adtrg:
117 ;========== clear ==========
118 F0079 EB64 fset i
119 F007B C50185 S* mov.b #1,cnt_clr ; timer count flag on
120 F007E FB reit
121 ;
122 ;---------- TIMER COUNT ----------
123 ;
* M16C FAMILY ASSEMBLER * SOURCE LIST Tue Mar 29 13:42:07 2005 PAGE 003
SEQ. LOC. OBJ. 0XMSDA ....*....SOURCE STATEMENT....7....*....8....*....9....*....0....*....1....*....2....*....3....*....4
124 F007F timer:
125 F007F 82 S push.b r0l
126 F0080 E50184 S* cmp.b #1,sw_in ; sw_in - 1(start?)
127 F0083 6E1B jnz timer_end ; jump not ZERO
128 F0085 0982 S* mov.b Tsec,r0l ; Tsec => r0l
129 F0087 7CEC01 dadd.b #1,r0l ; 1sec count up
130 F008A 0182 S* mov.b r0l,Tsec ; r0l => Tsec
131 F008C E50185 S* cmp.b #1,cnt_clr
132 F008F CD0082 * stz #00,Tsec
133 F0092 CD0084 * stz #0,sw_in ; sw_in flag clear(stop)
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