sysinit.s

一个在ARM上通用的IIC的程序,已经测试用过了,

	INCLUDE	s3c4510.inc
	
SFR_BASE	EQU	0x3ff	;0x3ff0000
SRAM_BASE	EQU	0x3f8	;0x3f80000
EXT_IO_BASE	EQU	0x360	;0x3600000

NOT_PERMITTED	EQU	0
WIDTH_8			EQU	1
WIDTH_16		EQU	2
WIDTH_32		EQU	3

DSR0	EQU	NOT_PERMITTED
DSR1	EQU	(NOT_PERMITTED<<2)
DSR2	EQU	(NOT_PERMITTED<<4)
DSR3	EQU	(NOT_PERMITTED<<6)
DSR4	EQU	(NOT_PERMITTED<<8)
DSR5	EQU	(NOT_PERMITTED<<10)

DSD0	EQU	(WIDTH_32<<12)
DSD1	EQU	(NOT_PERMITTED<<14)
DSD2	EQU	(NOT_PERMITTED<<16)
DSD3	EQU	(NOT_PERMITTED<<18)
DSX0	EQU	(NOT_PERMITTED<<20)
DSX1	EQU	(WIDTH_16<<22)
DSX2	EQU	(NOT_PERMITTED<<24)
DSX3	EQU	(NOT_PERMITTED<<26)

ROM0_BASE	EQU	(0<<10)
ROM0_END	EQU	(0x20<<20)
ROM1_BASE	EQU	(0<<10)
ROM1_END	EQU	(0<<20)
ROM2_BASE	EQU	(0<<10)
ROM2_END	EQU	(0<<20)
ROM3_BASE	EQU	(0<<10)
ROM3_END	EQU	(0<<20)
ROM4_BASE	EQU	(0<<10)
ROM4_END	EQU	(0<<20)
ROM5_BASE	EQU	(0<<10)
ROM5_END	EQU	(0<<20)
DRAM0_BASE	EQU	(0x100<<10)
DRAM0_END	EQU	(0x200<<20)
DRAM1_BASE	EQU	(0<<10)
DRAM1_END	EQU	(0<<20)
DRAM2_BASE	EQU	(0<<10)
DRAM2_END	EQU	(0<<20)
DRAM3_BASE	EQU	(0<<10)
DRAM3_END	EQU	(0<<20)
	
RomBaseAddr	EQU		0
RomEndAddr	EQU		&20
RamBaseAddr	EQU		&100
RamEndAddr	EQU		&200

ROM0_RMAP_BASE	EQU	(0x100<<10)
ROM0_RMAP_END	EQU	(0x120<<20)
DRAM0_RMAP_BASE	EQU	(0<<10)
DRAM0_RMAP_END	EQU	(0x100<<20)


	INCLUDE	../src/vector.s	
;	AREA	reset, CODE, READONLY
	
MemCfgPara
	DCD	ROM0_END|ROM0_BASE|&60	;&10840060
	DCD	ROM1_END|ROM1_BASE|0
	DCD	ROM2_END|ROM2_BASE|0
	DCD	ROM3_END|ROM3_BASE|0
	DCD	ROM4_END|ROM4_BASE|0
	DCD	ROM5_END|ROM5_BASE|0
	DCD	DRAM0_END|DRAM0_BASE|&398	;&10000398
	DCD	&10040398
	DCD	&10040398
	DCD	&10040398
	DCD	&ce298360	;external io base 0x3600000
	
RemapMemPara
	DCD	ROM0_RMAP_END|ROM0_RMAP_BASE|&60
	DCD	ROM1_END|ROM1_BASE|0
	DCD	ROM2_END|ROM2_BASE|0
	DCD	ROM3_END|ROM3_BASE|0
	DCD	ROM4_END|ROM4_BASE|0
	DCD	ROM5_END|ROM5_BASE|0
	DCD	&10000398
	DCD	&10040398
	DCD	&10040398
	DCD	&10040398
	DCD	&ce298360
	
ResetMemPara
	DCD	&20000060
	DCD	&00000060
	DCD	&00000060
	DCD	&00000060
	DCD	&00000060
	DCD	&00000060
	DCD	&00000000
	DCD	&00000000
	DCD	&00000000
	DCD	&00000000
	DCD	&000083fd
	
;	EXPORT	InitSystem
InitSystem

	ldr	r0, =INTMSK
	ldr	r1, =0x3fffff
	str	r1, [r0]		;disable all interrupt
	
	;设置SYSFG，[25：16]特殊功能寄存器组的基指针，该设置值左移16位即为特殊功能寄存器组的起始物理地址
	ldr	r0, =SYSCFG
	ldr	r1, =SDRAM_ITF :OR: SFR_BASE<<16 :OR: SRAM_BASE<<6 :OR: CACHE_ALL; :OR: CACHE_EN :OR: WRITE_BUF
	str	r1, [r0]
	;设置时钟控制器
	ldr	r0, =CLKCON
	ldr	r1, =0
	str	r1, [r0]
	;外部I/O访问控制寄存器
	ldr	r0, =EXTACON0
	ldr	r1, =0x0fff0fff
	str	r1, [r0]
	ldr	r0, =EXTACON1
	ldr	r1, =0x0fff0fff
	str	r1, [r0]
	;数据总线宽度寄存器
	ldr	r0, =EXTDBWTH
	ldr	r1, =DSX3|DSX2|DSX1|DSX0|DSD3|DSD2|DSD1|DSD0|DSR5|DSR4|DSR3|DSR2|DSR1|DSR0
	str r1, [r0]
	GBLL DEBUG
	IF :DEF: DEBUG
	ELSE
	IF :DEF: RAM_VERSION
	ELSE
	adr	r0, MemCfgPara	
	ldmia	r0, {r1-r11}
	ldr	r0, =ROMCON0	
	stmia	r0, {r1-r11}
	;将FLASH中的代码全部COPY到SDRAM中
	mov	r0, #0
	mov	r1, #(RomEndAddr<<16)
	mov	r2, #(RamBaseAddr<<16)
0
	ldmia	r0!, {r4-r11}
	stmia	r2!, {r4-r11}
	cmp	r0, r1
	bcc	%B0
	;REMAP，SDRAM 0-16M，FLASH 16-18M
	adr	r0, RemapMemPara	
	ldmia	r0, {r1-r11}
	ldr	r0, =ROMCON0	
	stmia	r0, {r1-r11}

	ENDIF
    ENDIF

	;ldr	r0, =IrqSvcVector
	;ldr	r1, =IRQ_SERVICE		
	;str	r1, [r0]		;在copy完后设置
	
	b	InitSystem_exit

;**************************************************************
;IRQ中断处理程序，主要获得IRQ子中断源的处理程序地址，并调入执行它
;**************************************************************
;EXPORT	IRQ_SERVICE
       
;IRQ_SERVICE				;using I_ISPR register.		   	
			;nop
			;ldr	r0, =TMOD
			;ldr	r1,	[r0]
			;and	r1,	r1, #&37
			;str	r1, [r0]
			
        
  ;      STMFD sp!, {r0-r12, lr}
  ;     BL ISR_IrqHandler
  ;      LDMFD sp!, {r0-r12, lr}
  ;      SUBS pc, lr, #4
        
							
;ldr	r4, =INTOFFSET;INTOFFSET中断偏移地址
;  	ldr	r4, [r4]
;  	mov	r1, r4, lsr #2
;  	mov	r0, #1
;  	mov	r0, r0, lsl r1
;  	ldr	r1, =INTPND
;  	str	r0, [r1]		;clear interrupt pending bit
;  	ldr	r1, =pIrqStart
;  	ldr	r1, [r1]
;  	cmp	r1, #0
;  	movne	lr, pc		; .+8
;  	movne	pc, r1    		    	        	
	
;mov	r0, r4, lsr #2
;  	ldr	r1, =pIrqHandler
;  	ldr	r1, [r1]
;  	cmp	r1, #0
;  	movne	lr, pc
;  	movne	pc, r1     	    	   	
	
;ldr	r1, =pIrqFinish
;ldr	r1, [r1]
;cmp	r1, #0
;movne	lr, pc		; .+8
;movne	pc, r1
;cmp	r0, #0
;movne	lr, pc
;movne	pc, r0 					
	
;ldmfd	sp!, {r0}	;从IRQ返回
;msr	spsr_cxsf, r0
;ldmfd	sp!, {r0-r12, pc}^

;**************************************************************	
DRAM_END	EQU	0x01000000

	AREA RamData, DATA, READWRITE

	^	(DRAM_END - 0x800)
UserStack	#	256
SVCStack	#	256
UndefStack	#	256
AbortStack	#	256
IRQStack	#	256
FIQStack	#	256
	EXPORT	UserStack
	EXPORT	SVCStack
	EXPORT	UndefStack
	EXPORT	AbortStack
	EXPORT	IRQStack
	EXPORT	FIQStack

	MAP	(DRAM_END - 0x100)
SysRstVector	#	4	
UdfInsVector	#	4	
SwiSvcVector	#	4
InsAbtVector	#	4
DatAbtVector	#	4
ReservedVector	#	4
IrqSvcVector	#	4
FiqSvcVector	#	4
	EXPORT	SysRstVector
	EXPORT	UdfInsVector
	EXPORT	SwiSvcVector
	EXPORT	InsAbtVector
	EXPORT	DatAbtVector
	EXPORT	ReservedVector
	EXPORT	IrqSvcVector
	EXPORT	FiqSvcVector
	
	MAP	(DRAM_END - 0xe0)	
;****************************
;add by chang
;****************************	



	MAP	(DRAM_END - 0x20)
;pIrqStart		#	4
;pIrqHandler		#	4
;pIrqFinish		#	4
;	EXPORT	pIrqStart
;	EXPORT	pIrqHandler
;	EXPORT	pIrqFinish
	
;**************************************************************
	
	END