main.c

SPWM三相波形发生器

/***************************************************************
程序程序：SPWM通信程序
功能描述：
该程序是基于AT89C51RD2的SPWM通信程序，用于完成精确电源控制。
****************************************************************/

#include <reg51.h>
#include <absacc.h>

#define uchar	unsigned char
#define	uint	unsigned int

//sfr 	WMCON   = 0x96;     /* Watchdog and Memory Control Register */
//#define 	WDTC() (WMCON |= 0x02)


#define		DEF_INT_EX0				0
#define		DEF_INT_TIME0			1
#define		DEF_INT_EX1				2
#define		DEF_INT_TIME1			3
#define		DEF_INT_ASYNC			4
#define		TIMER2_VECTOR_NUMBER	5

/***********************************
AD3 AD2 AD1 AD0 REGISTER
 0   0   0    0    R0
 0   0   0    1    R1
 0   0   1    0    R2
 0   0   1    1    R3
 0   1   0    0    R4
 0   1   0    1    R5
 1   1   1    0    R14
 1   1   1    1    R15
************************************/

#define		SPWM_R0		XBYTE[0XFFF0]
#define 	SPWM_R1		XBYTE[0XFFF1]
#define		SPWM_R2		XBYTE[0XFFF2]
#define		SPWM_R3		XBYTE[0XFFF3]
#define		SPWM_R4 	XBYTE[0XFFF4]
#define		SPWM_R5		XBYTE[0XFFF5]
#define		SPWM_R14	XBYTE[0XFFFE]
#define		SPWM_R15	XBYTE[0XFFFF]


void 	Spwm_Init(void);
void	Spwm_Control(void);

//-----Public Variable declare----
//unsigned long  data		SYSTIME ;
//unsigned long  data		TempCount;

/***************************
***get current SYSTIME value.
****************************/
//unsigned long GET_COUNT()
//{
//	unsigned long	tempcount;
//	ET2 = 0;
//	tempcount = SYSTIME;
//	ET2 = 1;
//	return tempcount;
//}

/*************************
Timer 2 interval 10 ms 
**************************/
//void timer2() interrupt TIMER2_VECTOR_NUMBER
//{
//	TF2 = 0;
//	SYSTIME ++;
//}

/*************************
函数名称：Delay(uint x)
函数功能：延时  x * 10 ms,最长65535 * 10 ms
**************************/
/*void Delay(uint x)
{
	unsigned long	CT;
//	CT = GET_COUNT();
	while(GET_COUNT() - CT < x) 
	{	
//		WDTC();
//		PCON = PCON | 0x01;
	}
}*/
void Delay(unsigned int x)
{
	unsigned char j;
	while(x--)
	{for(j=0;j<125;j++)
		{;}
	}
}
/*void  _SysInit(void)
{
    EA = 0;
    IT1 = 0x01;
//	RCAP2H = 0xDC;	//11.0592M
//	RCAP2L = 0x00;
	RCAP2H = 0xe8;	//7.3728
	RCAP2L = 0x00;
	TH2 = 0xDC;
	TL2 = 0x00;
	TR2 = 1;
	ET2 = 1;
    EA = 1;
}*/
/*************************
初始化函数：Spwm_Init()
**********************************************************************
		7		6     	 5 		4  	 	 3 		  2  	  1		   0
 
R0    FRS2		FRS1	FRS0	X		X		CFS2	CFS1	CFS0
 
R1      X       PDT6    PDT5 	PDT4	PDT3	PDT2	PDT1	PDT0

R2 		X		X		PDY5	PDY4	PDY3	PDY2	PDY1	PDY0	

R3		X 		X		AC		O 		O    	X 		WS1		WS0

R4 		WD15	WD14	WD13	WD12	WD11	WD10	WD9	 	WD8

R5 		WD7		WD6		WD5		WD4		WD3		WD2		WD1		WD0

**************************/
void 	Spwm_Init()
{
	SPWM_R0 	=0x82;//100  010
/**********************************************************************
Carrier Frequency (CFS)
Defines the frequency of the triangular waveform to which
the power waveform is compared
The carrier frequency, fCARR, is then given by:
fCARR =
fCLK/512 x 2的（N+1）次方(n=0--7)
where fCLK = clock input frequency.
**********************************************************************
Power Frequency Range (FRS)
In order to optimise the frequency resolution of the SA4828,
the required range of power frequencies may be selected using
this parameter. Within the selected range, the frequency may
be set with 16-bit resolution.
The power frequency range, fRANGE, is then given by:
fRANGE =fCARR*2 的N 次方/384   （N=0--6）
where fCARR = carrier frequency
***********************************************************************/
	SPWM_R1		=  	0x50;//1010000
/**********************************************************************
Pulse Delay Time (Underlap) (PDY)
The pulse delay time, tpdy, is then given by:
Tpty = (63-PDY)/fCARR*512  (PDY=0--63)
where fCARR = carrier frequency.
***********************************************************************/
	SPWM_R2		= 	0x2f;
/**********************************************************************
Pulse Deletion Time (PDT)
To eliminate short pulses the true PWM train is passed
through a pulse deletion circuit. The pulse deletion circuit compares
pulse widths with the pulse deletion time set in the Initialisation 
Register.
The pulse deletion time, tpd, is then given by:
Tpd =	(127-PDT)/fCARR*512  (PDT=0--127)
where fCARR = carrier frequency.
***********************************************************************/
	SPWM_R3		=	0x01;//00000001
/**********************************************************************
WS1		WS0		Waveform
0		0		Sinusoid (default)
0		1		Triplen (harmonic injection)
1		0		Deadbanded Triplen (switching loss reduction)
1		1		Reserved
Amplitude Control (AC)
which controls
the amplitude control mode for each of the three phases.
When the AC bit is cleared the red Amplitude byte in the Control
Register is used to define the amplitude of all three phases.
When the AC bit is set, the individual Amplitude bytes, Red,
Yellow and Blue in the Control Register are used to define the
amplitudes of the respective phases.
***********************************************************************/
	SPWM_R4		=	0x00;
	SPWM_R5		=	0x00;
/**********************************************************************
Watchdog Timer (WD)
The Watchdog Timer consists of a 16-bit programmable
counter, which is decremented at a sub-multiple of the fCLK frequency.
If the counter is allowed to reach its terminal condition(time-out), 
then the PWM outputs are set to the off (low) state
and the TRIP output asserted low.
The time-out period twd, is given by the formula:
Twd=TIM*1024/fCLK  (TIM=0--65535 )
**********************************************************************/
	SPWM_R14  	= 	0x00;	
}

/*************************
CONTROL REGISTER FUNCTIONS
**********************************************************************
		7		6     	 5 		 4  	 3 		  2  	  1		 0
 
R0    PFS7		PFS6	PFS5	PFS4	PFS3	PFS2	PFS1	PFS0
 
R1    PFS15     PFS14   PFS13	PFS12	PFS11	PFS10	PFS9	PFS8

R2 	   RST		 X		X   	X   	WTE  	 /CR	 /INH	/F\R	

R3	  RAMP7 	RAMP6	RAMP5	RAMP4	RAMP3	RAMP2	RAMP1	RAMP0

R4 	  BAMP7 	BAMP6	BAMP5	BAMP4	BAMP3	BAMP2	BAMP1	BAMP0

R5 	  YAMP7 	YAMP6	YAMP5	YAMP4	YAMP3	YAMP2	YAMP1	YAMP0

**************************/


void	Spwm_Control()
{
	SPWM_R0 	=0x66;//01100110
	SPWM_R1		=0x66;//01100110
/**********************************************************************
Power Frequency (PFS)
The power frequency ( fPOWER) is given by:
fPOWER	= 	fRANGE*PFS/65536
COUNTER RESET BIT
where PFS = decimal value of the 16-bit PFS word and 
fRANGE = power frequency range set in the Initialisation Register.
**********************************************************************/
	SPWM_R2		=	0x06;//00000110
/**********************************************************************
R2 	   RST		 X		X   	X   	WTE  	 /CR	 /INH	/F\R
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Forward/Reverse (F/R)
The phase sequence of the three-phase PWM output waveforms
is controlled by the Forward/Reverse bit F/R.
In the forward mode the output phase sequence is red-yellow-
blue and in the reverse mode the sequence is blue-yellow_red.
Power Frequency (PFS)
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Output Inhibit ( /INH)
When active (i.e., low) the output inhibit bit INH sets all the
PWM outputs to the off (low) state. 
No other internal operation
of the device is affected. When the inhibit is released, the phase
bottom outputs are driven high for a whole carrier cycle before
the phase top outputs are enabled. This allows time for the capacitors
in bootstrap drive circuits to be charged.
++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Counter Reset (/CR)
This facility allows the internal power frequency phase counter
to be set to 0° (red phase) while Counter Reset (CR) is low.
Normal frequency control is suspended; the red phase outputs
have 50% duty cycle and yellow and blue phases have duty
cycles corresponding to +120° and -120