c8051f040.h

keil7.02.rar

/*--------------------------------------------------------------------------
C8051F040.H

Header file for Cygnal C8051F040/F041/F042/F043
Copyright (c) 1988-2002 Keil Elektronik GmbH and Keil Software, Inc.
All rights reserved.
--------------------------------------------------------------------------*/

#ifndef __C8051F040_H__
#define __C8051F040_H__

/*  BYTE Registers  */
sfr ACC       = 0xE0;               /*SFR Page: All */
sfr ADC0CF    = 0xBC;               /*SFR Page: 0 ADC0 Configuration */
sfr ADC0CN    = 0xE8;               /*SFR Page: 0 ADC0 Control */
sfr ADC0GTH   = 0xC5;               /*SFR Page: 0 ADC0 Greater-Than High */
sfr ADC0GTL   = 0xC4;               /*SFR Page: 0 ADC0 Greater-Than Low */
sfr ADC0H     = 0xBF;               /*SFR Page: 0 ADC0DataWordHigh */
sfr ADC0L     = 0xBE;               /*SFR Page: 0 ADC0DataWordLow */
sfr ADC0LTH   = 0xC7;               /*SFR Page: 0 ADC0 Less-Than High */
sfr ADC0LTL   = 0xC6;               /*SFR Page: 0 ADC0 Less-Than Low */
sfr ADC2      = 0xBE;               /*SFR Page: 2 ADC2Data Word */
sfr ADC2CF    = 0xBC;               /*SFR Page: 2 ADC2 Analog Multiplexer Configuration */
sfr ADC2CN    = 0xE8;               /*SFR Page: 2 ADC2 Control */
sfr ADC2GT    = 0xC4;               /*SFR Page: 1 ADC2 Window Comparator Greater-Than */
sfr ADC2LT    = 0xC6;               /*SFR Page: 1 ADC2 Window Comparator Less-Than */
sfr AMX0CF    = 0xBA;               /*SFR Page: 0 ADC0 Multiplexer Configuration */
sfr AMX0PRT   = 0xBD;               /*SFR Page: 0 ADC0 Port 3 I/O in Select */
sfr AMX0SL    = 0xBB;               /*SFR Page: 0 ADC0 Multiplexer Channel Select */
sfr AMX2SL    = 0xBB;               /*SFR Page: 2 ADC2 Analog Multiplexer Channel Select */
sfr B         = 0xF0;               /*SFR Page: All */
sfr CAN0ADR   = 0xDA;               /*SFR Page: 1 CAN0 Address */
sfr CAN0CN    = 0xF8;               /*SFR Page: 1 CAN0 Control */
sfr CAN0DATH  = 0xD9;               /*SFR Page: 1 CAN0 Data Register High */
sfr CAN0DATL  = 0xD8;               /*SFR Page: 1 CAN0 Data Register Low */
sfr CAN0STA   = 0xC0;               /*SFR Page: 1 CAN0 Status */
sfr CAN0TST   = 0xDB;               /*SFR Page: 1 CAN0 Test Register */
sfr CKCON     = 0x8E;               /*SFR Page: 0 Clock Control */
sfr CLKSEL    = 0x97;               /*SFR Page: F Oscillator Clock Selection Register */
sfr CPT0MD    = 0x89;               /*SFR Page: 1 Comparator 0 Mode Selection */
sfr CPT1MD    = 0x89;               /*SFR Page: 2 Comparator 1 Mode Selection */
sfr CPT2MD    = 0x89;               /*SFR Page: 3 Comparator 2 Mode Selection */
sfr CPT0CN    = 0x88;               /*SFR Page: 1 Comparator 0 Control */
sfr CPT1CN    = 0x88;               /*SFR Page: 2 Comparator 1 Control */
sfr CPT2CN    = 0x88;               /*SFR Page: 3 Comparator 2 Control */
sfr DAC0CN    = 0xD4;               /*SFR Page: 0 DAC0 Control */
sfr DAC0H     = 0xD3;               /*SFR Page: 0 DAC0 High */
sfr DAC0L     = 0xD2;               /*SFR Page: 0 DAC0 Low */
sfr DAC1CN    = 0xD4;               /*SFR Page: 1 DAC1 Control */
sfr DAC1H     = 0xD3;               /*SFR Page: 1 DAC1 High Byte */
sfr DAC1L     = 0xD2;               /*SFR Page: 1 DAC1 Low Byte */
sfr DPH       = 0x83;               /*SFR Page: All */
sfr DPL       = 0x82;               /*SFR Page: All */
sfr EIE1      = 0xE6;               /*SFR Page: All */
sfr EIE2      = 0xE7;               /*SFR Page: All */
sfr EIP1      = 0xF6;               /*SFR Page: All */
sfr EIP2      = 0xF7;               /*SFR Page: All */
sfr EMI0CF    = 0xA3;               /*SFR Page: 0 EMIF Configuration */
sfr EMI0CN    = 0xA2;               /*SFR Page: 0 External Memory Interface Control */
sfr EMI0TC    = 0xA1;               /*SFR Page: 0 EMIF Timing Control */
sfr FLACL     = 0xB7;               /*SFR Page: F FLASH Access Limit */
sfr FLSCL     = 0xB7;               /*SFR Page: 0 FLASH Scale */
sfr HVA0CN    = 0xD6;               /*SFR Page: 0 High Voltage Differential Amp Control */
sfr IE        = 0xA8;               /*SFR Page: All */
sfr IP        = 0xB8;               /*SFR Page: All */
sfr OSCICL    = 0x8B;               /*SFR Page: F Internal Oscillator Calibration */
sfr OSCICN    = 0x8A;               /*SFR Page: F Internal Oscillator Control */
sfr OSCXCN    = 0x8C;               /*SFR Page: F External Oscillator Control */
sfr P0        = 0x80;               /*SFR Page: All */
sfr P0MDOUT   = 0xA4;               /*SFR Page: F Port 0 Output Mode Configuration */
sfr P1        = 0x90;               /*SFR Page: All */
sfr P1MDIN    = 0xAD;               /*SFR Page: F Port 1 Input Mode Configuration */
sfr P1MDOUT   = 0xA5;               /*SFR Page: F Port 1 Output Mode Configuration */
sfr P2        = 0xA0;               /*SFR Page: All */
sfr P2MDIN    = 0xAE;               /*SFR Page: F Port 2 Input Mode Configuration */
sfr P2MDOUT   = 0xA6;               /*SFR Page: F Port 2 Output Mode Configuration */
sfr P3        = 0xB0;               /*SFR Page: All */
sfr P3MDIN    = 0xAF;               /*SFR Page: F Port 3 Input Mode Configuration */
sfr P3MDOUT   = 0xA7;               /*SFR Page: F Port 3 Output Mode Configuration */
sfr P4        = 0xC8;               /*SFR Page: F Port 4 Latch */
sfr P4MDOUT   = 0x9C;               /*SFR Page: F Port 4 Output Mode Configuration */
sfr P5        = 0xD8;               /*SFR Page: F Port 5 Latch */
sfr P5MDOUT   = 0x9D;               /*SFR Page: F Port 5 Output Mode Configuration */
sfr P6        = 0xE8;               /*SFR Page: F Port 6 Latch */
sfr P6MDOUT   = 0x9E;               /*SFR Page: F Port 6 Output Mode Configuration */
sfr P7        = 0xF8;               /*SFR Page: F Port 7 Latch */
sfr P7MDOUT   = 0x9F;               /*SFR Page: F Port 7 Output Mode Configuration */
sfr PCA0CN    = 0xD8;               /*SFR Page: 0 CA Control */
sfr PCA0CPH0  = 0xFC;               /*SFR Page: 0 PCA Capture 0 High */
sfr PCA0CPH1  = 0xFE;               /*SFR Page: 0 PCA Capture 1 High */
sfr PCA0CPH2  = 0xEA;               /*SFR Page: 0 PCA Capture 2 High */
sfr PCA0CPH3  = 0xEC;               /*SFR Page: 0 PCA Capture 3 High */
sfr PCA0CPH4  = 0xEE;               /*SFR Page: 0 PCA Capture 4 High */
sfr PCA0CPH5  = 0xE2;               /*SFR Page: 0 PCA Capture 5 High */
sfr PCA0CPL0  = 0xFB;               /*SFR Page: 0 PCA Capture 0 Low */
sfr PCA0CPL1  = 0xFD;               /*SFR Page: 0 PCA Capture 1 Low */
sfr PCA0CPL2  = 0xE9;               /*SFR Page: 0 PCA Capture 2 Low */
sfr PCA0CPL3  = 0xEB;               /*SFR Page: 0 PCA Capture 3 Low */
sfr PCA0CPL4  = 0xED;               /*SFR Page: 0 PCA Capture 4 Low */
sfr PCA0CPL5  = 0xE1;               /*SFR Page: 0 PCA Capture 5 Low */
sfr PCA0CPM0  = 0xDA;               /*SFR Page: 0 PCA Module 0 Mode Register */
sfr PCA0CPM1  = 0xDB;               /*SFR Page: 0 PCA Module 1 Mode Register */
sfr PCA0CPM2  = 0xDC;               /*SFR Page: 0 PCA Module 2 Mode Register */
sfr PCA0CPM3  = 0xDD;               /*SFR Page: 0 PCA Module 3 Mode Register */
sfr PCA0CPM4  = 0xDE;               /*SFR Page: 0 PCA Module 4 Mode Register */
sfr PCA0CPM5  = 0xDF;               /*SFR Page: 0 PCA Module 5 Mode Register */
sfr PCA0H     = 0xFA;               /*SFR Page: 0 PCA Counter High */
sfr PCA0L     = 0xF9;               /*SFR Page: 0 CA Counter Low */
sfr PCA0MD    = 0xD9;               /*SFR Page: 0 PCA Mode */
sfr PCON      = 0x87;               /*SFR Page: All */
sfr PSCTL     = 0x8F;               /*SFR Page: 0 rogram Store R/W Control */
sfr PSW       = 0xD0;               /*SFR Page: All */
sfr RCAP2H    = 0xCB;               /*SFR Page: 0 Timer/Counter 2 Capture/Reload High */
sfr RCAP2L    = 0xCA;               /*SFR Page: 0 Timer/Counter 2 Capture/Reload Low */
sfr RCAP3H    = 0xCB;               /*SFR Page: 1 Timer/Counter 3 Capture/Reload High */
sfr RCAP3L    = 0xCA;               /*SFR Page: 1 Timer/Counter 3 Capture/Reload Low */
sfr RCAP4H    = 0xCB;               /*SFR Page: 2 Timer/Counter 4 Capture/Reload High */
sfr RCAP4L    = 0xCA;               /*SFR Page: 2 Timer/Counter 4 Capture/Reload Low */
sfr REF0CN    = 0xD1;               /*SFR Page: 0 Programmable Voltage Reference Control */
sfr RSTSRC    = 0xEF;               /*SFR Page: 0 Reset Source Register */
sfr SADDR0    = 0xA9;               /*SFR Page: 0 UART 0 Slave Address */
sfr SADEN0    = 0xB9;               /*SFR Page: 0 UART 0 Slave Address Enable */
sfr SBUF0     = 0x99;               /*SFR Page: 0 UART 0 Data Buffer */
sfr SBUF1     = 0x99;               /*SFR Page: 1 UART 1 Data Buffer */
sfr SCON0     = 0x98;               /*SFR Page: 0 UART 0 Control */
sfr SCON1     = 0x98;               /*SFR Page: 1 UART 1 Control */
sfr SFRPAGE   = 0x84;               /*SFR Page: All */
sfr SFRPGCN   = 0x96;               /*SFR Page: F SFR */