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📄 nichelper.h

📁 3com 3c905网卡驱动硬件部分源码
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/*******************************************************************************
*** Note: Copy rights resevered to Beijing Pacific Linkair Communications Co. 
***
*** File Name: HelpFunction.h
*** Purpose  : Supply the  Accessing Layer Routines and some other definitions
***
*** Author   : Guangzhao Tian
*** Modified : By Guangzhao Tian at 2000/9/7
***
**/

#include "uHal.h"      /* uHal routines Lib from ARM Development Kit */
 
#include "vxworks.h"   /* VxWorks header from Vxworks*/

#include "taskLib.h"   /* task lib from VxWorks */

/******** NIC IO Space Registers Accessing Layer Routines **********/

#define NIC_READ_PORT_UCHAR(IoBaseAddress, Register) \
	        uHALr_PCIIORead8( (IoBaseAddress) + (Register) )

#define NIC_READ_PORT_USHORT(IoBaseAddress, Register) \
	 	    uHALr_PCIIORead16( (IoBaseAddress) + (Register) )
 
#define NIC_READ_PORT_ULONG(IoBaseAddress, Register) \
            uHALr_PCIIORead32( (IoBaseAddress) + (Register) )

#define NIC_WRITE_PORT_UCHAR(IoBaseAddress, Register, Value) \
     	    uHALr_PCIIOWrite8( (IoBaseAddress) + (Register), (Value) )

#define NIC_WRITE_PORT_USHORT(IoBaseAddress, Register, Value) \
            uHALr_PCIIOWrite16( (IoBaseAddress) + (Register), (Value) )

#define NIC_WRITE_PORT_ULONG(IoBaseAddress, Register, Value) \
	        uHALr_PCIIOWrite32( (IoBaseAddress) + (Register), (Value) ) 

/*Write a command (UCHAR) to IntStatus & Command Register*/
#define NIC_COMMAND(IoBaseAddress , nCommand) \
            uHALr_PCIIOWrite16( ( (IoBaseAddress) + (INTSTATUS_COMMAND_REGISTER) ) , (nCommand) ) 

/***Definition of some freqently used NIC relevant R/W Macros***/
#define NIC_MASK_ALL_INTERRUPT(IoBaseAddress)  \
 			NIC_COMMAND( IoBaseAddress ,COMMAND_SET_INTERRUPT_ENABLE | DISABLE_ALL_INTERRUPT );
 
#define NIC_UNMASK_ALL_INTERRUPT(IoBaseAddress) \
 			NIC_COMMAND(IoBaseAddress, COMMAND_SET_INTERRUPT_ENABLE | ENABLE_ALL_INTERRUPT); 
 
#define NIC_ACKNOWLEDGE_ALL_INTERRUPT(IoBaseAddress) \
			NIC_COMMAND(IoBaseAddress,COMMAND_ACKNOWLEDGE_INTERRUPT | ACKNOWLEDGE_ALL_INTERRUPT )

#define NIC_ACKNOWLEDGE_INTERRUPT(IoBaseAddress , INTERRUPT_BIT ) \
			NIC_COMMAND( (IoBaseAddress),COMMAND_ACKNOWLEDGE_INTERRUPT | (INTERRUPT_BIT ) )

#define NIC_ENABLE_ALL_INTERRUPT_INDICATION(IoBaseAddress) \
			NIC_COMMAND(IoBaseAddress, COMMAND_SET_INDICATION_ENABLE | ENABLE_ALL_INTERRUPT )

#define NIC_DISABLE_ALL_INTERRUPT_INDICATION(IoBaseAddress) \
			NIC_COMMAND( IoBaseAddress,	COMMAND_SET_INDICATION_ENABLE | DISABLE_ALL_INTERRUPT)

/********End of NIC IO Space Registers Accessing Layer Routines definitions**********/

/**** Delay Routines *****/
#define NIC_DELAY(n) taskDelay(n)

/**** Debug Message Print Routines ****/
#define DebugMsg   printf 

/********************Board level/Bus specific and architecture specific macros *************/
/*#define _BYTE_ORDER_BIG_ENDIAN   */

#ifdef  _BYTE_ORDER_BIG_ENDIAN
#define PCI_SWAP(x)			 LONGSWAP((int)(x))
#define PCI_WORD_SWAP(x)	((LSB((USHORT)(x)) << 8) | MSB((USHORT)(x)))
#else
#define PCI_SWAP(x)			(x)
#define PCI_WORD_SWAP(x)	(x)
#endif

/* memory to PCI address translation macro */
#define MEM_TO_PCI_PHYS(MemAddr) ( (MemAddr) + (0) )

#define NIC_CACHE_INVALIDATE(pCacheFuncTable,Address,Len) CACHE_DRV_INVALIDATE( (pCacheFuncTable), (Address), (Len) )
    
#define NIC_CACHE_VIRT_TO_PHYS(pCacheFuncTable,Address) \
                                 MEM_TO_PCI_PHYS( (UINT32) (CACHE_DRV_VIRT_TO_PHYS( (pCacheFuncTable),(Address) ) ) )


/**** Virture Address & Bus Address Convertion Routines ****/
#define Virt_to_Bus(address)		( (PPCIADDR) PCI_SWAP(address) )
#define Bus_to_Virt(address)		( (PVOID)    (address) )

/******* Memory to PCI Address Translation Macro ********
#define MEM_TO_PCI_PHYS(PCIMemBase,MemAddr)   ( (PCIMemBase) + (MemAddr) )

#define NIC_CACHE_VIRT_TO_PHYS(address) \
    ( MEM_TO_PCI_PHYS( (UINT32)(CACHE_DRV_VIRT_TO_PHYS (&pDrvCtrl->cacheFuncs,(address) ) ) ) ) */

/**** Memory Allocation Routines ****/
#define NIC_MEM_Alloc(n)         (ULONG) malloc( (n) )
#define NIC_MEM_Free(Handle)      free( (void * ) (Handle) )

#define NIC_MEM_DmaAlloc(n)       (void * )cacheDmaMalloc( (n) ) 
#define NIC_MEM_DmaFree(Handle)   cacheDmaFree ((void * ) (Handle) ) 

#define NIC_MEM_AlignAlloc(Align,Size)       memalign( (Align) , (Size))

#define NIC_MEM_ZeroOut(MemBase,Size) memset((MemBase),0, (Size))

#define NIC_MEM_MemSet( MemBase, nChar, Size)  memset((MemBase),(nChar), (Size))

#define NIC_MEM_Copy(dest,src,size)   memcpy( (void *)(dest),(void *)(src),(size) )

/***** Interrruptor Hook and Free Routines ****/
#define NIC_INTTRUPT_Hook(nIntVector,Routine,Param) \
           intConnect( (VOIDFUNCPTR *)INUM_TO_IVEC (nIntVector),(Routine),(int) (Param) )

#define NIC_INTTRUPT_UnHook(n)

#define NIC_INTTRUPT_ENABLE(nIntLevel)  intEnable( (nIntLevel) )
#define NIC_INTTRUPT_DISABLE(nIntLevel) intDisable((nIntLevel) )

/********NIC Driver Memory Space Accessing Layer Routines Definitions**********
<<<<<<<<<<<<<<
**************
>>>>>>>>>>>>>> 
********End of NIC Driver Memory Space Accessing Layer Routines Definitions**********/


/***
*********  End of HelpFunction.h ************* 
*************************************************************************************/

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