bulkloop.i

Loops back EP2OUT to EP6IN and EP4OUT to EP8IN.

 sbit EIPX5   = 0xF8+3;
 sbit EIPX6   = 0xF8+4;
 


 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

 
 
 
 
 
 
 
 
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 extern void          _nop_     (void);
 extern bit           _testbit_ (bit);
 extern unsigned char _cror_    (unsigned char, unsigned char);
 extern unsigned int  _iror_    (unsigned int,  unsigned char);
 extern unsigned long _lror_    (unsigned long, unsigned char);
 extern unsigned char _crol_    (unsigned char, unsigned char);
 extern unsigned int  _irol_    (unsigned int,  unsigned char);
 extern unsigned long _lrol_    (unsigned long, unsigned char);
 extern unsigned char _chkfloat_(float);
 extern void          _push_    (unsigned char _sfr);
 extern void          _pop_     (unsigned char _sfr);
 
 
 
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#line 10 "bulkloop.c" /0
#line 10 "bulkloop.c" /0
 
 
 extern BOOL GotSUD;              
 extern BOOL Sleep;
 extern BOOL Rwuen;
 extern BOOL Selfpwr;
 
 BYTE Configuration;              
 BYTE AlternateSetting;           
 
 
 
 
 
 
 
 
 
 void TD_Init(void)              
 {
 
 CPUCS = ((CPUCS & ~(0x10 | 0x08)) | 0x10) ;
 
 
 IFCONFIG |= 0x40;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 EP1OUTCFG = 0xA0;
 EP1INCFG = 0xA0;
  _nop_( ); _nop_( ); _nop_( );                     
 EP2CFG = 0xA2;
  _nop_( ); _nop_( ); _nop_( );                    
 EP4CFG = 0xA0;
  _nop_( ); _nop_( ); _nop_( );                    
 EP6CFG = 0xE2;
  _nop_( ); _nop_( ); _nop_( );                    
 EP8CFG = 0xE0;
 
 
 
 
  _nop_( ); _nop_( ); _nop_( );                    
 EP2BCL = 0x80;                 
  _nop_( ); _nop_( ); _nop_( );                    
 EP2BCL = 0x80;
  _nop_( ); _nop_( ); _nop_( );                    
 EP4BCL = 0x80;                 
  _nop_( ); _nop_( ); _nop_( );                    
 EP4BCL = 0x80;    
 
 
 AUTOPTRSETUP |= 0x01;
 
 Rwuen = 1;                  
 }
 
 
 void TD_Poll(void)               
 {
 WORD i;
 WORD count;
 
 if(!(EP2468STAT & 0x01))
 {  
 if(!(EP2468STAT & 0x20))
 {   
 APTR1H = (BYTE)(((WORD)(&EP2FIFOBUF) >> 8) & 0xff);
 APTR1L = (BYTE)((WORD)(&EP2FIFOBUF) & 0xff);
 
 AUTOPTRH2 = (BYTE)(((WORD)(&EP6FIFOBUF) >> 8) & 0xff);
 AUTOPTRL2 = (BYTE)((WORD)(&EP6FIFOBUF) & 0xff);
 
 count = (EP2BCH << 8) + EP2BCL;
 
 
 for( i = 0x0000; i < count; i++ )
 {
 
  XAUTODAT2 = XAUTODAT1;
 }
 EP6BCH = EP2BCH;  
  _nop_( ); _nop_( ); _nop_( );  
 EP6BCL = EP2BCL;         
  _nop_( ); _nop_( ); _nop_( );                    
 EP2BCL = 0x80;           
 }
 }
 
 if(!(EP2468STAT & 0x04))
 {  
 if(!(EP2468STAT & 0x80))
 {   
 APTR1H = (BYTE)(((WORD)(&EP4FIFOBUF) >> 8) & 0xff);
 APTR1L = (BYTE)((WORD)(&EP4FIFOBUF) & 0xff);
 
 AUTOPTRH2 = (BYTE)(((WORD)(&EP8FIFOBUF) >> 8) & 0xff);
 AUTOPTRL2 = (BYTE)((WORD)(&EP8FIFOBUF) & 0xff);
 
 count = (EP4BCH << 8) + EP4BCL;
 
 
 for( i = 0x0000; i < count; i++ )
 {
 
  XAUTODAT2 = XAUTODAT1;
 }
 EP8BCH = EP4BCH;  
  _nop_( ); _nop_( ); _nop_( );  
 EP8BCL = EP4BCL;         
  _nop_( ); _nop_( ); _nop_( );                    
 EP4BCL = 0x80;           
 }
 }
 }
 
 BOOL TD_Suspend(void)           
 {
 return(1);
 }
 
 BOOL TD_Resume(void)           
 {
 return(1);
 }
 
 
 
 
 
 
 BOOL DR_GetDescriptor(void)
 {
 return(1);
 }
 
 BOOL DR_SetConfiguration(void)    
 {
 Configuration = SETUPDAT[2];
 return(1);             
 }
 
 BOOL DR_GetConfiguration(void)    
 {
 EP0BUF[0] = Configuration;
 EP0BCH = 0;
 EP0BCL = 1;
 return(1);             
 }
 
 BOOL DR_SetInterface(void)        
 {
 AlternateSetting = SETUPDAT[2];
 return(1);             
 }
 
 BOOL DR_GetInterface(void)        
 {
 EP0BUF[0] = AlternateSetting;
 EP0BCH = 0;
 EP0BCL = 1;
 return(1);             
 }
 
 BOOL DR_GetStatus(void)
 {
 return(1);
 }
 
 BOOL DR_ClearFeature(void)
 {
 return(1);
 }
 
 BOOL DR_SetFeature(void)
 {
 return(1);
 }
 
 BOOL DR_VendorCmnd(void)
 {
 BYTE tmp;
 
 switch (SETUPDAT[1])
 {
 case 0xD0:
 tmp = FIFORESET;
 tmp |= 0x80;      
  _nop_( ); _nop_( ); _nop_( );                    
 FIFORESET = tmp;
 break;
 case 0xD1:
 tmp = FIFORESET;
 tmp &= ~0x80;      
  _nop_( ); _nop_( ); _nop_( );                    
 FIFORESET = tmp;
 break;
 default:
 return(1);
 }
 
 return(0);
 }
 
 
 
 
 
 
 
 void ISR_Sudav(void) interrupt 0
 {
 GotSUD = 1;             
  EXIF &= ~0x10;
 USBIRQ = 0x01;          
 }
 
 
 void ISR_Sutok(void) interrupt 0
 {
  EXIF &= ~0x10;
 USBIRQ = 0x04;          
 }
 
 void ISR_Sof(void) interrupt 0
 {
  EXIF &= ~0x10;
 USBIRQ = 0x02;             
 }
 
 void ISR_Ures(void) interrupt 0
 {
 
 pConfigDscr = pFullSpeedConfigDscr;
 ((CONFIGDSCR xdata *) pConfigDscr)->type = 0x02;
 pOtherConfigDscr = pHighSpeedConfigDscr;
 ((CONFIGDSCR xdata *) pOtherConfigDscr)->type = 0x07;
 
  EXIF &= ~0x10;
 USBIRQ = 0x10;          
 }
 
 void ISR_Susp(void) interrupt 0
 {
 Sleep = 1;
  EXIF &= ~0x10;
 USBIRQ = 0x08;
 }
 
 void ISR_Highspeed(void) interrupt 0
 {
 if ((USBCS & 0x80))
 {
 pConfigDscr = pHighSpeedConfigDscr;
 ((CONFIGDSCR xdata *) pConfigDscr)->type = 0x02;
 pOtherConfigDscr = pFullSpeedConfigDscr;
 ((CONFIGDSCR xdata *) pOtherConfigDscr)->type = 0x07;
 }
 
  EXIF &= ~0x10;
 USBIRQ = 0x20;
 }
 void ISR_Ep0ack(void) interrupt 0
 {
 }
 void ISR_Stub(void) interrupt 0
 {
 }
 void ISR_Ep0in(void) interrupt 0
 {
 }
 void ISR_Ep0out(void) interrupt 0
 {
 }
 void ISR_Ep1in(void) interrupt 0
 {
 }
 void ISR_Ep1out(void) interrupt 0
 {
 }
 void ISR_Ep2inout(void) interrupt 0
 {
 }
 void ISR_Ep4inout(void) interrupt 0
 {
 }
 void ISR_Ep6inout(void) interrupt 0
 {
 }
 void ISR_Ep8inout(void) interrupt 0
 {
 }
 void ISR_Ibn(void) interrupt 0
 {
 }
 void ISR_Ep0pingnak(void) interrupt 0
 {
 }
 void ISR_Ep1pingnak(void) interrupt 0
 {
 }
 void ISR_Ep2pingnak(void) interrupt 0
 {
 }
 void ISR_Ep4pingnak(void) interrupt 0
 {
 }
 void ISR_Ep6pingnak(void) interrupt 0
 {
 }
 void ISR_Ep8pingnak(void) interrupt 0
 {
 }
 void ISR_Errorlimit(void) interrupt 0
 {
 }
 void ISR_Ep2piderror(void) interrupt 0
 {
 }
 void ISR_Ep4piderror(void) interrupt 0
 {
 }
 void ISR_Ep6piderror(void) interrupt 0
 {
 }
 void ISR_Ep8piderror(void) interrupt 0
 {
 }
 void ISR_Ep2pflag(void) interrupt 0
 {
 }
 void ISR_Ep4pflag(void) interrupt 0
 {
 }
 void ISR_Ep6pflag(void) interrupt 0
 {
 }
 void ISR_Ep8pflag(void) interrupt 0
 {
 }
 void ISR_Ep2eflag(void) interrupt 0
 {
 }
 void ISR_Ep4eflag(void) interrupt 0
 {
 }
 void ISR_Ep6eflag(void) interrupt 0
 {
 }
 void ISR_Ep8eflag(void) interrupt 0
 {
 }
 void ISR_Ep2fflag(void) interrupt 0
 {
 }
 void ISR_Ep4fflag(void) interrupt 0
 {
 }
 void ISR_Ep6fflag(void) interrupt 0
 {
 }
 void ISR_Ep8fflag(void) interrupt 0
 {
 }
 void ISR_GpifComplete(void) interrupt 0
 {
 }
 void ISR_GpifWaveform(void) interrupt 0
 {
 }