📄 peripherals.ami
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;; ARMulator configuration file type 3
;; - peripherals.ami -
;; Copyright (c) 1996-2001 ARM Limited. All Rights Reserved.
;; RCS $Revision: 1.19.2.19.18.9 $
;; Checkin $Date: 2004/11/11 09:32:22 $
;; Revising $Author: ljameson $
{ Peripherals
;; Entries in Peripherals do not immediately load models.
;; They describe models which may be used in Processors or PeripheralSets.
;; They may be used as named-instances or prototypes.
;;*****************************************************************************
;;
;; Tracer allows memory access to be traced
;; See RealView ARMulator User Guide
;;
;;*****************************************************************************
{ Default_Tracer=Tracer
;; Output options - can be plaintext to file, binary to file or to RDI log
;; window. (Checked in the order RDILog, File, BinFile.)
VERBOSE=True
;RDILog=True
RDILog=False
File=armul.trc
BinFile=armul.trc
;; Tracer options - what to trace
Architectural=False
TraceInstructions=True
TraceRegisters=True
OpcodeFetch=True
;;Normally True is useful, but sometimes it's too expensive.
TraceMemory=True
;TraceMemory=False
;Normally False, only True for timing tests.
:NB ARM10+XScale models do not emit ICycles on IBus or DBus.
;TraceIdle=True
TraceNonAccounted=False
;+TraceEvents=False
TraceEvents=True
EventMask=0
;;If there is a non-core bus, do we trace it (as well).
TraceBus=True
;TraceBus=False
;; Flags - disassemble instructions; start up with tracing enabled;
Disassemble=True
;Set to True to output instuctions and memory-accesses in "ARMEIS" format.
TraceEIS=False
; Curently, precedes each access or opcode line with "T <corecycles>",
; or blank if the time has not changed.
TimeStamp=False
{Trace_EventNumbers
MMUEvent_DTLBWalk=True
MMUEvent_ITLBWalk=True
}
;!NOTYET - this is too user-visible!
;{TraceProperties
;Note that you can only trace RDI-properties with lower-case names???
;(toolconf converts all keys to upper case.)
;itlb_lockdown=True
;}
{TraceGenericNotifications
;We define generic notifications to have case-insensitive names.
;Generic notifications are registerred during instantiation by anything
; that can drive them.
;The data-format of each notification is negotiated at "route-links" time.
;This speeds up listeners, at the expense of complexity.
DTLB_LOCKDOWN=True
ITLB_LOCKDOWN=True
}
;TraceCoproRegisters=P11c0c1c2c3c4c5c6c7c8c9c10c11c12c13c14c15
StartOn=False
}
;;*****************************************************************************
;;
;; Profiling is controlled by the debugger
;; See RealView ARMulator User Guide
;;
;;*****************************************************************************
;Profiler's main job is to accept a map of regions from the debugger
; and write out a list of counts for those regions
; (sampled every microsecond, or every instruction).
;The debugger also starts and stops profiling over the RDI.
{ Default_Profiler=Profiler
;VERBOSE=False
;; For example - to profile the PC value when cache misses happen, set:
;Type=Cycle
;Event=0x00010001
;EventWord=pc
Type=MICROSECOND
;;Alternatives for Type are
;; Event, Cycle, Microsecond.
;;If type is Event then alternatives for EventWord are
;; Word1,Word2,PC.
}
;;*****************************************************************************
;;
;; Pagetables - used to configure the MMU and PU - Not all processors
;; have all properties. Please check TRMs first.
;; See RealView ARMulator User Guide
;;
;;*****************************************************************************
{Default_Pagetables=PageTables
;(bit 0)
MMU=Yes
;(bit 1) NB our endian regression tests assume this is False.
AlignFaults=No
;; If setting cache=yes the mmu must be enabled.
;(bit 2)
Cache=Yes
WriteBuffer=Yes
Prog32=Yes
Data32=Yes
LateAbort=Yes
;; We don't define BigEnd here, to allow the debugger its preference.
;; (i.e. to allow the WinRDI Configuration dialog to work.)
;;BigEnd=No
BranchPredict=Yes
ICache=Yes
HighExceptionVectors=No
PageTableBase=0xa0000000
DAC=0x00000001
;; Used by the 940 to control the clock mode. Use this flag
;; to configure the clock mode for the processor. If FastBus is enabled
;; fast bus mode will be used otherwise synchronous mode is used.
FastBus=No
; Don't turn these on until you have read an ARM966 or ARM926 manual,
; to avoid confusion.
; Normally you need code to initialise the contents of IRAM and DRAM.
IRAM=No
DRAM=No
{ Region[0]
VirtualBase=0
PhysicalBase=0
Size=4GB
Cacheable=No
Bufferable=No
Updateable=Yes
Domain=0
;Only 2 bits per region are supported here, so only options
; 0..3 are available even though a 946 has 4 bits per region -
; i.e. we use "compatability" mode.
AccessPermissions=3
Translate=Yes
}
{ Region[1]
VirtualBase=0
PhysicalBase=0
Size=128Mb
Cacheable=Yes
Bufferable=Yes
; - ARM720 and earlier -
Updateable=Yes
; - V6 -
; Normally 0.
; 4 changes the meaning of the C,B bits so 0,1 means "allocate-on-write".
V6TEX=0
Domain=0
AccessPermissions=3
Translate=Yes
}
{ MPURegion[0]
PhysicalBase=0
Size=4GB
Cacheable=Yes
Bufferable=Yes
AccessPermissions=3
}
;End Default_Pagetables
}
;;*****************************************************************************
;;
;; Semihosting model - controls the semihosting interface
;; See RealView ARMulator User Guide
;;
;;*****************************************************************************
{Default_Semihost=Semihost
; Demon is only needed for validation.
DEMON=False
ANGEL=TRUE
AngelSWIARM=0x123456
AngelSWIThumb=0xab
; And the default memory map
HeapBase=0x00000000
HeapLimit=0x07000000
StackBase=0x08000000
StackLimit=0x07000000
}
;;*****************************************************************************
;;
;; Millisec model provides a 32 bit counter
;;
;;*****************************************************************************
{Default_Millisec=Millisec
Range:Base=0x0bfffff0
}
;;*****************************************************************************
;;
;; Memory mapped register - when a printable character is written to it
;; that character appears on the console.
;; Range can be altered - see RealView ARMulator User Guide
;;
;;*****************************************************************************
{Default_Tube=Tube
Range:Base=0x0d800020
}
;;*****************************************************************************
;;
;; Use Watchdog to prevent a failure in your program locking up your system.
;; Watchdog resets ARMulator if your program fails to access it before
;; a predetermined time - NB there is no hardware watchdog timer
;; See RealView ARMulator User Guide
;;
;;*****************************************************************************
{Default_WatchDog=WatchDog
Waits=0
Range:Base=0xb0000000
KeyValue=0x12345678
WatchPeriod=0x80000
IRQPeriod=3000
IntNumber=16
StartOnReset=True
RunAfterBark=True
}
;;*****************************************************************************
;;
;; Interrupt Controller - can alter range and wait states -
;; See RealView ARMulator User Guide
;;
;;*****************************************************************************
{Default_Intctrl=Intctrl
Waits=0
Range:Base=0x0a000000
}
;;*****************************************************************************
;;
;; Timer - can alter range and wait states -
;; See RealView ARMulator User Guide
;;
;;*****************************************************************************
{Default_Timer=Timer
Waits=0
Range:Base=0x0a800000
;Frequency of clock to controller.
CLK=20000000
;; Interrupt controller source bits - 4 and 5 as standard
IntOne=4
IntTwo=5
}
;;*****************************************************************************
;;
;; Debug Comms channel
;;
;;*****************************************************************************
;; This is instantiated inside processors which include this
;; coprocessor, e.g. ARM7TDMI, in armulate.dsc.
{ Default_DebugComms=DebugComms
Rate=76
ReadDelay=38
WriteDelay=108
MCCfg=15
; Whether RX and TX are wired up to IRQ/interrupt controller
IRQOnCommsChannel=True
; Interrupt priorities when using an interrupt controller
CommRXIRQNo=2
CommTXIRQNo=3
}
;;*****************************************************************************
;;
;; Mapfile - used to model the memory map
;; See RealView ARMulator User Guide
;;
;;*****************************************************************************
{ Default_Mapfile=Mapfile
AMBABusCounts=False
;SpotISCycles=True|False
SpotISCycles=True
;ISTiming=Late|Early|Speculative
ISTiming=Late
;MAPFILETOLOAD=<a filename>
}
;;*****************************************************************************
;;
;; Used by RDI module Server to access coprocessor registers.
;;
;;*****************************************************************************
{ Default_Codeseq=Codeseq
}
;;*****************************************************************************
;;
;; Used by Simabs to get a memory callback hooked in
;;
;;*****************************************************************************
{ Default_SimabsMemCallback=SimabsMemCallback
}
;;*****************************************************************************
;;
;; Memory model for validation
;;
;;*****************************************************************************
{Default_Trickbox=Trickbox
REGADDRMASK=0x7FFFfffc
}
; Stackuse. The stack tracker is disabled by default in default.ami because
; it's expensive when turned on.
{ Default_StackUse=Stackuse
; The base and limit addresses set here tell StackUse where valid values
; of R13 are. They have no effect on stack location in memory:
; this is instead defined in Semihost (or the image, if that initializes R13).
StackBase=0x08000000
StackLimit=0x07000000
}
;End Peripherals
}
;EOF peripherals.ami
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